1 /***********************license start*************** 2 * Copyright (c) 2003-2010 Cavium Inc. ([email protected]). All rights 3 * reserved. 4 * 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: 9 * 10 * * Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 13 * * Redistributions in binary form must reproduce the above 14 * copyright notice, this list of conditions and the following 15 * disclaimer in the documentation and/or other materials provided 16 * with the distribution. 17 18 * * Neither the name of Cavium Inc. nor the names of 19 * its contributors may be used to endorse or promote products 20 * derived from this software without specific prior written 21 * permission. 22 23 * This Software, including technical data, may be subject to U.S. export control 24 * laws, including the U.S. Export Administration Act and its associated 25 * regulations, and may be subject to export or import regulations in other 26 * countries. 27 28 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 29 * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR 30 * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO 31 * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR 32 * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM 33 * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, 34 * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF 35 * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR 36 * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR 37 * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 38 ***********************license end**************************************/ 39 40 41 /** 42 * @file 43 * Function prototypes for accessing memory and CSRs on Octeon. 44 * 45 * <hr>$Revision: 38306 $<hr> 46 */ 47 #ifndef __CVMX_ACCESS_H__ 48 #define __CVMX_ACCESS_H__ 49 50 #ifdef __cplusplus 51 extern "C" { 52 #endif 53 54 /* We're going to assume that if we are compiling for Mips then we must be 55 running natively on Octoen. It is possible that this code could be 56 compiled on a non Octeon Mips that is acting as a PCI/PCIe host. In this 57 case this assumption will be wrong and cause issues We can't key off of 58 __octeon__ since some people use stock gcc toolchains */ 59 #if defined(__mips__) && !defined(CVMX_BUILD_FOR_LINUX_HOST) 60 #define CVMX_FUNCTION static inline 61 #else 62 #define CVMX_FUNCTION extern 63 #endif 64 65 /** 66 * simprintf uses simulator tricks to speed up printouts. The format 67 * and args are passed to the simulator and processed natively on the host. 68 * Simprintf is limited to 7 arguments, and they all must use %ll (long long) 69 * format specifiers to be displayed correctly. 70 * 71 * @param format 72 * 73 * @return 74 */ 75 EXTERN_ASM void simprintf(const char *format, ...); 76 77 /** 78 * This function performs some default initialization of the Octeon executive. 79 * It initializes the cvmx_bootmem memory allocator with the list of physical 80 * memory provided by the bootloader, and creates 1-1 TLB mappings for this 81 * memory. This function should be called on all cores that will use either the 82 * bootmem allocator or the 1-1 TLB mappings. Applications which require a 83 * different configuration can replace this function with a suitable application 84 * specific one. 85 * 86 * @return 0 on success 87 * -1 on failure 88 */ 89 extern int cvmx_user_app_init(void); 90 91 /** 92 * Returns the Octeon processor ID. 93 * 94 * @return Octeon processor ID from COP0 95 */ 96 CVMX_FUNCTION uint32_t cvmx_get_proc_id(void) __attribute__ ((pure)); 97 98 /** 99 * Convert a memory pointer (void*) into a hardware compatable 100 * memory address (uint64_t). Octeon hardware widgets don't 101 * understand logical addresses. 102 * 103 * @param ptr C style memory pointer 104 * @return Hardware physical address 105 */ 106 CVMX_FUNCTION uint64_t cvmx_ptr_to_phys(void *ptr); 107 108 /** 109 * Convert a hardware physical address (uint64_t) into a 110 * memory pointer (void *). 111 * 112 * @param physical_address 113 * Hardware physical address to memory 114 * @return Pointer to memory 115 */ 116 CVMX_FUNCTION void *cvmx_phys_to_ptr(uint64_t physical_address); 117 118 CVMX_FUNCTION void cvmx_write64_int64(uint64_t address, int64_t value); 119 CVMX_FUNCTION void cvmx_write64_uint64(uint64_t address, uint64_t value); 120 CVMX_FUNCTION void cvmx_write64_int32(uint64_t address, int32_t value); 121 CVMX_FUNCTION void cvmx_write64_uint32(uint64_t address, uint32_t value); 122 CVMX_FUNCTION void cvmx_write64_int16(uint64_t address, int16_t value); 123 CVMX_FUNCTION void cvmx_write64_uint16(uint64_t address, uint16_t value); 124 CVMX_FUNCTION void cvmx_write64_int8(uint64_t address, int8_t value); 125 CVMX_FUNCTION void cvmx_write64_uint8(uint64_t address, uint8_t value); 126 CVMX_FUNCTION void cvmx_write_csr(uint64_t csr_addr, uint64_t val); 127 CVMX_FUNCTION void cvmx_write_io(uint64_t io_addr, uint64_t val); 128 129 CVMX_FUNCTION int64_t cvmx_read64_int64(uint64_t address); 130 CVMX_FUNCTION uint64_t cvmx_read64_uint64(uint64_t address); 131 CVMX_FUNCTION int32_t cvmx_read64_int32(uint64_t address); 132 CVMX_FUNCTION uint32_t cvmx_read64_uint32(uint64_t address); 133 CVMX_FUNCTION int16_t cvmx_read64_int16(uint64_t address); 134 CVMX_FUNCTION uint16_t cvmx_read64_uint16(uint64_t address); 135 CVMX_FUNCTION int8_t cvmx_read64_int8(uint64_t address); 136 CVMX_FUNCTION uint8_t cvmx_read64_uint8(uint64_t address); 137 CVMX_FUNCTION uint64_t cvmx_read_csr(uint64_t csr_addr); 138 139 CVMX_FUNCTION void cvmx_send_single(uint64_t data); 140 CVMX_FUNCTION void cvmx_read_csr_async(uint64_t scraddr, uint64_t csr_addr); 141 142 /** 143 * Number of the Core on which the program is currently running. 144 * 145 * @return Number of cores 146 */ 147 CVMX_FUNCTION unsigned int cvmx_get_core_num(void); 148 149 /** 150 * Returns the number of bits set in the provided value. 151 * Simple wrapper for POP instruction. 152 * 153 * @param val 32 bit value to count set bits in 154 * 155 * @return Number of bits set 156 */ 157 CVMX_FUNCTION uint32_t cvmx_pop(uint32_t val); 158 159 /** 160 * Returns the number of bits set in the provided value. 161 * Simple wrapper for DPOP instruction. 162 * 163 * @param val 64 bit value to count set bits in 164 * 165 * @return Number of bits set 166 */ 167 CVMX_FUNCTION int cvmx_dpop(uint64_t val); 168 169 /** 170 * @deprecated 171 * Provide current cycle counter as a return value. Deprecated, use 172 * cvmx_clock_get_count(CVMX_CLOCK_CORE) to get cycle counter. 173 * 174 * @return current cycle counter 175 */ 176 CVMX_FUNCTION uint64_t cvmx_get_cycle(void); 177 178 /** 179 * @deprecated 180 * Reads a chip global cycle counter. This counts SCLK cycles since 181 * chip reset. The counter is 64 bit. This function is deprecated as the rate 182 * of the global cycle counter is different between Octeon+ and Octeon2, use 183 * cvmx_clock_get_count(CVMX_CLOCK_SCLK) instead. For Octeon2, the clock rate 184 * of SCLK may be differnet than the core clock. 185 * 186 * @return Global chip cycle count since chip reset. 187 */ 188 CVMX_FUNCTION uint64_t cvmx_get_cycle_global(void) __attribute__((deprecated)); 189 190 /** 191 * Wait for the specified number of core clock cycles 192 * 193 * @param cycles 194 */ 195 CVMX_FUNCTION void cvmx_wait(uint64_t cycles); 196 197 /** 198 * Wait for the specified number of micro seconds 199 * 200 * @param usec micro seconds to wait 201 */ 202 CVMX_FUNCTION void cvmx_wait_usec(uint64_t usec); 203 204 /** 205 * Wait for the specified number of io clock cycles 206 * 207 * @param cycles 208 */ 209 CVMX_FUNCTION void cvmx_wait_io(uint64_t cycles); 210 211 /** 212 * Perform a soft reset of Octeon 213 * 214 * @return 215 */ 216 CVMX_FUNCTION void cvmx_reset_octeon(void); 217 218 /** 219 * Read a byte of fuse data 220 * @param byte_addr address to read 221 * 222 * @return fuse value: 0 or 1 223 */ 224 CVMX_FUNCTION uint8_t cvmx_fuse_read_byte(int byte_addr); 225 226 /** 227 * Read a single fuse bit 228 * 229 * @param fuse Fuse number (0-1024) 230 * 231 * @return fuse value: 0 or 1 232 */ 233 CVMX_FUNCTION int cvmx_fuse_read(int fuse); 234 235 #undef CVMX_FUNCTION 236 237 #ifdef __cplusplus 238 } 239 #endif 240 241 #endif /* __CVMX_ACCESS_H__ */ 242 243