1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2008-2017 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 */
5
6 #ifndef _CQ_ENET_DESC_H_
7 #define _CQ_ENET_DESC_H_
8
9 #include <rte_byteorder.h>
10 #include "cq_desc.h"
11
12 /* Ethernet completion queue descriptor: 16B */
13 struct cq_enet_wq_desc {
14 uint16_t completed_index;
15 uint16_t q_number;
16 uint8_t reserved[11];
17 uint8_t type_color;
18 };
19
cq_enet_wq_desc_enc(struct cq_enet_wq_desc * desc,uint8_t type,uint8_t color,uint16_t q_number,uint16_t completed_index)20 static inline void cq_enet_wq_desc_enc(struct cq_enet_wq_desc *desc,
21 uint8_t type, uint8_t color, uint16_t q_number,
22 uint16_t completed_index)
23 {
24 cq_desc_enc((struct cq_desc *)desc, type,
25 color, q_number, completed_index);
26 }
27
cq_enet_wq_desc_dec(struct cq_enet_wq_desc * desc,uint8_t * type,uint8_t * color,uint16_t * q_number,uint16_t * completed_index)28 static inline void cq_enet_wq_desc_dec(struct cq_enet_wq_desc *desc,
29 uint8_t *type, uint8_t *color, uint16_t *q_number,
30 uint16_t *completed_index)
31 {
32 cq_desc_dec((struct cq_desc *)desc, type,
33 color, q_number, completed_index);
34 }
35
36 /* Completion queue descriptor: Ethernet receive queue, 16B */
37 struct cq_enet_rq_desc {
38 uint16_t completed_index_flags;
39 uint16_t q_number_rss_type_flags;
40 uint32_t rss_hash;
41 uint16_t bytes_written_flags;
42 uint16_t vlan;
43 uint16_t checksum_fcoe;
44 uint8_t flags;
45 uint8_t type_color;
46 };
47
48 /* Completion queue descriptor: Ethernet receive queue, 16B */
49 struct cq_enet_rq_clsf_desc {
50 uint16_t completed_index_flags;
51 uint16_t q_number_rss_type_flags;
52 uint16_t filter_id;
53 uint16_t lif;
54 uint16_t bytes_written_flags;
55 uint16_t vlan;
56 uint16_t checksum_fcoe;
57 uint8_t flags;
58 uint8_t type_color;
59 };
60
61 #define CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT (0x1 << 12)
62 #define CQ_ENET_RQ_DESC_FLAGS_FCOE (0x1 << 13)
63 #define CQ_ENET_RQ_DESC_FLAGS_EOP (0x1 << 14)
64 #define CQ_ENET_RQ_DESC_FLAGS_SOP (0x1 << 15)
65
66 #define CQ_ENET_RQ_DESC_RSS_TYPE_BITS 4
67 #define CQ_ENET_RQ_DESC_RSS_TYPE_MASK \
68 ((1 << CQ_ENET_RQ_DESC_RSS_TYPE_BITS) - 1)
69 #define CQ_ENET_RQ_DESC_RSS_TYPE_NONE 0
70 #define CQ_ENET_RQ_DESC_RSS_TYPE_IPv4 1
71 #define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv4 2
72 #define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6 3
73 #define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6 4
74 #define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6_EX 5
75 #define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6_EX 6
76
77 #define CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC (0x1 << 14)
78
79 #define CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS 14
80 #define CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK \
81 ((1 << CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS) - 1)
82 #define CQ_ENET_RQ_DESC_FLAGS_TRUNCATED (0x1 << 14)
83 #define CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED (0x1 << 15)
84
85 #define CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_BITS 12
86 #define CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_MASK \
87 ((1 << CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_BITS) - 1)
88 #define CQ_ENET_RQ_DESC_VLAN_TCI_CFI_MASK (0x1 << 12)
89 #define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_BITS 3
90 #define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_MASK \
91 ((1 << CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_BITS) - 1)
92 #define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_SHIFT 13
93
94 #define CQ_ENET_RQ_DESC_FCOE_SOF_BITS 8
95 #define CQ_ENET_RQ_DESC_FCOE_SOF_MASK \
96 ((1 << CQ_ENET_RQ_DESC_FCOE_SOF_BITS) - 1)
97 #define CQ_ENET_RQ_DESC_FCOE_EOF_BITS 8
98 #define CQ_ENET_RQ_DESC_FCOE_EOF_MASK \
99 ((1 << CQ_ENET_RQ_DESC_FCOE_EOF_BITS) - 1)
100 #define CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT 8
101
102 #define CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK (0x1 << 0)
103 #define CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK (0x1 << 0)
104 #define CQ_ENET_RQ_DESC_FLAGS_UDP (0x1 << 1)
105 #define CQ_ENET_RQ_DESC_FCOE_ENC_ERROR (0x1 << 1)
106 #define CQ_ENET_RQ_DESC_FLAGS_TCP (0x1 << 2)
107 #define CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK (0x1 << 3)
108 #define CQ_ENET_RQ_DESC_FLAGS_IPV6 (0x1 << 4)
109 #define CQ_ENET_RQ_DESC_FLAGS_IPV4 (0x1 << 5)
110 #define CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT (0x1 << 6)
111 #define CQ_ENET_RQ_DESC_FLAGS_FCS_OK (0x1 << 7)
112
cq_enet_rq_desc_enc(struct cq_enet_rq_desc * desc,uint8_t type,uint8_t color,uint16_t q_number,uint16_t completed_index,uint8_t ingress_port,uint8_t fcoe,uint8_t eop,uint8_t sop,uint8_t rss_type,uint8_t csum_not_calc,uint32_t rss_hash,uint16_t bytes_written,uint8_t packet_error,uint8_t vlan_stripped,uint16_t vlan,uint16_t checksum,uint8_t fcoe_sof,uint8_t fcoe_fc_crc_ok,uint8_t fcoe_enc_error,uint8_t fcoe_eof,uint8_t tcp_udp_csum_ok,uint8_t udp,uint8_t tcp,uint8_t ipv4_csum_ok,uint8_t ipv6,uint8_t ipv4,uint8_t ipv4_fragment,uint8_t fcs_ok)113 static inline void cq_enet_rq_desc_enc(struct cq_enet_rq_desc *desc,
114 uint8_t type, uint8_t color, uint16_t q_number,
115 uint16_t completed_index, uint8_t ingress_port, uint8_t fcoe,
116 uint8_t eop, uint8_t sop, uint8_t rss_type, uint8_t csum_not_calc,
117 uint32_t rss_hash, uint16_t bytes_written, uint8_t packet_error,
118 uint8_t vlan_stripped, uint16_t vlan, uint16_t checksum,
119 uint8_t fcoe_sof, uint8_t fcoe_fc_crc_ok, uint8_t fcoe_enc_error,
120 uint8_t fcoe_eof, uint8_t tcp_udp_csum_ok, uint8_t udp, uint8_t tcp,
121 uint8_t ipv4_csum_ok, uint8_t ipv6, uint8_t ipv4, uint8_t ipv4_fragment,
122 uint8_t fcs_ok)
123 {
124 cq_desc_enc((struct cq_desc *)desc, type,
125 color, q_number, completed_index);
126
127 desc->completed_index_flags |= rte_cpu_to_le_16
128 ((ingress_port ? CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT : 0) |
129 (fcoe ? CQ_ENET_RQ_DESC_FLAGS_FCOE : 0) |
130 (eop ? CQ_ENET_RQ_DESC_FLAGS_EOP : 0) |
131 (sop ? CQ_ENET_RQ_DESC_FLAGS_SOP : 0));
132
133 desc->q_number_rss_type_flags |= rte_cpu_to_le_16
134 (((rss_type & CQ_ENET_RQ_DESC_RSS_TYPE_MASK) <<
135 CQ_DESC_Q_NUM_BITS) |
136 (csum_not_calc ? CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC : 0));
137
138 desc->rss_hash = rte_cpu_to_le_32(rss_hash);
139
140 desc->bytes_written_flags = rte_cpu_to_le_16
141 ((bytes_written & CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK) |
142 (packet_error ? CQ_ENET_RQ_DESC_FLAGS_TRUNCATED : 0) |
143 (vlan_stripped ? CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED : 0));
144
145 desc->vlan = rte_cpu_to_le_16(vlan);
146
147 if (fcoe) {
148 desc->checksum_fcoe = rte_cpu_to_le_16
149 ((fcoe_sof & CQ_ENET_RQ_DESC_FCOE_SOF_MASK) |
150 ((fcoe_eof & CQ_ENET_RQ_DESC_FCOE_EOF_MASK) <<
151 CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT));
152 } else {
153 desc->checksum_fcoe = rte_cpu_to_le_16(checksum);
154 }
155
156 desc->flags =
157 (tcp_udp_csum_ok ? CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK : 0) |
158 (udp ? CQ_ENET_RQ_DESC_FLAGS_UDP : 0) |
159 (tcp ? CQ_ENET_RQ_DESC_FLAGS_TCP : 0) |
160 (ipv4_csum_ok ? CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK : 0) |
161 (ipv6 ? CQ_ENET_RQ_DESC_FLAGS_IPV6 : 0) |
162 (ipv4 ? CQ_ENET_RQ_DESC_FLAGS_IPV4 : 0) |
163 (ipv4_fragment ? CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT : 0) |
164 (fcs_ok ? CQ_ENET_RQ_DESC_FLAGS_FCS_OK : 0) |
165 (fcoe_fc_crc_ok ? CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK : 0) |
166 (fcoe_enc_error ? CQ_ENET_RQ_DESC_FCOE_ENC_ERROR : 0);
167 }
168
cq_enet_rq_desc_dec(struct cq_enet_rq_desc * desc,uint8_t * type,uint8_t * color,uint16_t * q_number,uint16_t * completed_index,uint8_t * ingress_port,uint8_t * fcoe,uint8_t * eop,uint8_t * sop,uint8_t * rss_type,uint8_t * csum_not_calc,uint32_t * rss_hash,uint16_t * bytes_written,uint8_t * packet_error,uint8_t * vlan_stripped,uint16_t * vlan_tci,uint16_t * checksum,uint8_t * fcoe_sof,uint8_t * fcoe_fc_crc_ok,uint8_t * fcoe_enc_error,uint8_t * fcoe_eof,uint8_t * tcp_udp_csum_ok,uint8_t * udp,uint8_t * tcp,uint8_t * ipv4_csum_ok,uint8_t * ipv6,uint8_t * ipv4,uint8_t * ipv4_fragment,uint8_t * fcs_ok)169 static inline void cq_enet_rq_desc_dec(struct cq_enet_rq_desc *desc,
170 uint8_t *type, uint8_t *color, uint16_t *q_number,
171 uint16_t *completed_index, uint8_t *ingress_port, uint8_t *fcoe,
172 uint8_t *eop, uint8_t *sop, uint8_t *rss_type, uint8_t *csum_not_calc,
173 uint32_t *rss_hash, uint16_t *bytes_written, uint8_t *packet_error,
174 uint8_t *vlan_stripped, uint16_t *vlan_tci, uint16_t *checksum,
175 uint8_t *fcoe_sof, uint8_t *fcoe_fc_crc_ok, uint8_t *fcoe_enc_error,
176 uint8_t *fcoe_eof, uint8_t *tcp_udp_csum_ok, uint8_t *udp, uint8_t *tcp,
177 uint8_t *ipv4_csum_ok, uint8_t *ipv6, uint8_t *ipv4,
178 uint8_t *ipv4_fragment, uint8_t *fcs_ok)
179 {
180 uint16_t completed_index_flags;
181 uint16_t q_number_rss_type_flags;
182 uint16_t bytes_written_flags;
183
184 cq_desc_dec((struct cq_desc *)desc, type,
185 color, q_number, completed_index);
186
187 completed_index_flags = rte_le_to_cpu_16(desc->completed_index_flags);
188 q_number_rss_type_flags =
189 rte_le_to_cpu_16(desc->q_number_rss_type_flags);
190 bytes_written_flags = rte_le_to_cpu_16(desc->bytes_written_flags);
191
192 *ingress_port = (completed_index_flags &
193 CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT) ? 1 : 0;
194 *fcoe = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_FCOE) ?
195 1 : 0;
196 *eop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_EOP) ?
197 1 : 0;
198 *sop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_SOP) ?
199 1 : 0;
200
201 *rss_type = (uint8_t)((q_number_rss_type_flags >> CQ_DESC_Q_NUM_BITS) &
202 CQ_ENET_RQ_DESC_RSS_TYPE_MASK);
203 *csum_not_calc = (q_number_rss_type_flags &
204 CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC) ? 1 : 0;
205
206 *rss_hash = rte_le_to_cpu_32(desc->rss_hash);
207
208 *bytes_written = bytes_written_flags &
209 CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;
210 *packet_error = (bytes_written_flags &
211 CQ_ENET_RQ_DESC_FLAGS_TRUNCATED) ? 1 : 0;
212 *vlan_stripped = (bytes_written_flags &
213 CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED) ? 1 : 0;
214
215 /*
216 * Tag Control Information(16) = user_priority(3) + cfi(1) + vlan(12)
217 */
218 *vlan_tci = rte_le_to_cpu_16(desc->vlan);
219
220 if (*fcoe) {
221 *fcoe_sof = (uint8_t)(rte_le_to_cpu_16(desc->checksum_fcoe) &
222 CQ_ENET_RQ_DESC_FCOE_SOF_MASK);
223 *fcoe_fc_crc_ok = (desc->flags &
224 CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK) ? 1 : 0;
225 *fcoe_enc_error = (desc->flags &
226 CQ_ENET_RQ_DESC_FCOE_ENC_ERROR) ? 1 : 0;
227 *fcoe_eof = (uint8_t)((rte_le_to_cpu_16(desc->checksum_fcoe) >>
228 CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT) &
229 CQ_ENET_RQ_DESC_FCOE_EOF_MASK);
230 *checksum = 0;
231 } else {
232 *fcoe_sof = 0;
233 *fcoe_fc_crc_ok = 0;
234 *fcoe_enc_error = 0;
235 *fcoe_eof = 0;
236 *checksum = rte_le_to_cpu_16(desc->checksum_fcoe);
237 }
238
239 *tcp_udp_csum_ok =
240 (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK) ? 1 : 0;
241 *udp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_UDP) ? 1 : 0;
242 *tcp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP) ? 1 : 0;
243 *ipv4_csum_ok =
244 (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK) ? 1 : 0;
245 *ipv6 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV6) ? 1 : 0;
246 *ipv4 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4) ? 1 : 0;
247 *ipv4_fragment =
248 (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT) ? 1 : 0;
249 *fcs_ok = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_FCS_OK) ? 1 : 0;
250 }
251
252 #endif /* _CQ_ENET_DESC_H_ */
253