1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
3 */
4
5 #ifndef __CN9K_RX_H__
6 #define __CN9K_RX_H__
7
8 #include <rte_ether.h>
9 #include <rte_vect.h>
10
11 #include <cnxk_ethdev.h>
12
13 #define NIX_RX_OFFLOAD_NONE (0)
14 #define NIX_RX_OFFLOAD_RSS_F BIT(0)
15 #define NIX_RX_OFFLOAD_PTYPE_F BIT(1)
16 #define NIX_RX_OFFLOAD_CHECKSUM_F BIT(2)
17 #define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(3)
18 #define NIX_RX_OFFLOAD_TSTAMP_F BIT(4)
19 #define NIX_RX_OFFLOAD_VLAN_STRIP_F BIT(5)
20 #define NIX_RX_OFFLOAD_SECURITY_F BIT(6)
21 #define NIX_RX_OFFLOAD_MAX (NIX_RX_OFFLOAD_SECURITY_F << 1)
22
23 /* Flags to control cqe_to_mbuf conversion function.
24 * Defining it from backwards to denote its been
25 * not used as offload flags to pick function
26 */
27 #define NIX_RX_MULTI_SEG_F BIT(14)
28 #define CPT_RX_WQE_F BIT(15)
29
30 #define CNXK_NIX_CQ_ENTRY_SZ 128
31 #define NIX_DESCS_PER_LOOP 4
32 #define CQE_CAST(x) ((struct nix_cqe_hdr_s *)(x))
33 #define CQE_SZ(x) ((x) * CNXK_NIX_CQ_ENTRY_SZ)
34
35 #define IPSEC_SQ_LO_IDX 4
36 #define IPSEC_SQ_HI_IDX 8
37
38 union mbuf_initializer {
39 struct {
40 uint16_t data_off;
41 uint16_t refcnt;
42 uint16_t nb_segs;
43 uint16_t port;
44 } fields;
45 uint64_t value;
46 };
47
48 static __rte_always_inline uint64_t
nix_clear_data_off(uint64_t oldval)49 nix_clear_data_off(uint64_t oldval)
50 {
51 union mbuf_initializer mbuf_init = {.value = oldval};
52
53 mbuf_init.fields.data_off = 0;
54 return mbuf_init.value;
55 }
56
57 static __rte_always_inline struct rte_mbuf *
nix_get_mbuf_from_cqe(void * cq,const uint64_t data_off)58 nix_get_mbuf_from_cqe(void *cq, const uint64_t data_off)
59 {
60 rte_iova_t buff;
61
62 /* Skip CQE, NIX_RX_PARSE_S and SG HDR(9 DWORDs) and peek buff addr */
63 buff = *((rte_iova_t *)((uint64_t *)cq + 9));
64 return (struct rte_mbuf *)(buff - data_off);
65 }
66
67 static __rte_always_inline uint32_t
nix_ptype_get(const void * const lookup_mem,const uint64_t in)68 nix_ptype_get(const void *const lookup_mem, const uint64_t in)
69 {
70 const uint16_t *const ptype = lookup_mem;
71 const uint16_t lh_lg_lf = (in & 0xFFF0000000000000) >> 52;
72 const uint16_t tu_l2 = ptype[(in & 0x000FFFF000000000) >> 36];
73 const uint16_t il4_tu = ptype[PTYPE_NON_TUNNEL_ARRAY_SZ + lh_lg_lf];
74
75 return (il4_tu << PTYPE_NON_TUNNEL_WIDTH) | tu_l2;
76 }
77
78 static __rte_always_inline uint32_t
nix_rx_olflags_get(const void * const lookup_mem,const uint64_t in)79 nix_rx_olflags_get(const void *const lookup_mem, const uint64_t in)
80 {
81 const uint32_t *const ol_flags =
82 (const uint32_t *)((const uint8_t *)lookup_mem +
83 PTYPE_ARRAY_SZ);
84
85 return ol_flags[(in & 0xfff00000) >> 20];
86 }
87
88 static inline uint64_t
nix_update_match_id(const uint16_t match_id,uint64_t ol_flags,struct rte_mbuf * mbuf)89 nix_update_match_id(const uint16_t match_id, uint64_t ol_flags,
90 struct rte_mbuf *mbuf)
91 {
92 /* There is no separate bit to check match_id
93 * is valid or not? and no flag to identify it is an
94 * RTE_FLOW_ACTION_TYPE_FLAG vs RTE_FLOW_ACTION_TYPE_MARK
95 * action. The former case addressed through 0 being invalid
96 * value and inc/dec match_id pair when MARK is activated.
97 * The later case addressed through defining
98 * CNXK_FLOW_MARK_DEFAULT as value for
99 * RTE_FLOW_ACTION_TYPE_MARK.
100 * This would translate to not use
101 * CNXK_FLOW_ACTION_FLAG_DEFAULT - 1 and
102 * CNXK_FLOW_ACTION_FLAG_DEFAULT for match_id.
103 * i.e valid mark_id's are from
104 * 0 to CNXK_FLOW_ACTION_FLAG_DEFAULT - 2
105 */
106 if (likely(match_id)) {
107 ol_flags |= RTE_MBUF_F_RX_FDIR;
108 if (match_id != CNXK_FLOW_ACTION_FLAG_DEFAULT) {
109 ol_flags |= RTE_MBUF_F_RX_FDIR_ID;
110 mbuf->hash.fdir.hi = match_id - 1;
111 }
112 }
113
114 return ol_flags;
115 }
116
117 static __rte_always_inline void
nix_cqe_xtract_mseg(const union nix_rx_parse_u * rx,struct rte_mbuf * mbuf,uint64_t rearm,const uint16_t flags)118 nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf,
119 uint64_t rearm, const uint16_t flags)
120 {
121 const rte_iova_t *iova_list;
122 struct rte_mbuf *head;
123 const rte_iova_t *eol;
124 uint8_t nb_segs;
125 uint64_t sg;
126
127 sg = *(const uint64_t *)(rx + 1);
128 nb_segs = (sg >> 48) & 0x3;
129
130 if (nb_segs == 1) {
131 mbuf->next = NULL;
132 return;
133 }
134
135 mbuf->pkt_len = (rx->pkt_lenm1 + 1) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
136 CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
137 mbuf->data_len = (sg & 0xFFFF) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
138 CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
139 mbuf->nb_segs = nb_segs;
140 sg = sg >> 16;
141
142 eol = ((const rte_iova_t *)(rx + 1) +
143 ((rx->cn9k.desc_sizem1 + 1) << 1));
144 /* Skip SG_S and first IOVA*/
145 iova_list = ((const rte_iova_t *)(rx + 1)) + 2;
146 nb_segs--;
147
148 rearm = rearm & ~0xFFFF;
149
150 head = mbuf;
151 while (nb_segs) {
152 mbuf->next = ((struct rte_mbuf *)*iova_list) - 1;
153 mbuf = mbuf->next;
154
155 RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 1);
156
157 mbuf->data_len = sg & 0xFFFF;
158 sg = sg >> 16;
159 *(uint64_t *)(&mbuf->rearm_data) = rearm;
160 nb_segs--;
161 iova_list++;
162
163 if (!nb_segs && (iova_list + 1 < eol)) {
164 sg = *(const uint64_t *)(iova_list);
165 nb_segs = (sg >> 48) & 0x3;
166 head->nb_segs += nb_segs;
167 iova_list = (const rte_iova_t *)(iova_list + 1);
168 }
169 }
170 mbuf->next = NULL;
171 }
172
173 static inline int
ipsec_antireplay_check(struct roc_onf_ipsec_inb_sa * sa,struct cn9k_inb_priv_data * priv,uintptr_t data,uint32_t win_sz)174 ipsec_antireplay_check(struct roc_onf_ipsec_inb_sa *sa,
175 struct cn9k_inb_priv_data *priv, uintptr_t data,
176 uint32_t win_sz)
177 {
178 struct cnxk_on_ipsec_ar *ar = &priv->ar;
179 uint64_t seq_in_sa;
180 uint32_t seqh = 0;
181 uint32_t seql;
182 uint64_t seq;
183 uint8_t esn;
184 int rc;
185
186 esn = sa->ctl.esn_en;
187 seql = rte_be_to_cpu_32(*((uint32_t *)(data + IPSEC_SQ_LO_IDX)));
188
189 if (!esn) {
190 seq = (uint64_t)seql;
191 } else {
192 seqh = rte_be_to_cpu_32(*((uint32_t *)(data +
193 IPSEC_SQ_HI_IDX)));
194 seq = ((uint64_t)seqh << 32) | seql;
195 }
196
197 if (unlikely(seq == 0))
198 return -1;
199
200 rte_spinlock_lock(&ar->lock);
201 rc = cnxk_on_anti_replay_check(seq, ar, win_sz);
202 if (esn && !rc) {
203 seq_in_sa = ((uint64_t)rte_be_to_cpu_32(sa->esn_hi) << 32) |
204 rte_be_to_cpu_32(sa->esn_low);
205 if (seq > seq_in_sa) {
206 sa->esn_low = rte_cpu_to_be_32(seql);
207 sa->esn_hi = rte_cpu_to_be_32(seqh);
208 }
209 }
210 rte_spinlock_unlock(&ar->lock);
211
212 return rc;
213 }
214
215 static inline uint64_t
nix_rx_sec_mbuf_err_update(const union nix_rx_parse_u * rx,uint16_t res,uint64_t * rearm_val,uint16_t * len)216 nix_rx_sec_mbuf_err_update(const union nix_rx_parse_u *rx, uint16_t res,
217 uint64_t *rearm_val, uint16_t *len)
218 {
219 uint8_t uc_cc = res >> 8;
220 uint8_t cc = res & 0xFF;
221 uint64_t data_off;
222 uint64_t ol_flags;
223 uint16_t m_len;
224
225 if (unlikely(cc != CPT_COMP_GOOD))
226 return RTE_MBUF_F_RX_SEC_OFFLOAD |
227 RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;
228
229 data_off = *rearm_val & (BIT_ULL(16) - 1);
230 m_len = rx->cn9k.pkt_lenm1 + 1;
231
232 switch (uc_cc) {
233 case ROC_IE_ON_UCC_IP_PAYLOAD_TYPE_ERR:
234 case ROC_IE_ON_UCC_AUTH_ERR:
235 case ROC_IE_ON_UCC_PADDING_INVALID:
236 /* Adjust data offset to start at copied L2 */
237 data_off += ROC_ONF_IPSEC_INB_SPI_SEQ_SZ +
238 ROC_ONF_IPSEC_INB_MAX_L2_SZ;
239 ol_flags = RTE_MBUF_F_RX_SEC_OFFLOAD |
240 RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;
241 break;
242 case ROC_IE_ON_UCC_CTX_INVALID:
243 case ROC_IE_ON_UCC_SPI_MISMATCH:
244 case ROC_IE_ON_UCC_SA_MISMATCH:
245 /* Return as normal packet */
246 ol_flags = 0;
247 break;
248 default:
249 /* Return as error packet after updating packet lengths */
250 ol_flags = RTE_MBUF_F_RX_SEC_OFFLOAD |
251 RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;
252 break;
253 }
254
255 *len = m_len;
256 *rearm_val = *rearm_val & ~(BIT_ULL(16) - 1);
257 *rearm_val |= data_off;
258 return ol_flags;
259 }
260
261 static __rte_always_inline uint64_t
nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s * cq,struct rte_mbuf * m,uintptr_t sa_base,uint64_t * rearm_val,uint16_t * len)262 nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m,
263 uintptr_t sa_base, uint64_t *rearm_val, uint16_t *len)
264 {
265 uintptr_t res_sg0 = ((uintptr_t)cq + ROC_ONF_IPSEC_INB_RES_OFF - 8);
266 const union nix_rx_parse_u *rx =
267 (const union nix_rx_parse_u *)((const uint64_t *)cq + 1);
268 struct cn9k_inb_priv_data *sa_priv;
269 struct roc_onf_ipsec_inb_sa *sa;
270 uint8_t lcptr = rx->lcptr;
271 struct rte_ipv4_hdr *ipv4;
272 uint16_t data_off, res;
273 uint32_t spi, win_sz;
274 uint32_t spi_mask;
275 uintptr_t data;
276 __uint128_t dw;
277 uint8_t sa_w;
278
279 res = *(uint64_t *)(res_sg0 + 8);
280 data_off = *rearm_val & (BIT_ULL(16) - 1);
281 data = (uintptr_t)m->buf_addr;
282 data += data_off;
283
284 rte_prefetch0((void *)data);
285
286 if (unlikely(res != (CPT_COMP_GOOD | ROC_IE_ON_UCC_SUCCESS << 8)))
287 return nix_rx_sec_mbuf_err_update(rx, res, rearm_val, len);
288
289 data += lcptr;
290 /* 20 bits of tag would have the SPI */
291 spi = cq->tag & CNXK_ETHDEV_SPI_TAG_MASK;
292
293 /* Get SA */
294 sa_w = sa_base & (ROC_NIX_INL_SA_BASE_ALIGN - 1);
295 sa_base &= ~(ROC_NIX_INL_SA_BASE_ALIGN - 1);
296 spi_mask = (1ULL << sa_w) - 1;
297 sa = roc_nix_inl_onf_ipsec_inb_sa(sa_base, spi & spi_mask);
298
299 /* Update dynamic field with userdata */
300 sa_priv = roc_nix_inl_onf_ipsec_inb_sa_sw_rsvd(sa);
301 dw = *(__uint128_t *)sa_priv;
302 *rte_security_dynfield(m) = (uint64_t)dw;
303
304 /* Check if anti-replay is enabled */
305 win_sz = (uint32_t)(dw >> 64);
306 if (win_sz) {
307 if (ipsec_antireplay_check(sa, sa_priv, data, win_sz) < 0)
308 return RTE_MBUF_F_RX_SEC_OFFLOAD | RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;
309 }
310
311 /* Get total length from IPv4 header. We can assume only IPv4 */
312 ipv4 = (struct rte_ipv4_hdr *)(data + ROC_ONF_IPSEC_INB_SPI_SEQ_SZ +
313 ROC_ONF_IPSEC_INB_MAX_L2_SZ);
314
315 /* Update data offset */
316 data_off += (ROC_ONF_IPSEC_INB_SPI_SEQ_SZ +
317 ROC_ONF_IPSEC_INB_MAX_L2_SZ);
318 *rearm_val = *rearm_val & ~(BIT_ULL(16) - 1);
319 *rearm_val |= data_off;
320
321 *len = rte_be_to_cpu_16(ipv4->total_length) + lcptr;
322 return RTE_MBUF_F_RX_SEC_OFFLOAD;
323 }
324
325 static __rte_always_inline void
cn9k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s * cq,const uint32_t tag,struct rte_mbuf * mbuf,const void * lookup_mem,uint64_t val,const uint16_t flag)326 cn9k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,
327 struct rte_mbuf *mbuf, const void *lookup_mem,
328 uint64_t val, const uint16_t flag)
329 {
330 const union nix_rx_parse_u *rx =
331 (const union nix_rx_parse_u *)((const uint64_t *)cq + 1);
332 uint16_t len = rx->cn9k.pkt_lenm1 + 1;
333 const uint64_t w1 = *(const uint64_t *)rx;
334 uint32_t packet_type;
335 uint64_t ol_flags = 0;
336
337 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
338 RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 1);
339
340 if (flag & NIX_RX_OFFLOAD_PTYPE_F)
341 packet_type = nix_ptype_get(lookup_mem, w1);
342 else
343 packet_type = 0;
344
345 if ((flag & NIX_RX_OFFLOAD_SECURITY_F) &&
346 cq->cqe_type == NIX_XQE_TYPE_RX_IPSECH) {
347 uint16_t port = val >> 48;
348 uintptr_t sa_base;
349
350 /* Get SA Base from lookup mem */
351 sa_base = cnxk_nix_sa_base_get(port, lookup_mem);
352
353 ol_flags |= nix_rx_sec_mbuf_update(cq, mbuf, sa_base, &val,
354 &len);
355
356 /* Only Tunnel inner IPv4 is supported */
357 packet_type = (packet_type &
358 ~(RTE_PTYPE_L3_MASK | RTE_PTYPE_TUNNEL_MASK));
359 packet_type |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
360 mbuf->packet_type = packet_type;
361 goto skip_parse;
362 }
363
364 if (flag & NIX_RX_OFFLOAD_PTYPE_F)
365 mbuf->packet_type = packet_type;
366
367 if (flag & NIX_RX_OFFLOAD_RSS_F) {
368 mbuf->hash.rss = tag;
369 ol_flags |= RTE_MBUF_F_RX_RSS_HASH;
370 }
371
372 if (flag & NIX_RX_OFFLOAD_CHECKSUM_F)
373 ol_flags |= nix_rx_olflags_get(lookup_mem, w1);
374
375 skip_parse:
376 if (flag & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
377 if (rx->cn9k.vtag0_gone) {
378 ol_flags |= RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED;
379 mbuf->vlan_tci = rx->cn9k.vtag0_tci;
380 }
381 if (rx->cn9k.vtag1_gone) {
382 ol_flags |= RTE_MBUF_F_RX_QINQ | RTE_MBUF_F_RX_QINQ_STRIPPED;
383 mbuf->vlan_tci_outer = rx->cn9k.vtag1_tci;
384 }
385 }
386
387 if (flag & NIX_RX_OFFLOAD_MARK_UPDATE_F)
388 ol_flags =
389 nix_update_match_id(rx->cn9k.match_id, ol_flags, mbuf);
390
391 mbuf->ol_flags = ol_flags;
392 *(uint64_t *)(&mbuf->rearm_data) = val;
393 mbuf->pkt_len = len;
394 mbuf->data_len = len;
395
396 if (flag & NIX_RX_MULTI_SEG_F)
397 /*
398 * For multi segment packets, mbuf length correction according
399 * to Rx timestamp length will be handled later during
400 * timestamp data process.
401 * Hence, flag argument is not required.
402 */
403 nix_cqe_xtract_mseg(rx, mbuf, val, 0);
404 else
405 mbuf->next = NULL;
406 }
407
408 static inline uint16_t
nix_rx_nb_pkts(struct cn9k_eth_rxq * rxq,const uint64_t wdata,const uint16_t pkts,const uint32_t qmask)409 nix_rx_nb_pkts(struct cn9k_eth_rxq *rxq, const uint64_t wdata,
410 const uint16_t pkts, const uint32_t qmask)
411 {
412 uint32_t available = rxq->available;
413
414 /* Update the available count if cached value is not enough */
415 if (unlikely(available < pkts)) {
416 uint64_t reg, head, tail;
417
418 /* Use LDADDA version to avoid reorder */
419 reg = roc_atomic64_add_sync(wdata, rxq->cq_status);
420 /* CQ_OP_STATUS operation error */
421 if (reg & BIT_ULL(NIX_CQ_OP_STAT_OP_ERR) ||
422 reg & BIT_ULL(NIX_CQ_OP_STAT_CQ_ERR))
423 return 0;
424
425 tail = reg & 0xFFFFF;
426 head = (reg >> 20) & 0xFFFFF;
427 if (tail < head)
428 available = tail - head + qmask + 1;
429 else
430 available = tail - head;
431
432 rxq->available = available;
433 }
434
435 return RTE_MIN(pkts, available);
436 }
437
438 static __rte_always_inline void
cn9k_nix_mbuf_to_tstamp(struct rte_mbuf * mbuf,struct cnxk_timesync_info * tstamp,const uint8_t ts_enable,uint64_t * tstamp_ptr)439 cn9k_nix_mbuf_to_tstamp(struct rte_mbuf *mbuf,
440 struct cnxk_timesync_info *tstamp,
441 const uint8_t ts_enable, uint64_t *tstamp_ptr)
442 {
443 if (ts_enable) {
444 mbuf->pkt_len -= CNXK_NIX_TIMESYNC_RX_OFFSET;
445 mbuf->data_len -= CNXK_NIX_TIMESYNC_RX_OFFSET;
446
447 /* Reading the rx timestamp inserted by CGX, viz at
448 * starting of the packet data.
449 */
450 *cnxk_nix_timestamp_dynfield(mbuf, tstamp) =
451 rte_be_to_cpu_64(*tstamp_ptr);
452 /* RTE_MBUF_F_RX_IEEE1588_TMST flag needs to be set only in case
453 * PTP packets are received.
454 */
455 if (mbuf->packet_type == RTE_PTYPE_L2_ETHER_TIMESYNC) {
456 tstamp->rx_tstamp =
457 *cnxk_nix_timestamp_dynfield(mbuf, tstamp);
458 tstamp->rx_ready = 1;
459 mbuf->ol_flags |= RTE_MBUF_F_RX_IEEE1588_PTP |
460 RTE_MBUF_F_RX_IEEE1588_TMST |
461 tstamp->rx_tstamp_dynflag;
462 }
463 }
464 }
465
466 static __rte_always_inline uint16_t
cn9k_nix_recv_pkts(void * rx_queue,struct rte_mbuf ** rx_pkts,uint16_t pkts,const uint16_t flags)467 cn9k_nix_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts,
468 const uint16_t flags)
469 {
470 struct cn9k_eth_rxq *rxq = rx_queue;
471 const uint64_t mbuf_init = rxq->mbuf_initializer;
472 const void *lookup_mem = rxq->lookup_mem;
473 const uint64_t data_off = rxq->data_off;
474 const uintptr_t desc = rxq->desc;
475 const uint64_t wdata = rxq->wdata;
476 const uint32_t qmask = rxq->qmask;
477 uint16_t packets = 0, nb_pkts;
478 uint32_t head = rxq->head;
479 struct nix_cqe_hdr_s *cq;
480 struct rte_mbuf *mbuf;
481
482 nb_pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
483
484 while (packets < nb_pkts) {
485 /* Prefetch N desc ahead */
486 rte_prefetch_non_temporal(
487 (void *)(desc + (CQE_SZ((head + 2) & qmask))));
488 cq = (struct nix_cqe_hdr_s *)(desc + CQE_SZ(head));
489
490 mbuf = nix_get_mbuf_from_cqe(cq, data_off);
491
492 cn9k_nix_cqe_to_mbuf(cq, cq->tag, mbuf, lookup_mem, mbuf_init,
493 flags);
494 cn9k_nix_mbuf_to_tstamp(mbuf, rxq->tstamp,
495 (flags & NIX_RX_OFFLOAD_TSTAMP_F),
496 (uint64_t *)((uint8_t *)mbuf
497 + data_off));
498 rx_pkts[packets++] = mbuf;
499 roc_prefetch_store_keep(mbuf);
500 head++;
501 head &= qmask;
502 }
503
504 rxq->head = head;
505 rxq->available -= nb_pkts;
506
507 /* Free all the CQs that we've processed */
508 plt_write64((wdata | nb_pkts), rxq->cq_door);
509
510 return nb_pkts;
511 }
512
513 #if defined(RTE_ARCH_ARM64)
514
515 static __rte_always_inline uint64_t
nix_vlan_update(const uint64_t w2,uint64_t ol_flags,uint8x16_t * f)516 nix_vlan_update(const uint64_t w2, uint64_t ol_flags, uint8x16_t *f)
517 {
518 if (w2 & BIT_ULL(21) /* vtag0_gone */) {
519 ol_flags |= RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED;
520 *f = vsetq_lane_u16((uint16_t)(w2 >> 32), *f, 5);
521 }
522
523 return ol_flags;
524 }
525
526 static __rte_always_inline uint64_t
nix_qinq_update(const uint64_t w2,uint64_t ol_flags,struct rte_mbuf * mbuf)527 nix_qinq_update(const uint64_t w2, uint64_t ol_flags, struct rte_mbuf *mbuf)
528 {
529 if (w2 & BIT_ULL(23) /* vtag1_gone */) {
530 ol_flags |= RTE_MBUF_F_RX_QINQ | RTE_MBUF_F_RX_QINQ_STRIPPED;
531 mbuf->vlan_tci_outer = (uint16_t)(w2 >> 48);
532 }
533
534 return ol_flags;
535 }
536
537 static __rte_always_inline uint16_t
cn9k_nix_recv_pkts_vector(void * rx_queue,struct rte_mbuf ** rx_pkts,uint16_t pkts,const uint16_t flags)538 cn9k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
539 uint16_t pkts, const uint16_t flags)
540 {
541 struct cn9k_eth_rxq *rxq = rx_queue;
542 uint16_t packets = 0;
543 uint64x2_t cq0_w8, cq1_w8, cq2_w8, cq3_w8, mbuf01, mbuf23;
544 const uint64_t mbuf_initializer = rxq->mbuf_initializer;
545 const uint64x2_t data_off = vdupq_n_u64(rxq->data_off);
546 uint64_t ol_flags0, ol_flags1, ol_flags2, ol_flags3;
547 uint64x2_t rearm0 = vdupq_n_u64(mbuf_initializer);
548 uint64x2_t rearm1 = vdupq_n_u64(mbuf_initializer);
549 uint64x2_t rearm2 = vdupq_n_u64(mbuf_initializer);
550 uint64x2_t rearm3 = vdupq_n_u64(mbuf_initializer);
551 struct rte_mbuf *mbuf0, *mbuf1, *mbuf2, *mbuf3;
552 const uint16_t *lookup_mem = rxq->lookup_mem;
553 const uint32_t qmask = rxq->qmask;
554 const uint64_t wdata = rxq->wdata;
555 const uintptr_t desc = rxq->desc;
556 uint8x16_t f0, f1, f2, f3;
557 uint32_t head = rxq->head;
558 uint16_t pkts_left;
559
560 pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
561 pkts_left = pkts & (NIX_DESCS_PER_LOOP - 1);
562
563 /* Packets has to be floor-aligned to NIX_DESCS_PER_LOOP */
564 pkts = RTE_ALIGN_FLOOR(pkts, NIX_DESCS_PER_LOOP);
565
566 while (packets < pkts) {
567 /* Exit loop if head is about to wrap and become unaligned */
568 if (((head + NIX_DESCS_PER_LOOP - 1) & qmask) <
569 NIX_DESCS_PER_LOOP) {
570 pkts_left += (pkts - packets);
571 break;
572 }
573
574 const uintptr_t cq0 = desc + CQE_SZ(head);
575
576 /* Prefetch N desc ahead */
577 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(8)));
578 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(9)));
579 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(10)));
580 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(11)));
581
582 /* Get NIX_RX_SG_S for size and buffer pointer */
583 cq0_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(0) + 64));
584 cq1_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(1) + 64));
585 cq2_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(2) + 64));
586 cq3_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(3) + 64));
587
588 /* Extract mbuf from NIX_RX_SG_S */
589 mbuf01 = vzip2q_u64(cq0_w8, cq1_w8);
590 mbuf23 = vzip2q_u64(cq2_w8, cq3_w8);
591 mbuf01 = vqsubq_u64(mbuf01, data_off);
592 mbuf23 = vqsubq_u64(mbuf23, data_off);
593
594 /* Move mbufs to scalar registers for future use */
595 mbuf0 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 0);
596 mbuf1 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 1);
597 mbuf2 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 0);
598 mbuf3 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 1);
599
600 /* Mask to get packet len from NIX_RX_SG_S */
601 const uint8x16_t shuf_msk = {
602 0xFF, 0xFF, /* pkt_type set as unknown */
603 0xFF, 0xFF, /* pkt_type set as unknown */
604 0, 1, /* octet 1~0, low 16 bits pkt_len */
605 0xFF, 0xFF, /* skip high 16 bits pkt_len, zero out */
606 0, 1, /* octet 1~0, 16 bits data_len */
607 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
608
609 /* Form the rx_descriptor_fields1 with pkt_len and data_len */
610 f0 = vqtbl1q_u8(cq0_w8, shuf_msk);
611 f1 = vqtbl1q_u8(cq1_w8, shuf_msk);
612 f2 = vqtbl1q_u8(cq2_w8, shuf_msk);
613 f3 = vqtbl1q_u8(cq3_w8, shuf_msk);
614
615 /* Load CQE word0 and word 1 */
616 uint64_t cq0_w0 = ((uint64_t *)(cq0 + CQE_SZ(0)))[0];
617 uint64_t cq0_w1 = ((uint64_t *)(cq0 + CQE_SZ(0)))[1];
618 uint64_t cq1_w0 = ((uint64_t *)(cq0 + CQE_SZ(1)))[0];
619 uint64_t cq1_w1 = ((uint64_t *)(cq0 + CQE_SZ(1)))[1];
620 uint64_t cq2_w0 = ((uint64_t *)(cq0 + CQE_SZ(2)))[0];
621 uint64_t cq2_w1 = ((uint64_t *)(cq0 + CQE_SZ(2)))[1];
622 uint64_t cq3_w0 = ((uint64_t *)(cq0 + CQE_SZ(3)))[0];
623 uint64_t cq3_w1 = ((uint64_t *)(cq0 + CQE_SZ(3)))[1];
624
625 if (flags & NIX_RX_OFFLOAD_RSS_F) {
626 /* Fill rss in the rx_descriptor_fields1 */
627 f0 = vsetq_lane_u32(cq0_w0, f0, 3);
628 f1 = vsetq_lane_u32(cq1_w0, f1, 3);
629 f2 = vsetq_lane_u32(cq2_w0, f2, 3);
630 f3 = vsetq_lane_u32(cq3_w0, f3, 3);
631 ol_flags0 = RTE_MBUF_F_RX_RSS_HASH;
632 ol_flags1 = RTE_MBUF_F_RX_RSS_HASH;
633 ol_flags2 = RTE_MBUF_F_RX_RSS_HASH;
634 ol_flags3 = RTE_MBUF_F_RX_RSS_HASH;
635 } else {
636 ol_flags0 = 0;
637 ol_flags1 = 0;
638 ol_flags2 = 0;
639 ol_flags3 = 0;
640 }
641
642 if (flags & NIX_RX_OFFLOAD_PTYPE_F) {
643 /* Fill packet_type in the rx_descriptor_fields1 */
644 f0 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq0_w1),
645 f0, 0);
646 f1 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq1_w1),
647 f1, 0);
648 f2 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq2_w1),
649 f2, 0);
650 f3 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq3_w1),
651 f3, 0);
652 }
653
654 if (flags & NIX_RX_OFFLOAD_CHECKSUM_F) {
655 ol_flags0 |= nix_rx_olflags_get(lookup_mem, cq0_w1);
656 ol_flags1 |= nix_rx_olflags_get(lookup_mem, cq1_w1);
657 ol_flags2 |= nix_rx_olflags_get(lookup_mem, cq2_w1);
658 ol_flags3 |= nix_rx_olflags_get(lookup_mem, cq3_w1);
659 }
660
661 if (flags & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
662 uint64_t cq0_w2 = *(uint64_t *)(cq0 + CQE_SZ(0) + 16);
663 uint64_t cq1_w2 = *(uint64_t *)(cq0 + CQE_SZ(1) + 16);
664 uint64_t cq2_w2 = *(uint64_t *)(cq0 + CQE_SZ(2) + 16);
665 uint64_t cq3_w2 = *(uint64_t *)(cq0 + CQE_SZ(3) + 16);
666
667 ol_flags0 = nix_vlan_update(cq0_w2, ol_flags0, &f0);
668 ol_flags1 = nix_vlan_update(cq1_w2, ol_flags1, &f1);
669 ol_flags2 = nix_vlan_update(cq2_w2, ol_flags2, &f2);
670 ol_flags3 = nix_vlan_update(cq3_w2, ol_flags3, &f3);
671
672 ol_flags0 = nix_qinq_update(cq0_w2, ol_flags0, mbuf0);
673 ol_flags1 = nix_qinq_update(cq1_w2, ol_flags1, mbuf1);
674 ol_flags2 = nix_qinq_update(cq2_w2, ol_flags2, mbuf2);
675 ol_flags3 = nix_qinq_update(cq3_w2, ol_flags3, mbuf3);
676 }
677
678 if (flags & NIX_RX_OFFLOAD_MARK_UPDATE_F) {
679 ol_flags0 = nix_update_match_id(
680 *(uint16_t *)(cq0 + CQE_SZ(0) + 38), ol_flags0,
681 mbuf0);
682 ol_flags1 = nix_update_match_id(
683 *(uint16_t *)(cq0 + CQE_SZ(1) + 38), ol_flags1,
684 mbuf1);
685 ol_flags2 = nix_update_match_id(
686 *(uint16_t *)(cq0 + CQE_SZ(2) + 38), ol_flags2,
687 mbuf2);
688 ol_flags3 = nix_update_match_id(
689 *(uint16_t *)(cq0 + CQE_SZ(3) + 38), ol_flags3,
690 mbuf3);
691 }
692
693 if (flags & NIX_RX_OFFLOAD_TSTAMP_F) {
694 const uint16x8_t len_off = {
695 0, /* ptype 0:15 */
696 0, /* ptype 16:32 */
697 CNXK_NIX_TIMESYNC_RX_OFFSET, /* pktlen 0:15*/
698 0, /* pktlen 16:32 */
699 CNXK_NIX_TIMESYNC_RX_OFFSET, /* datalen 0:15 */
700 0,
701 0,
702 0};
703 const uint32x4_t ptype = {RTE_PTYPE_L2_ETHER_TIMESYNC,
704 RTE_PTYPE_L2_ETHER_TIMESYNC,
705 RTE_PTYPE_L2_ETHER_TIMESYNC,
706 RTE_PTYPE_L2_ETHER_TIMESYNC};
707 const uint64_t ts_olf = RTE_MBUF_F_RX_IEEE1588_PTP |
708 RTE_MBUF_F_RX_IEEE1588_TMST |
709 rxq->tstamp->rx_tstamp_dynflag;
710 const uint32x4_t and_mask = {0x1, 0x2, 0x4, 0x8};
711 uint64x2_t ts01, ts23, mask;
712 uint64_t ts[4];
713 uint8_t res;
714
715 /* Subtract timesync length from total pkt length. */
716 f0 = vsubq_u16(f0, len_off);
717 f1 = vsubq_u16(f1, len_off);
718 f2 = vsubq_u16(f2, len_off);
719 f3 = vsubq_u16(f3, len_off);
720
721 /* Get the address of actual timestamp. */
722 ts01 = vaddq_u64(mbuf01, data_off);
723 ts23 = vaddq_u64(mbuf23, data_off);
724 /* Load timestamp from address. */
725 ts01 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts01,
726 0),
727 ts01, 0);
728 ts01 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts01,
729 1),
730 ts01, 1);
731 ts23 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts23,
732 0),
733 ts23, 0);
734 ts23 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts23,
735 1),
736 ts23, 1);
737 /* Convert from be to cpu byteorder. */
738 ts01 = vrev64q_u8(ts01);
739 ts23 = vrev64q_u8(ts23);
740 /* Store timestamp into scalar for later use. */
741 ts[0] = vgetq_lane_u64(ts01, 0);
742 ts[1] = vgetq_lane_u64(ts01, 1);
743 ts[2] = vgetq_lane_u64(ts23, 0);
744 ts[3] = vgetq_lane_u64(ts23, 1);
745
746 /* Store timestamp into dynfield. */
747 *cnxk_nix_timestamp_dynfield(mbuf0, rxq->tstamp) =
748 ts[0];
749 *cnxk_nix_timestamp_dynfield(mbuf1, rxq->tstamp) =
750 ts[1];
751 *cnxk_nix_timestamp_dynfield(mbuf2, rxq->tstamp) =
752 ts[2];
753 *cnxk_nix_timestamp_dynfield(mbuf3, rxq->tstamp) =
754 ts[3];
755
756 /* Generate ptype mask to filter L2 ether timesync */
757 mask = vdupq_n_u32(vgetq_lane_u32(f0, 0));
758 mask = vsetq_lane_u32(vgetq_lane_u32(f1, 0), mask, 1);
759 mask = vsetq_lane_u32(vgetq_lane_u32(f2, 0), mask, 2);
760 mask = vsetq_lane_u32(vgetq_lane_u32(f3, 0), mask, 3);
761
762 /* Match against L2 ether timesync. */
763 mask = vceqq_u32(mask, ptype);
764 /* Convert from vector from scalar mask */
765 res = vaddvq_u32(vandq_u32(mask, and_mask));
766 res &= 0xF;
767
768 if (res) {
769 /* Fill in the ol_flags for any packets that
770 * matched.
771 */
772 ol_flags0 |= ((res & 0x1) ? ts_olf : 0);
773 ol_flags1 |= ((res & 0x2) ? ts_olf : 0);
774 ol_flags2 |= ((res & 0x4) ? ts_olf : 0);
775 ol_flags3 |= ((res & 0x8) ? ts_olf : 0);
776
777 /* Update Rxq timestamp with the latest
778 * timestamp.
779 */
780 rxq->tstamp->rx_ready = 1;
781 rxq->tstamp->rx_tstamp =
782 ts[31 - __builtin_clz(res)];
783 }
784 }
785
786 /* Form rearm_data with ol_flags */
787 rearm0 = vsetq_lane_u64(ol_flags0, rearm0, 1);
788 rearm1 = vsetq_lane_u64(ol_flags1, rearm1, 1);
789 rearm2 = vsetq_lane_u64(ol_flags2, rearm2, 1);
790 rearm3 = vsetq_lane_u64(ol_flags3, rearm3, 1);
791
792 /* Update rx_descriptor_fields1 */
793 vst1q_u64((uint64_t *)mbuf0->rx_descriptor_fields1, f0);
794 vst1q_u64((uint64_t *)mbuf1->rx_descriptor_fields1, f1);
795 vst1q_u64((uint64_t *)mbuf2->rx_descriptor_fields1, f2);
796 vst1q_u64((uint64_t *)mbuf3->rx_descriptor_fields1, f3);
797
798 /* Update rearm_data */
799 vst1q_u64((uint64_t *)mbuf0->rearm_data, rearm0);
800 vst1q_u64((uint64_t *)mbuf1->rearm_data, rearm1);
801 vst1q_u64((uint64_t *)mbuf2->rearm_data, rearm2);
802 vst1q_u64((uint64_t *)mbuf3->rearm_data, rearm3);
803
804 if (flags & NIX_RX_MULTI_SEG_F) {
805 /* Multi segment is enable build mseg list for
806 * individual mbufs in scalar mode.
807 */
808 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
809 (cq0 + CQE_SZ(0) + 8), mbuf0,
810 mbuf_initializer, flags);
811 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
812 (cq0 + CQE_SZ(1) + 8), mbuf1,
813 mbuf_initializer, flags);
814 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
815 (cq0 + CQE_SZ(2) + 8), mbuf2,
816 mbuf_initializer, flags);
817 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
818 (cq0 + CQE_SZ(3) + 8), mbuf3,
819 mbuf_initializer, flags);
820 } else {
821 /* Update that no more segments */
822 mbuf0->next = NULL;
823 mbuf1->next = NULL;
824 mbuf2->next = NULL;
825 mbuf3->next = NULL;
826 }
827
828 /* Store the mbufs to rx_pkts */
829 vst1q_u64((uint64_t *)&rx_pkts[packets], mbuf01);
830 vst1q_u64((uint64_t *)&rx_pkts[packets + 2], mbuf23);
831
832 /* Prefetch mbufs */
833 roc_prefetch_store_keep(mbuf0);
834 roc_prefetch_store_keep(mbuf1);
835 roc_prefetch_store_keep(mbuf2);
836 roc_prefetch_store_keep(mbuf3);
837
838 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
839 RTE_MEMPOOL_CHECK_COOKIES(mbuf0->pool, (void **)&mbuf0, 1, 1);
840 RTE_MEMPOOL_CHECK_COOKIES(mbuf1->pool, (void **)&mbuf1, 1, 1);
841 RTE_MEMPOOL_CHECK_COOKIES(mbuf2->pool, (void **)&mbuf2, 1, 1);
842 RTE_MEMPOOL_CHECK_COOKIES(mbuf3->pool, (void **)&mbuf3, 1, 1);
843
844 /* Advance head pointer and packets */
845 head += NIX_DESCS_PER_LOOP;
846 head &= qmask;
847 packets += NIX_DESCS_PER_LOOP;
848 }
849
850 rxq->head = head;
851 rxq->available -= packets;
852
853 rte_io_wmb();
854 /* Free all the CQs that we've processed */
855 plt_write64((rxq->wdata | packets), rxq->cq_door);
856
857 if (unlikely(pkts_left))
858 packets += cn9k_nix_recv_pkts(rx_queue, &rx_pkts[packets],
859 pkts_left, flags);
860
861 return packets;
862 }
863
864 #else
865
866 static inline uint16_t
cn9k_nix_recv_pkts_vector(void * rx_queue,struct rte_mbuf ** rx_pkts,uint16_t pkts,const uint16_t flags)867 cn9k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
868 uint16_t pkts, const uint16_t flags)
869 {
870 RTE_SET_USED(rx_queue);
871 RTE_SET_USED(rx_pkts);
872 RTE_SET_USED(pkts);
873 RTE_SET_USED(flags);
874
875 return 0;
876 }
877
878 #endif
879
880 #define RSS_F NIX_RX_OFFLOAD_RSS_F
881 #define PTYPE_F NIX_RX_OFFLOAD_PTYPE_F
882 #define CKSUM_F NIX_RX_OFFLOAD_CHECKSUM_F
883 #define MARK_F NIX_RX_OFFLOAD_MARK_UPDATE_F
884 #define TS_F NIX_RX_OFFLOAD_TSTAMP_F
885 #define RX_VLAN_F NIX_RX_OFFLOAD_VLAN_STRIP_F
886 #define R_SEC_F NIX_RX_OFFLOAD_SECURITY_F
887
888 /* [R_SEC_F] [RX_VLAN_F] [TS] [MARK] [CKSUM] [PTYPE] [RSS] */
889 #define NIX_RX_FASTPATH_MODES_0_15 \
890 R(no_offload, NIX_RX_OFFLOAD_NONE) \
891 R(rss, RSS_F) \
892 R(ptype, PTYPE_F) \
893 R(ptype_rss, PTYPE_F | RSS_F) \
894 R(cksum, CKSUM_F) \
895 R(cksum_rss, CKSUM_F | RSS_F) \
896 R(cksum_ptype, CKSUM_F | PTYPE_F) \
897 R(cksum_ptype_rss, CKSUM_F | PTYPE_F | RSS_F) \
898 R(mark, MARK_F) \
899 R(mark_rss, MARK_F | RSS_F) \
900 R(mark_ptype, MARK_F | PTYPE_F) \
901 R(mark_ptype_rss, MARK_F | PTYPE_F | RSS_F) \
902 R(mark_cksum, MARK_F | CKSUM_F) \
903 R(mark_cksum_rss, MARK_F | CKSUM_F | RSS_F) \
904 R(mark_cksum_ptype, MARK_F | CKSUM_F | PTYPE_F) \
905 R(mark_cksum_ptype_rss, MARK_F | CKSUM_F | PTYPE_F | RSS_F)
906
907 #define NIX_RX_FASTPATH_MODES_16_31 \
908 R(ts, TS_F) \
909 R(ts_rss, TS_F | RSS_F) \
910 R(ts_ptype, TS_F | PTYPE_F) \
911 R(ts_ptype_rss, TS_F | PTYPE_F | RSS_F) \
912 R(ts_cksum, TS_F | CKSUM_F) \
913 R(ts_cksum_rss, TS_F | CKSUM_F | RSS_F) \
914 R(ts_cksum_ptype, TS_F | CKSUM_F | PTYPE_F) \
915 R(ts_cksum_ptype_rss, TS_F | CKSUM_F | PTYPE_F | RSS_F) \
916 R(ts_mark, TS_F | MARK_F) \
917 R(ts_mark_rss, TS_F | MARK_F | RSS_F) \
918 R(ts_mark_ptype, TS_F | MARK_F | PTYPE_F) \
919 R(ts_mark_ptype_rss, TS_F | MARK_F | PTYPE_F | RSS_F) \
920 R(ts_mark_cksum, TS_F | MARK_F | CKSUM_F) \
921 R(ts_mark_cksum_rss, TS_F | MARK_F | CKSUM_F | RSS_F) \
922 R(ts_mark_cksum_ptype, TS_F | MARK_F | CKSUM_F | PTYPE_F) \
923 R(ts_mark_cksum_ptype_rss, TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
924
925 #define NIX_RX_FASTPATH_MODES_32_47 \
926 R(vlan, RX_VLAN_F) \
927 R(vlan_rss, RX_VLAN_F | RSS_F) \
928 R(vlan_ptype, RX_VLAN_F | PTYPE_F) \
929 R(vlan_ptype_rss, RX_VLAN_F | PTYPE_F | RSS_F) \
930 R(vlan_cksum, RX_VLAN_F | CKSUM_F) \
931 R(vlan_cksum_rss, RX_VLAN_F | CKSUM_F | RSS_F) \
932 R(vlan_cksum_ptype, RX_VLAN_F | CKSUM_F | PTYPE_F) \
933 R(vlan_cksum_ptype_rss, RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
934 R(vlan_mark, RX_VLAN_F | MARK_F) \
935 R(vlan_mark_rss, RX_VLAN_F | MARK_F | RSS_F) \
936 R(vlan_mark_ptype, RX_VLAN_F | MARK_F | PTYPE_F) \
937 R(vlan_mark_ptype_rss, RX_VLAN_F | MARK_F | PTYPE_F | RSS_F) \
938 R(vlan_mark_cksum, RX_VLAN_F | MARK_F | CKSUM_F) \
939 R(vlan_mark_cksum_rss, RX_VLAN_F | MARK_F | CKSUM_F | RSS_F) \
940 R(vlan_mark_cksum_ptype, RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F) \
941 R(vlan_mark_cksum_ptype_rss, \
942 RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
943
944 #define NIX_RX_FASTPATH_MODES_48_63 \
945 R(vlan_ts, RX_VLAN_F | TS_F) \
946 R(vlan_ts_rss, RX_VLAN_F | TS_F | RSS_F) \
947 R(vlan_ts_ptype, RX_VLAN_F | TS_F | PTYPE_F) \
948 R(vlan_ts_ptype_rss, RX_VLAN_F | TS_F | PTYPE_F | RSS_F) \
949 R(vlan_ts_cksum, RX_VLAN_F | TS_F | CKSUM_F) \
950 R(vlan_ts_cksum_rss, RX_VLAN_F | TS_F | CKSUM_F | RSS_F) \
951 R(vlan_ts_cksum_ptype, RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F) \
952 R(vlan_ts_cksum_ptype_rss, \
953 RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \
954 R(vlan_ts_mark, RX_VLAN_F | TS_F | MARK_F) \
955 R(vlan_ts_mark_rss, RX_VLAN_F | TS_F | MARK_F | RSS_F) \
956 R(vlan_ts_mark_ptype, RX_VLAN_F | TS_F | MARK_F | PTYPE_F) \
957 R(vlan_ts_mark_ptype_rss, RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
958 R(vlan_ts_mark_cksum, RX_VLAN_F | TS_F | MARK_F | CKSUM_F) \
959 R(vlan_ts_mark_cksum_rss, RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
960 R(vlan_ts_mark_cksum_ptype, \
961 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \
962 R(vlan_ts_mark_cksum_ptype_rss, \
963 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
964
965 #define NIX_RX_FASTPATH_MODES_64_79 \
966 R(sec, R_SEC_F) \
967 R(sec_rss, R_SEC_F | RSS_F) \
968 R(sec_ptype, R_SEC_F | PTYPE_F) \
969 R(sec_ptype_rss, R_SEC_F | PTYPE_F | RSS_F) \
970 R(sec_cksum, R_SEC_F | CKSUM_F) \
971 R(sec_cksum_rss, R_SEC_F | CKSUM_F | RSS_F) \
972 R(sec_cksum_ptype, R_SEC_F | CKSUM_F | PTYPE_F) \
973 R(sec_cksum_ptype_rss, R_SEC_F | CKSUM_F | PTYPE_F | RSS_F) \
974 R(sec_mark, R_SEC_F | MARK_F) \
975 R(sec_mark_rss, R_SEC_F | MARK_F | RSS_F) \
976 R(sec_mark_ptype, R_SEC_F | MARK_F | PTYPE_F) \
977 R(sec_mark_ptype_rss, R_SEC_F | MARK_F | PTYPE_F | RSS_F) \
978 R(sec_mark_cksum, R_SEC_F | MARK_F | CKSUM_F) \
979 R(sec_mark_cksum_rss, R_SEC_F | MARK_F | CKSUM_F | RSS_F) \
980 R(sec_mark_cksum_ptype, R_SEC_F | MARK_F | CKSUM_F | PTYPE_F) \
981 R(sec_mark_cksum_ptype_rss, \
982 R_SEC_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
983
984 #define NIX_RX_FASTPATH_MODES_80_95 \
985 R(sec_ts, R_SEC_F | TS_F) \
986 R(sec_ts_rss, R_SEC_F | TS_F | RSS_F) \
987 R(sec_ts_ptype, R_SEC_F | TS_F | PTYPE_F) \
988 R(sec_ts_ptype_rss, R_SEC_F | TS_F | PTYPE_F | RSS_F) \
989 R(sec_ts_cksum, R_SEC_F | TS_F | CKSUM_F) \
990 R(sec_ts_cksum_rss, R_SEC_F | TS_F | CKSUM_F | RSS_F) \
991 R(sec_ts_cksum_ptype, R_SEC_F | TS_F | CKSUM_F | PTYPE_F) \
992 R(sec_ts_cksum_ptype_rss, R_SEC_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \
993 R(sec_ts_mark, R_SEC_F | TS_F | MARK_F) \
994 R(sec_ts_mark_rss, R_SEC_F | TS_F | MARK_F | RSS_F) \
995 R(sec_ts_mark_ptype, R_SEC_F | TS_F | MARK_F | PTYPE_F) \
996 R(sec_ts_mark_ptype_rss, R_SEC_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
997 R(sec_ts_mark_cksum, R_SEC_F | TS_F | MARK_F | CKSUM_F) \
998 R(sec_ts_mark_cksum_rss, R_SEC_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
999 R(sec_ts_mark_cksum_ptype, \
1000 R_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \
1001 R(sec_ts_mark_cksum_ptype_rss, \
1002 R_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1003
1004 #define NIX_RX_FASTPATH_MODES_96_111 \
1005 R(sec_vlan, R_SEC_F | RX_VLAN_F) \
1006 R(sec_vlan_rss, R_SEC_F | RX_VLAN_F | RSS_F) \
1007 R(sec_vlan_ptype, R_SEC_F | RX_VLAN_F | PTYPE_F) \
1008 R(sec_vlan_ptype_rss, R_SEC_F | RX_VLAN_F | PTYPE_F | RSS_F) \
1009 R(sec_vlan_cksum, R_SEC_F | RX_VLAN_F | CKSUM_F) \
1010 R(sec_vlan_cksum_rss, R_SEC_F | RX_VLAN_F | CKSUM_F | RSS_F) \
1011 R(sec_vlan_cksum_ptype, R_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F) \
1012 R(sec_vlan_cksum_ptype_rss, \
1013 R_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
1014 R(sec_vlan_mark, R_SEC_F | RX_VLAN_F | MARK_F) \
1015 R(sec_vlan_mark_rss, R_SEC_F | RX_VLAN_F | MARK_F | RSS_F) \
1016 R(sec_vlan_mark_ptype, R_SEC_F | RX_VLAN_F | MARK_F | PTYPE_F) \
1017 R(sec_vlan_mark_ptype_rss, \
1018 R_SEC_F | RX_VLAN_F | MARK_F | PTYPE_F | RSS_F) \
1019 R(sec_vlan_mark_cksum, R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F) \
1020 R(sec_vlan_mark_cksum_rss, \
1021 R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | RSS_F) \
1022 R(sec_vlan_mark_cksum_ptype, \
1023 R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F) \
1024 R(sec_vlan_mark_cksum_ptype_rss, \
1025 R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1026
1027 #define NIX_RX_FASTPATH_MODES_112_127 \
1028 R(sec_vlan_ts, R_SEC_F | RX_VLAN_F | TS_F) \
1029 R(sec_vlan_ts_rss, R_SEC_F | RX_VLAN_F | TS_F | RSS_F) \
1030 R(sec_vlan_ts_ptype, R_SEC_F | RX_VLAN_F | TS_F | PTYPE_F) \
1031 R(sec_vlan_ts_ptype_rss, R_SEC_F | RX_VLAN_F | TS_F | PTYPE_F | RSS_F) \
1032 R(sec_vlan_ts_cksum, R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F) \
1033 R(sec_vlan_ts_cksum_rss, R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | RSS_F) \
1034 R(sec_vlan_ts_cksum_ptype, \
1035 R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F) \
1036 R(sec_vlan_ts_cksum_ptype_rss, \
1037 R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \
1038 R(sec_vlan_ts_mark, R_SEC_F | RX_VLAN_F | TS_F | MARK_F) \
1039 R(sec_vlan_ts_mark_rss, R_SEC_F | RX_VLAN_F | TS_F | MARK_F | RSS_F) \
1040 R(sec_vlan_ts_mark_ptype, \
1041 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F) \
1042 R(sec_vlan_ts_mark_ptype_rss, \
1043 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
1044 R(sec_vlan_ts_mark_cksum, \
1045 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F) \
1046 R(sec_vlan_ts_mark_cksum_rss, \
1047 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
1048 R(sec_vlan_ts_mark_cksum_ptype, \
1049 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \
1050 R(sec_vlan_ts_mark_cksum_ptype_rss, \
1051 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1052
1053 #define NIX_RX_FASTPATH_MODES \
1054 NIX_RX_FASTPATH_MODES_0_15 \
1055 NIX_RX_FASTPATH_MODES_16_31 \
1056 NIX_RX_FASTPATH_MODES_32_47 \
1057 NIX_RX_FASTPATH_MODES_48_63 \
1058 NIX_RX_FASTPATH_MODES_64_79 \
1059 NIX_RX_FASTPATH_MODES_80_95 \
1060 NIX_RX_FASTPATH_MODES_96_111 \
1061 NIX_RX_FASTPATH_MODES_112_127
1062
1063 #define R(name, flags) \
1064 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_##name( \
1065 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
1066 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_mseg_##name( \
1067 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
1068 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_vec_##name( \
1069 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
1070 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_vec_mseg_##name( \
1071 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);
1072
1073 NIX_RX_FASTPATH_MODES
1074 #undef R
1075
1076 #define NIX_RX_RECV(fn, flags) \
1077 uint16_t __rte_noinline __rte_hot fn( \
1078 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \
1079 { \
1080 return cn9k_nix_recv_pkts(rx_queue, rx_pkts, pkts, (flags)); \
1081 }
1082
1083 #define NIX_RX_RECV_MSEG(fn, flags) NIX_RX_RECV(fn, flags | NIX_RX_MULTI_SEG_F)
1084
1085 #define NIX_RX_RECV_VEC(fn, flags) \
1086 uint16_t __rte_noinline __rte_hot fn( \
1087 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \
1088 { \
1089 return cn9k_nix_recv_pkts_vector(rx_queue, rx_pkts, pkts, \
1090 (flags)); \
1091 }
1092
1093 #define NIX_RX_RECV_VEC_MSEG(fn, flags) \
1094 NIX_RX_RECV_VEC(fn, flags | NIX_RX_MULTI_SEG_F)
1095
1096 #endif /* __CN9K_RX_H__ */
1097