1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
3 */
4
5 #ifndef __CN10K_IPSEC_LA_OPS_H__
6 #define __CN10K_IPSEC_LA_OPS_H__
7
8 #include <rte_crypto_sym.h>
9 #include <rte_security.h>
10
11 #include "cn10k_cryptodev.h"
12 #include "cn10k_ipsec.h"
13 #include "cnxk_cryptodev.h"
14
15 static inline void
ipsec_po_sa_iv_set(struct cn10k_ipsec_sa * sess,struct rte_crypto_op * cop)16 ipsec_po_sa_iv_set(struct cn10k_ipsec_sa *sess, struct rte_crypto_op *cop)
17 {
18 uint64_t *iv = &sess->out_sa.iv.u64[0];
19 uint64_t *tmp_iv;
20
21 memcpy(iv, rte_crypto_op_ctod_offset(cop, uint8_t *, sess->iv_offset),
22 16);
23 tmp_iv = (uint64_t *)iv;
24 *tmp_iv = rte_be_to_cpu_64(*tmp_iv);
25
26 tmp_iv = (uint64_t *)(iv + 1);
27 *tmp_iv = rte_be_to_cpu_64(*tmp_iv);
28 }
29
30 static inline void
ipsec_po_sa_aes_gcm_iv_set(struct cn10k_ipsec_sa * sess,struct rte_crypto_op * cop)31 ipsec_po_sa_aes_gcm_iv_set(struct cn10k_ipsec_sa *sess,
32 struct rte_crypto_op *cop)
33 {
34 uint8_t *iv = &sess->out_sa.iv.s.iv_dbg1[0];
35 uint32_t *tmp_iv;
36
37 memcpy(iv, rte_crypto_op_ctod_offset(cop, uint8_t *, sess->iv_offset),
38 4);
39 tmp_iv = (uint32_t *)iv;
40 *tmp_iv = rte_be_to_cpu_32(*tmp_iv);
41
42 iv = &sess->out_sa.iv.s.iv_dbg2[0];
43 memcpy(iv,
44 rte_crypto_op_ctod_offset(cop, uint8_t *, sess->iv_offset + 4),
45 4);
46 tmp_iv = (uint32_t *)iv;
47 *tmp_iv = rte_be_to_cpu_32(*tmp_iv);
48 }
49
50 static __rte_always_inline int
process_outb_sa(struct roc_cpt_lf * lf,struct rte_crypto_op * cop,struct cn10k_ipsec_sa * sess,struct cpt_inst_s * inst)51 process_outb_sa(struct roc_cpt_lf *lf, struct rte_crypto_op *cop,
52 struct cn10k_ipsec_sa *sess, struct cpt_inst_s *inst)
53 {
54 struct rte_crypto_sym_op *sym_op = cop->sym;
55 struct rte_mbuf *m_src = sym_op->m_src;
56 uint64_t inst_w4_u64 = sess->inst.w4;
57 uint64_t dptr;
58
59 if (unlikely(rte_pktmbuf_tailroom(m_src) < sess->max_extended_len)) {
60 plt_dp_err("Not enough tail room");
61 return -ENOMEM;
62 }
63
64 RTE_SET_USED(lf);
65
66 #ifdef LA_IPSEC_DEBUG
67 if (sess->out_sa.w2.s.iv_src == ROC_IE_OT_SA_IV_SRC_FROM_SA) {
68 if (sess->out_sa.w2.s.enc_type == ROC_IE_OT_SA_ENC_AES_GCM ||
69 sess->out_sa.w2.s.auth_type == ROC_IE_OT_SA_AUTH_AES_GMAC)
70 ipsec_po_sa_aes_gcm_iv_set(sess, cop);
71 else
72 ipsec_po_sa_iv_set(sess, cop);
73 }
74
75 /* Trigger CTX reload to fetch new data from DRAM */
76 roc_cpt_lf_ctx_reload(lf, &sess->out_sa);
77 rte_delay_ms(1);
78 #endif
79
80 if (m_src->ol_flags & RTE_MBUF_F_TX_IP_CKSUM)
81 inst_w4_u64 &= ~BIT_ULL(33);
82
83 if (m_src->ol_flags & RTE_MBUF_F_TX_L4_MASK)
84 inst_w4_u64 &= ~BIT_ULL(32);
85
86 /* Prepare CPT instruction */
87 inst->w4.u64 = inst_w4_u64 | rte_pktmbuf_pkt_len(m_src);
88 dptr = rte_pktmbuf_iova(m_src);
89 inst->dptr = dptr;
90 inst->rptr = dptr;
91
92 return 0;
93 }
94
95 static __rte_always_inline int
process_inb_sa(struct rte_crypto_op * cop,struct cn10k_ipsec_sa * sa,struct cpt_inst_s * inst)96 process_inb_sa(struct rte_crypto_op *cop, struct cn10k_ipsec_sa *sa,
97 struct cpt_inst_s *inst)
98 {
99 struct rte_crypto_sym_op *sym_op = cop->sym;
100 struct rte_mbuf *m_src = sym_op->m_src;
101 uint64_t dptr;
102
103 /* Prepare CPT instruction */
104 inst->w4.u64 = sa->inst.w4 | rte_pktmbuf_pkt_len(m_src);
105 dptr = rte_pktmbuf_iova(m_src);
106 inst->dptr = dptr;
107 inst->rptr = dptr;
108
109 return 0;
110 }
111
112 #endif /* __CN10K_IPSEC_LA_OPS_H__ */
113