xref: /f-stack/freebsd/mips/include/cache_mipsNN.h (revision 22ce4aff)
1 /*	$NetBSD: cache_mipsNN.h,v 1.4 2003/02/17 11:35:02 simonb Exp $	*/
2 
3 /*-
4  * SPDX-License-Identifier: BSD-4-Clause
5  *
6  * Copyright 2002 Wasabi Systems, Inc.
7  * All rights reserved.
8  *
9  * Written by Simon Burge for Wasabi Systems, Inc.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed for the NetBSD Project by
22  *	Wasabi Systems, Inc.
23  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
24  *    or promote products derived from this software without specific prior
25  *    written permission.
26  *
27  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
28  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGE.
38  *
39  * $FreeBSD$
40  */
41 #ifndef	_MACHINE_CACHE_MIPSNN_H_
42 #define	_MACHINE_CACHE_MIPSNN_H_
43 
44 void	mipsNN_cache_init(struct mips_cpuinfo *);
45 
46 void	mipsNN_icache_sync_all_16(void);
47 void	mipsNN_icache_sync_all_32(void);
48 void	mipsNN_icache_sync_all_64(void);
49 void	mipsNN_icache_sync_all_128(void);
50 void	mipsNN_icache_sync_range_16(vm_offset_t, vm_size_t);
51 void	mipsNN_icache_sync_range_32(vm_offset_t, vm_size_t);
52 void	mipsNN_icache_sync_range_64(vm_offset_t, vm_size_t);
53 void	mipsNN_icache_sync_range_128(vm_offset_t, vm_size_t);
54 void	mipsNN_icache_sync_range_index_16(vm_offset_t, vm_size_t);
55 void	mipsNN_icache_sync_range_index_32(vm_offset_t, vm_size_t);
56 void	mipsNN_icache_sync_range_index_64(vm_offset_t, vm_size_t);
57 void	mipsNN_icache_sync_range_index_128(vm_offset_t, vm_size_t);
58 void	mipsNN_pdcache_wbinv_all_16(void);
59 void	mipsNN_pdcache_wbinv_all_32(void);
60 void	mipsNN_pdcache_wbinv_all_64(void);
61 void	mipsNN_pdcache_wbinv_all_128(void);
62 void	mipsNN_pdcache_wbinv_range_16(vm_offset_t, vm_size_t);
63 void	mipsNN_pdcache_wbinv_range_32(vm_offset_t, vm_size_t);
64 void	mipsNN_pdcache_wbinv_range_64(vm_offset_t, vm_size_t);
65 void	mipsNN_pdcache_wbinv_range_128(vm_offset_t, vm_size_t);
66 void	mipsNN_pdcache_wbinv_range_index_16(vm_offset_t, vm_size_t);
67 void	mipsNN_pdcache_wbinv_range_index_32(vm_offset_t, vm_size_t);
68 void	mipsNN_pdcache_wbinv_range_index_64(vm_offset_t, vm_size_t);
69 void	mipsNN_pdcache_wbinv_range_index_128(vm_offset_t, vm_size_t);
70 void	mipsNN_pdcache_inv_range_16(vm_offset_t, vm_size_t);
71 void	mipsNN_pdcache_inv_range_32(vm_offset_t, vm_size_t);
72 void	mipsNN_pdcache_inv_range_64(vm_offset_t, vm_size_t);
73 void	mipsNN_pdcache_inv_range_128(vm_offset_t, vm_size_t);
74 void	mipsNN_pdcache_wb_range_16(vm_offset_t, vm_size_t);
75 void	mipsNN_pdcache_wb_range_32(vm_offset_t, vm_size_t);
76 void	mipsNN_pdcache_wb_range_64(vm_offset_t, vm_size_t);
77 void	mipsNN_pdcache_wb_range_128(vm_offset_t, vm_size_t);
78 void	mipsNN_sdcache_wbinv_all_32(void);
79 void	mipsNN_sdcache_wbinv_all_64(void);
80 void	mipsNN_sdcache_wbinv_all_128(void);
81 void	mipsNN_sdcache_wbinv_range_32(vm_offset_t, vm_size_t);
82 void	mipsNN_sdcache_wbinv_range_64(vm_offset_t, vm_size_t);
83 void	mipsNN_sdcache_wbinv_range_128(vm_offset_t, vm_size_t);
84 void	mipsNN_sdcache_wbinv_range_index_32(vm_offset_t, vm_size_t);
85 void	mipsNN_sdcache_wbinv_range_index_64(vm_offset_t, vm_size_t);
86 void	mipsNN_sdcache_wbinv_range_index_128(vm_offset_t, vm_size_t);
87 void	mipsNN_sdcache_inv_range_32(vm_offset_t, vm_size_t);
88 void	mipsNN_sdcache_inv_range_64(vm_offset_t, vm_size_t);
89 void	mipsNN_sdcache_inv_range_128(vm_offset_t, vm_size_t);
90 void	mipsNN_sdcache_wb_range_32(vm_offset_t, vm_size_t);
91 void	mipsNN_sdcache_wb_range_64(vm_offset_t, vm_size_t);
92 void	mipsNN_sdcache_wb_range_128(vm_offset_t, vm_size_t);
93 
94 #endif	/* _MACHINE_CACHE_MIPSNN_H_ */
95