1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2014-2018 Broadcom 3 * All rights reserved. 4 */ 5 6 #ifndef _BNXT_FILTER_H_ 7 #define _BNXT_FILTER_H_ 8 9 #include <rte_ether.h> 10 11 #define bnxt_vlan_filter_exists(bp, filter, chk, vlan_id) \ 12 (((filter)->enables & (chk)) && \ 13 ((filter)->l2_ivlan == (vlan_id) && \ 14 (filter)->l2_ivlan_mask == 0x0FFF) && \ 15 !memcmp((filter)->l2_addr, (bp)->mac_addr, \ 16 RTE_ETHER_ADDR_LEN)) 17 struct bnxt; 18 19 #define BNXT_FLOW_L2_VALID_FLAG BIT(0) 20 #define BNXT_FLOW_L2_SRC_VALID_FLAG BIT(1) 21 #define BNXT_FLOW_L2_INNER_SRC_VALID_FLAG BIT(2) 22 #define BNXT_FLOW_L2_DST_VALID_FLAG BIT(3) 23 #define BNXT_FLOW_L2_INNER_DST_VALID_FLAG BIT(4) 24 #define BNXT_FLOW_L2_DROP_FLAG BIT(5) 25 #define BNXT_FLOW_PARSE_INNER_FLAG BIT(6) 26 #define BNXT_FLOW_MARK_FLAG BIT(7) 27 28 struct bnxt_flow_stats { 29 uint64_t packets; 30 uint64_t bytes; 31 }; 32 33 struct bnxt_filter_info { 34 STAILQ_ENTRY(bnxt_filter_info) next; 35 uint32_t flow_id; 36 uint64_t fw_l2_filter_id; 37 struct bnxt_filter_info *matching_l2_fltr_ptr; 38 uint64_t fw_em_filter_id; 39 uint64_t fw_ntuple_filter_id; 40 #define INVALID_MAC_INDEX ((uint16_t)-1) 41 uint16_t mac_index; 42 #define HWRM_CFA_L2_FILTER 0 43 #define HWRM_CFA_EM_FILTER 1 44 #define HWRM_CFA_NTUPLE_FILTER 2 45 #define HWRM_CFA_TUNNEL_REDIRECT_FILTER 3 46 uint8_t filter_type; 47 uint32_t dst_id; 48 49 /* Filter Characteristics */ 50 uint32_t flags; 51 uint32_t enables; 52 uint32_t l2_ref_cnt; 53 uint8_t l2_addr[RTE_ETHER_ADDR_LEN]; 54 uint8_t l2_addr_mask[RTE_ETHER_ADDR_LEN]; 55 uint32_t valid_flags; 56 uint16_t l2_ovlan; 57 uint16_t l2_ovlan_mask; 58 uint16_t l2_ivlan; 59 uint16_t l2_ivlan_mask; 60 uint8_t t_l2_addr[RTE_ETHER_ADDR_LEN]; 61 uint8_t t_l2_addr_mask[RTE_ETHER_ADDR_LEN]; 62 uint16_t t_l2_ovlan; 63 uint16_t t_l2_ovlan_mask; 64 uint16_t t_l2_ivlan; 65 uint16_t t_l2_ivlan_mask; 66 uint8_t tunnel_type; 67 uint16_t mirror_vnic_id; 68 uint32_t vni; 69 uint8_t pri_hint; 70 uint64_t l2_filter_id_hint; 71 uint32_t src_id; 72 uint8_t src_type; 73 uint8_t src_macaddr[6]; 74 uint8_t dst_macaddr[6]; 75 uint32_t dst_ipaddr[4]; 76 uint32_t dst_ipaddr_mask[4]; 77 uint32_t src_ipaddr[4]; 78 uint32_t src_ipaddr_mask[4]; 79 uint16_t dst_port; 80 uint16_t dst_port_mask; 81 uint16_t src_port; 82 uint16_t src_port_mask; 83 uint16_t ip_protocol; 84 uint16_t ip_addr_type; 85 uint16_t ethertype; 86 uint32_t priority; 87 /* Backptr to vnic. As of now, used only by an L2 filter 88 * to remember which vnic it was created on 89 */ 90 struct bnxt_vnic_info *vnic; 91 uint32_t mark; 92 struct bnxt_flow_stats hw_stats; 93 }; 94 95 struct bnxt_filter_info *bnxt_alloc_filter(struct bnxt *bp); 96 struct bnxt_filter_info *bnxt_alloc_vf_filter(struct bnxt *bp, uint16_t vf); 97 void bnxt_free_all_filters(struct bnxt *bp); 98 void bnxt_free_filter_mem(struct bnxt *bp); 99 int bnxt_alloc_filter_mem(struct bnxt *bp); 100 struct bnxt_filter_info *bnxt_get_unused_filter(struct bnxt *bp); 101 void bnxt_free_filter(struct bnxt *bp, struct bnxt_filter_info *filter); 102 struct bnxt_filter_info *bnxt_get_l2_filter(struct bnxt *bp, 103 struct bnxt_filter_info *nf, struct bnxt_vnic_info *vnic); 104 105 #define NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_MACADDR \ 106 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_MACADDR 107 #define EM_FLOW_ALLOC_INPUT_EN_SRC_MACADDR \ 108 HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_MACADDR 109 #define NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR \ 110 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_MACADDR 111 #define EM_FLOW_ALLOC_INPUT_EN_DST_MACADDR \ 112 HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_MACADDR 113 #define NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE \ 114 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_ETHERTYPE 115 #define EM_FLOW_ALLOC_INPUT_EN_ETHERTYPE \ 116 HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_ETHERTYPE 117 #define EM_FLOW_ALLOC_INPUT_EN_OVLAN_VID \ 118 HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_OVLAN_VID 119 #define NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR \ 120 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_IPADDR 121 #define NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK \ 122 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_IPADDR_MASK 123 #define NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR \ 124 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_IPADDR 125 #define NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK \ 126 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_IPADDR_MASK 127 #define NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT \ 128 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_PORT 129 #define NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK \ 130 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_PORT_MASK 131 #define NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT \ 132 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_PORT 133 #define NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK \ 134 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_PORT_MASK 135 #define NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO \ 136 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_IP_PROTOCOL 137 #define EM_FLOW_ALLOC_INPUT_EN_SRC_IPADDR \ 138 HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_IPADDR 139 #define EM_FLOW_ALLOC_INPUT_EN_DST_IPADDR \ 140 HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_IPADDR 141 #define EM_FLOW_ALLOC_INPUT_EN_SRC_PORT \ 142 HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_PORT 143 #define EM_FLOW_ALLOC_INPUT_EN_DST_PORT \ 144 HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_PORT 145 #define EM_FLOW_ALLOC_INPUT_EN_IP_PROTO \ 146 HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_IP_PROTOCOL 147 #define EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_IPV6 \ 148 HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_IPV6 149 #define NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6 \ 150 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_IPV6 151 #define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN \ 152 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN 153 #define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE \ 154 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE 155 #define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE \ 156 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE 157 #define L2_FILTER_ALLOC_INPUT_EN_L2_ADDR_MASK \ 158 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK 159 #define NTUPLE_FLTR_ALLOC_INPUT_IP_PROTOCOL_UDP \ 160 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_UDP 161 #define NTUPLE_FLTR_ALLOC_INPUT_IP_PROTOCOL_TCP \ 162 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_TCP 163 #define NTUPLE_FLTR_ALLOC_INPUT_IP_PROTOCOL_UNKNOWN \ 164 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_UNKNOWN 165 #define NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4 \ 166 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_IPV4 167 #define NTUPLE_FLTR_ALLOC_INPUT_EN_MIRROR_VNIC_ID \ 168 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID 169 #define NTUPLE_FLTR_ALLOC_INPUT_EN_MIRROR_VNIC_ID \ 170 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID 171 #define L2_FILTER_ALLOC_INPUT_EN_T_NUM_VLANS \ 172 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_NUM_VLANS 173 #define L2_FILTER_ALLOC_INPUT_EN_NUM_VLANS \ 174 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_NUM_VLANS 175 #endif 176