1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2001-2020 Intel Corporation 3 */ 4 5 #ifndef _IXGBE_API_H_ 6 #define _IXGBE_API_H_ 7 8 #include "ixgbe_type.h" 9 10 void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map); 11 12 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw); 13 14 extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw); 15 extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw); 16 extern s32 ixgbe_init_ops_X540(struct ixgbe_hw *hw); 17 extern s32 ixgbe_init_ops_X550(struct ixgbe_hw *hw); 18 extern s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw); 19 extern s32 ixgbe_init_ops_X550EM_x(struct ixgbe_hw *hw); 20 extern s32 ixgbe_init_ops_X550EM_a(struct ixgbe_hw *hw); 21 extern s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw); 22 23 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw); 24 s32 ixgbe_init_hw(struct ixgbe_hw *hw); 25 s32 ixgbe_reset_hw(struct ixgbe_hw *hw); 26 s32 ixgbe_start_hw(struct ixgbe_hw *hw); 27 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw); 28 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw); 29 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw); 30 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr); 31 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw); 32 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw); 33 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw); 34 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw); 35 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num); 36 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size); 37 38 s32 ixgbe_identify_phy(struct ixgbe_hw *hw); 39 s32 ixgbe_reset_phy(struct ixgbe_hw *hw); 40 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 41 u16 *phy_data); 42 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 43 u16 phy_data); 44 45 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw); 46 s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw); 47 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, 48 ixgbe_link_speed *speed, 49 bool *link_up); 50 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, 51 ixgbe_link_speed speed, 52 bool autoneg_wait_to_complete); 53 s32 ixgbe_set_phy_power(struct ixgbe_hw *, bool on); 54 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw); 55 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw); 56 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw); 57 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed, 58 bool autoneg_wait_to_complete); 59 s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed, 60 bool autoneg_wait_to_complete); 61 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 62 bool *link_up, bool link_up_wait_to_complete); 63 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 64 bool *autoneg); 65 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index); 66 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index); 67 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index); 68 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index); 69 70 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw); 71 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data); 72 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, 73 u16 words, u16 *data); 74 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data); 75 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, 76 u16 words, u16 *data); 77 78 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val); 79 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw); 80 81 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq); 82 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 83 u32 enable_addr); 84 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index); 85 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 86 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq); 87 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 88 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw); 89 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw); 90 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, 91 u32 addr_count, ixgbe_mc_addr_itr func); 92 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, 93 u32 mc_addr_count, ixgbe_mc_addr_itr func, 94 bool clear); 95 void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr_list, u32 vmdq); 96 s32 ixgbe_enable_mc(struct ixgbe_hw *hw); 97 s32 ixgbe_disable_mc(struct ixgbe_hw *hw); 98 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw); 99 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, 100 u32 vind, bool vlan_on, bool vlvf_bypass); 101 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, 102 bool vlan_on, u32 *vfta_delta, u32 vfta, 103 bool vlvf_bypass); 104 s32 ixgbe_fc_enable(struct ixgbe_hw *hw); 105 s32 ixgbe_setup_fc(struct ixgbe_hw *hw); 106 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build, 107 u8 ver, u16 len, char *driver_ver); 108 s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw); 109 s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw); 110 void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr); 111 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, 112 u16 *firmware_version); 113 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val); 114 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val); 115 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw); 116 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data); 117 u64 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw); 118 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval); 119 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw); 120 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw); 121 s32 ixgbe_mng_fw_enabled(struct ixgbe_hw *hw); 122 s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw); 123 s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl); 124 s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl, 125 bool cloud_mode); 126 void ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw, 127 union ixgbe_atr_hash_dword input, 128 union ixgbe_atr_hash_dword common, 129 u8 queue); 130 s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw, 131 union ixgbe_atr_input *input_mask, bool cloud_mode); 132 s32 ixgbe_fdir_write_perfect_filter_82599(struct ixgbe_hw *hw, 133 union ixgbe_atr_input *input, 134 u16 soft_id, u8 queue, bool cloud_mode); 135 s32 ixgbe_fdir_erase_perfect_filter_82599(struct ixgbe_hw *hw, 136 union ixgbe_atr_input *input, 137 u16 soft_id); 138 s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw, 139 union ixgbe_atr_input *input, 140 union ixgbe_atr_input *mask, 141 u16 soft_id, 142 u8 queue, 143 bool cloud_mode); 144 void ixgbe_atr_compute_perfect_hash_82599(union ixgbe_atr_input *input, 145 union ixgbe_atr_input *mask); 146 u32 ixgbe_atr_compute_sig_hash_82599(union ixgbe_atr_hash_dword input, 147 union ixgbe_atr_hash_dword common); 148 bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw); 149 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 150 u8 *data); 151 s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset, 152 u8 dev_addr, u8 *data); 153 s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val); 154 s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val); 155 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 156 u8 data); 157 void ixgbe_set_fdir_drop_queue_82599(struct ixgbe_hw *hw, u8 dropqueue); 158 s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset, 159 u8 dev_addr, u8 data); 160 s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val); 161 s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val); 162 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 eeprom_data); 163 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr); 164 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr); 165 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps); 166 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask); 167 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask); 168 void ixgbe_init_swfw_semaphore(struct ixgbe_hw *hw); 169 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix, 170 u16 *wwpn_prefix); 171 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs); 172 s32 ixgbe_dmac_config(struct ixgbe_hw *hw); 173 s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw); 174 s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw); 175 s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee); 176 void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable, 177 unsigned int vf); 178 void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable, 179 int vf); 180 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, 181 u32 device_type, u32 *phy_data); 182 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, 183 u32 device_type, u32 phy_data); 184 void ixgbe_disable_mdd(struct ixgbe_hw *hw); 185 void ixgbe_enable_mdd(struct ixgbe_hw *hw); 186 void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap); 187 void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf); 188 bool ixgbe_fw_recovery_mode(struct ixgbe_hw *hw); 189 s32 ixgbe_enter_lplu(struct ixgbe_hw *hw); 190 s32 ixgbe_handle_lasi(struct ixgbe_hw *hw); 191 void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed); 192 void ixgbe_disable_rx(struct ixgbe_hw *hw); 193 void ixgbe_enable_rx(struct ixgbe_hw *hw); 194 s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg, 195 u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm); 196 197 #endif /* _IXGBE_API_H_ */ 198