1 /*-
2 * Copyright (c) 2017 Emmanuel Vadot <[email protected]>
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
18 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
19 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
20 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
21 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 *
25 * $FreeBSD$
26 */
27
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/bus.h>
34
35 #include <dev/extres/clk/clk.h>
36
37 #include <arm/allwinner/clkng/aw_clk.h>
38 #include <arm/allwinner/clkng/aw_clk_prediv_mux.h>
39
40 #include "clkdev_if.h"
41
42 /*
43 * clknode for clocks matching the formula :
44 *
45 * clk = clkin / prediv / div
46 *
47 * and where prediv is conditional
48 *
49 */
50
51 struct aw_clk_prediv_mux_sc {
52 uint32_t offset;
53
54 uint32_t mux_shift;
55 uint32_t mux_mask;
56
57 struct aw_clk_factor div;
58 struct aw_clk_factor prediv;
59
60 uint32_t flags;
61 };
62
63 #define WRITE4(_clk, off, val) \
64 CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
65 #define READ4(_clk, off, val) \
66 CLKDEV_READ_4(clknode_get_device(_clk), off, val)
67 #define MODIFY4(_clk, off, clr, set ) \
68 CLKDEV_MODIFY_4(clknode_get_device(_clk), off, clr, set)
69 #define DEVICE_LOCK(_clk) \
70 CLKDEV_DEVICE_LOCK(clknode_get_device(_clk))
71 #define DEVICE_UNLOCK(_clk) \
72 CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk))
73
74 static int
aw_clk_prediv_mux_init(struct clknode * clk,device_t dev)75 aw_clk_prediv_mux_init(struct clknode *clk, device_t dev)
76 {
77 struct aw_clk_prediv_mux_sc *sc;
78 uint32_t val;
79
80 sc = clknode_get_softc(clk);
81
82 DEVICE_LOCK(clk);
83 READ4(clk, sc->offset, &val);
84 DEVICE_UNLOCK(clk);
85
86 /* Init the current parent */
87 val = (val & sc->mux_mask) >> sc->mux_shift;
88 clknode_init_parent_idx(clk, val);
89
90 return (0);
91 }
92
93 static int
aw_clk_prediv_mux_set_mux(struct clknode * clk,int index)94 aw_clk_prediv_mux_set_mux(struct clknode *clk, int index)
95 {
96 struct aw_clk_prediv_mux_sc *sc;
97 uint32_t val;
98
99 sc = clknode_get_softc(clk);
100
101 DEVICE_LOCK(clk);
102 READ4(clk, sc->offset, &val);
103 val &= ~sc->mux_mask;
104 val |= index << sc->mux_shift;
105 WRITE4(clk, sc->offset, val);
106 DEVICE_UNLOCK(clk);
107
108 return (0);
109 }
110
111 static int
aw_clk_prediv_mux_recalc(struct clknode * clk,uint64_t * freq)112 aw_clk_prediv_mux_recalc(struct clknode *clk, uint64_t *freq)
113 {
114 struct aw_clk_prediv_mux_sc *sc;
115 uint32_t val, div, prediv;
116
117 sc = clknode_get_softc(clk);
118
119 DEVICE_LOCK(clk);
120 READ4(clk, sc->offset, &val);
121 DEVICE_UNLOCK(clk);
122
123 div = aw_clk_get_factor(val, &sc->div);
124 prediv = aw_clk_get_factor(val, &sc->prediv);
125
126 *freq = *freq / prediv / div;
127 return (0);
128 }
129
130 static clknode_method_t aw_prediv_mux_clknode_methods[] = {
131 /* Device interface */
132 CLKNODEMETHOD(clknode_init, aw_clk_prediv_mux_init),
133 CLKNODEMETHOD(clknode_set_mux, aw_clk_prediv_mux_set_mux),
134 CLKNODEMETHOD(clknode_recalc_freq, aw_clk_prediv_mux_recalc),
135 CLKNODEMETHOD_END
136 };
137
138 DEFINE_CLASS_1(aw_prediv_mux_clknode, aw_prediv_mux_clknode_class,
139 aw_prediv_mux_clknode_methods, sizeof(struct aw_clk_prediv_mux_sc),
140 clknode_class);
141
142 int
aw_clk_prediv_mux_register(struct clkdom * clkdom,struct aw_clk_prediv_mux_def * clkdef)143 aw_clk_prediv_mux_register(struct clkdom *clkdom, struct aw_clk_prediv_mux_def *clkdef)
144 {
145 struct clknode *clk;
146 struct aw_clk_prediv_mux_sc *sc;
147
148 clk = clknode_create(clkdom, &aw_prediv_mux_clknode_class, &clkdef->clkdef);
149 if (clk == NULL)
150 return (1);
151
152 sc = clknode_get_softc(clk);
153
154 sc->offset = clkdef->offset;
155
156 sc->mux_shift = clkdef->mux_shift;
157 sc->mux_mask = ((1 << clkdef->mux_width) - 1) << sc->mux_shift;
158
159 sc->div.shift = clkdef->div.shift;
160 sc->div.mask = ((1 << clkdef->div.width) - 1) << sc->div.shift;
161 sc->div.value = clkdef->div.value;
162 sc->div.cond_shift = clkdef->div.cond_shift;
163 sc->div.cond_mask = ((1 << clkdef->div.cond_width) - 1) << sc->div.shift;
164 sc->div.cond_value = clkdef->div.cond_value;
165 sc->div.flags = clkdef->div.flags;
166
167 sc->prediv.shift = clkdef->prediv.shift;
168 sc->prediv.mask = ((1 << clkdef->prediv.width) - 1) << sc->prediv.shift;
169 sc->prediv.value = clkdef->prediv.value;
170 sc->prediv.cond_shift = clkdef->prediv.cond_shift;
171 if (clkdef->prediv.cond_width != 0)
172 sc->prediv.cond_mask = ((1 << clkdef->prediv.cond_width) - 1) << sc->prediv.shift;
173 else
174 sc->prediv.cond_mask = clkdef->prediv.cond_mask;
175 sc->prediv.cond_value = clkdef->prediv.cond_value;
176 sc->prediv.flags = clkdef->prediv.flags;
177
178 sc->flags = clkdef->flags;
179
180 clknode_register(clkdom, clk);
181
182 return (0);
183 }
184