1 //===- X86DisassemblerTables.cpp - Disassembler tables ----------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file is part of the X86 Disassembler Emitter.
11 // It contains the implementation of the disassembler tables.
12 // Documentation for the disassembler emitter in general can be found in
13 //  X86DisassemblerEmitter.h.
14 //
15 //===----------------------------------------------------------------------===//
16 
17 #include "X86DisassemblerTables.h"
18 #include "X86DisassemblerShared.h"
19 #include "llvm/ADT/STLExtras.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include "llvm/Support/Format.h"
22 #include <map>
23 
24 using namespace llvm;
25 using namespace X86Disassembler;
26 
27 /// stringForContext - Returns a string containing the name of a particular
28 ///   InstructionContext, usually for diagnostic purposes.
29 ///
30 /// @param insnContext  - The instruction class to transform to a string.
31 /// @return           - A statically-allocated string constant that contains the
32 ///                     name of the instruction class.
stringForContext(InstructionContext insnContext)33 static inline const char* stringForContext(InstructionContext insnContext) {
34   switch (insnContext) {
35   default:
36     llvm_unreachable("Unhandled instruction class");
37 #define ENUM_ENTRY(n, r, d)   case n: return #n; break;
38 #define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) ENUM_ENTRY(n##_K_B, r, d)\
39         ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d)\
40         ENUM_ENTRY(n##_KZ_B, r, d)
41   INSTRUCTION_CONTEXTS
42 #undef ENUM_ENTRY
43 #undef ENUM_ENTRY_K_B
44   }
45 }
46 
47 /// stringForOperandType - Like stringForContext, but for OperandTypes.
stringForOperandType(OperandType type)48 static inline const char* stringForOperandType(OperandType type) {
49   switch (type) {
50   default:
51     llvm_unreachable("Unhandled type");
52 #define ENUM_ENTRY(i, d) case i: return #i;
53   TYPES
54 #undef ENUM_ENTRY
55   }
56 }
57 
58 /// stringForOperandEncoding - like stringForContext, but for
59 ///   OperandEncodings.
stringForOperandEncoding(OperandEncoding encoding)60 static inline const char* stringForOperandEncoding(OperandEncoding encoding) {
61   switch (encoding) {
62   default:
63     llvm_unreachable("Unhandled encoding");
64 #define ENUM_ENTRY(i, d) case i: return #i;
65   ENCODINGS
66 #undef ENUM_ENTRY
67   }
68 }
69 
70 /// inheritsFrom - Indicates whether all instructions in one class also belong
71 ///   to another class.
72 ///
73 /// @param child  - The class that may be the subset
74 /// @param parent - The class that may be the superset
75 /// @return       - True if child is a subset of parent, false otherwise.
inheritsFrom(InstructionContext child,InstructionContext parent,bool noPrefix=true,bool VEX_LIG=false,bool VEX_WIG=false,bool AdSize64=false)76 static inline bool inheritsFrom(InstructionContext child,
77                                 InstructionContext parent, bool noPrefix = true,
78                                 bool VEX_LIG = false, bool VEX_WIG = false,
79                                 bool AdSize64 = false) {
80   if (child == parent)
81     return true;
82 
83   switch (parent) {
84   case IC:
85     return(inheritsFrom(child, IC_64BIT, AdSize64) ||
86            (noPrefix && inheritsFrom(child, IC_OPSIZE, noPrefix)) ||
87            inheritsFrom(child, IC_ADSIZE) ||
88            (noPrefix && inheritsFrom(child, IC_XD, noPrefix)) ||
89            (noPrefix && inheritsFrom(child, IC_XS, noPrefix)));
90   case IC_64BIT:
91     return(inheritsFrom(child, IC_64BIT_REXW)   ||
92            (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE, noPrefix)) ||
93            (!AdSize64 && inheritsFrom(child, IC_64BIT_ADSIZE)) ||
94            (noPrefix && inheritsFrom(child, IC_64BIT_XD, noPrefix))     ||
95            (noPrefix && inheritsFrom(child, IC_64BIT_XS, noPrefix)));
96   case IC_OPSIZE:
97     return inheritsFrom(child, IC_64BIT_OPSIZE) ||
98            inheritsFrom(child, IC_OPSIZE_ADSIZE);
99   case IC_ADSIZE:
100     return (noPrefix && inheritsFrom(child, IC_OPSIZE_ADSIZE, noPrefix));
101   case IC_OPSIZE_ADSIZE:
102     return false;
103   case IC_64BIT_ADSIZE:
104     return (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE, noPrefix));
105   case IC_64BIT_OPSIZE_ADSIZE:
106     return false;
107   case IC_XD:
108     return inheritsFrom(child, IC_64BIT_XD);
109   case IC_XS:
110     return inheritsFrom(child, IC_64BIT_XS);
111   case IC_XD_OPSIZE:
112     return inheritsFrom(child, IC_64BIT_XD_OPSIZE);
113   case IC_XS_OPSIZE:
114     return inheritsFrom(child, IC_64BIT_XS_OPSIZE);
115   case IC_XD_ADSIZE:
116     return inheritsFrom(child, IC_64BIT_XD_ADSIZE);
117   case IC_XS_ADSIZE:
118     return inheritsFrom(child, IC_64BIT_XS_ADSIZE);
119   case IC_64BIT_REXW:
120     return((noPrefix && inheritsFrom(child, IC_64BIT_REXW_XS, noPrefix)) ||
121            (noPrefix && inheritsFrom(child, IC_64BIT_REXW_XD, noPrefix)) ||
122            (noPrefix && inheritsFrom(child, IC_64BIT_REXW_OPSIZE, noPrefix)) ||
123            (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE)));
124   case IC_64BIT_OPSIZE:
125     return inheritsFrom(child, IC_64BIT_REXW_OPSIZE) ||
126            (!AdSize64 && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE)) ||
127            (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE));
128   case IC_64BIT_XD:
129     return(inheritsFrom(child, IC_64BIT_REXW_XD) ||
130            (!AdSize64 && inheritsFrom(child, IC_64BIT_XD_ADSIZE)));
131   case IC_64BIT_XS:
132     return(inheritsFrom(child, IC_64BIT_REXW_XS) ||
133            (!AdSize64 && inheritsFrom(child, IC_64BIT_XS_ADSIZE)));
134   case IC_64BIT_XD_OPSIZE:
135   case IC_64BIT_XS_OPSIZE:
136     return false;
137   case IC_64BIT_XD_ADSIZE:
138   case IC_64BIT_XS_ADSIZE:
139     return false;
140   case IC_64BIT_REXW_XD:
141   case IC_64BIT_REXW_XS:
142   case IC_64BIT_REXW_OPSIZE:
143   case IC_64BIT_REXW_ADSIZE:
144     return false;
145   case IC_VEX:
146     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W)) ||
147            (VEX_WIG && inheritsFrom(child, IC_VEX_W)) ||
148            (VEX_LIG && inheritsFrom(child, IC_VEX_L));
149   case IC_VEX_XS:
150     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XS)) ||
151            (VEX_WIG && inheritsFrom(child, IC_VEX_W_XS)) ||
152            (VEX_LIG && inheritsFrom(child, IC_VEX_L_XS));
153   case IC_VEX_XD:
154     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XD)) ||
155            (VEX_WIG && inheritsFrom(child, IC_VEX_W_XD)) ||
156            (VEX_LIG && inheritsFrom(child, IC_VEX_L_XD));
157   case IC_VEX_OPSIZE:
158     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE)) ||
159            (VEX_WIG && inheritsFrom(child, IC_VEX_W_OPSIZE)) ||
160            (VEX_LIG && inheritsFrom(child, IC_VEX_L_OPSIZE));
161   case IC_VEX_W:
162     return VEX_LIG && inheritsFrom(child, IC_VEX_L_W);
163   case IC_VEX_W_XS:
164     return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XS);
165   case IC_VEX_W_XD:
166     return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XD);
167   case IC_VEX_W_OPSIZE:
168     return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE);
169   case IC_VEX_L:
170     return VEX_WIG && inheritsFrom(child, IC_VEX_L_W);
171   case IC_VEX_L_XS:
172     return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XS);
173   case IC_VEX_L_XD:
174     return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XD);
175   case IC_VEX_L_OPSIZE:
176     return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE);
177   case IC_VEX_L_W:
178   case IC_VEX_L_W_XS:
179   case IC_VEX_L_W_XD:
180   case IC_VEX_L_W_OPSIZE:
181     return false;
182   case IC_EVEX:
183     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W)) ||
184            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W)) ||
185            (VEX_WIG && inheritsFrom(child, IC_EVEX_W)) ||
186            (VEX_LIG && inheritsFrom(child, IC_EVEX_L)) ||
187            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2));
188   case IC_EVEX_XS:
189     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS)) ||
190            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS)) ||
191            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS)) ||
192            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS)) ||
193            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS));
194   case IC_EVEX_XD:
195     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD)) ||
196            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD)) ||
197            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD)) ||
198            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD)) ||
199            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD));
200   case IC_EVEX_OPSIZE:
201     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) ||
202            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE)) ||
203            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE)) ||
204            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE)) ||
205            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE));
206   case IC_EVEX_K:
207     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K)) ||
208            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K)) ||
209            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_K)) ||
210            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K)) ||
211            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K));
212   case IC_EVEX_XS_K:
213     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) ||
214            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K)) ||
215            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_K)) ||
216            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K)) ||
217            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K));
218   case IC_EVEX_XD_K:
219     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) ||
220            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K)) ||
221            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_K)) ||
222            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K)) ||
223            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K));
224   case IC_EVEX_OPSIZE_K:
225     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) ||
226            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K)) ||
227            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K)) ||
228            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K)) ||
229            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K));
230   case IC_EVEX_KZ:
231     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) ||
232            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ)) ||
233            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_KZ)) ||
234            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ)) ||
235            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ));
236   case IC_EVEX_XS_KZ:
237     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) ||
238            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ)) ||
239            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ)) ||
240            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ)) ||
241            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ));
242   case IC_EVEX_XD_KZ:
243     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) ||
244            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ)) ||
245            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ)) ||
246            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ)) ||
247            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ));
248   case IC_EVEX_OPSIZE_KZ:
249     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) ||
250            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ)) ||
251            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ)) ||
252            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ)) ||
253            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ));
254   case IC_EVEX_W:
255     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W)) ||
256            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W));
257   case IC_EVEX_W_XS:
258     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS)) ||
259            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS));
260   case IC_EVEX_W_XD:
261     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD)) ||
262            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD));
263   case IC_EVEX_W_OPSIZE:
264     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) ||
265            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE));
266   case IC_EVEX_W_K:
267     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K)) ||
268            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K));
269   case IC_EVEX_W_XS_K:
270     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) ||
271            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K));
272   case IC_EVEX_W_XD_K:
273     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) ||
274            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K));
275   case IC_EVEX_W_OPSIZE_K:
276     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) ||
277            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K));
278   case IC_EVEX_W_KZ:
279     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) ||
280            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ));
281   case IC_EVEX_W_XS_KZ:
282     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) ||
283            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ));
284   case IC_EVEX_W_XD_KZ:
285     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) ||
286            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ));
287   case IC_EVEX_W_OPSIZE_KZ:
288     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) ||
289            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ));
290   case IC_EVEX_L:
291     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W);
292   case IC_EVEX_L_XS:
293     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS);
294   case IC_EVEX_L_XD:
295     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD);
296   case IC_EVEX_L_OPSIZE:
297     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE);
298   case IC_EVEX_L_K:
299     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K);
300   case IC_EVEX_L_XS_K:
301     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K);
302   case IC_EVEX_L_XD_K:
303     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K);
304   case IC_EVEX_L_OPSIZE_K:
305     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K);
306   case IC_EVEX_L_KZ:
307     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ);
308   case IC_EVEX_L_XS_KZ:
309     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ);
310   case IC_EVEX_L_XD_KZ:
311     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ);
312   case IC_EVEX_L_OPSIZE_KZ:
313     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ);
314   case IC_EVEX_L_W:
315   case IC_EVEX_L_W_XS:
316   case IC_EVEX_L_W_XD:
317   case IC_EVEX_L_W_OPSIZE:
318     return false;
319   case IC_EVEX_L_W_K:
320   case IC_EVEX_L_W_XS_K:
321   case IC_EVEX_L_W_XD_K:
322   case IC_EVEX_L_W_OPSIZE_K:
323     return false;
324   case IC_EVEX_L_W_KZ:
325   case IC_EVEX_L_W_XS_KZ:
326   case IC_EVEX_L_W_XD_KZ:
327   case IC_EVEX_L_W_OPSIZE_KZ:
328     return false;
329   case IC_EVEX_L2:
330     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W);
331   case IC_EVEX_L2_XS:
332     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS);
333   case IC_EVEX_L2_XD:
334     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD);
335   case IC_EVEX_L2_OPSIZE:
336     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE);
337   case IC_EVEX_L2_K:
338     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K);
339   case IC_EVEX_L2_XS_K:
340     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K);
341   case IC_EVEX_L2_XD_K:
342     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K);
343   case IC_EVEX_L2_OPSIZE_K:
344     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K);
345   case IC_EVEX_L2_KZ:
346     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ);
347   case IC_EVEX_L2_XS_KZ:
348     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ);
349   case IC_EVEX_L2_XD_KZ:
350     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ);
351   case IC_EVEX_L2_OPSIZE_KZ:
352     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ);
353   case IC_EVEX_L2_W:
354   case IC_EVEX_L2_W_XS:
355   case IC_EVEX_L2_W_XD:
356   case IC_EVEX_L2_W_OPSIZE:
357     return false;
358   case IC_EVEX_L2_W_K:
359   case IC_EVEX_L2_W_XS_K:
360   case IC_EVEX_L2_W_XD_K:
361   case IC_EVEX_L2_W_OPSIZE_K:
362     return false;
363   case IC_EVEX_L2_W_KZ:
364   case IC_EVEX_L2_W_XS_KZ:
365   case IC_EVEX_L2_W_XD_KZ:
366   case IC_EVEX_L2_W_OPSIZE_KZ:
367     return false;
368   case IC_EVEX_B:
369     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_B)) ||
370            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_B)) ||
371            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_B)) ||
372            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_B)) ||
373            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_B));
374   case IC_EVEX_XS_B:
375     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) ||
376            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B)) ||
377            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_B)) ||
378            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_B)) ||
379            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_B));
380   case IC_EVEX_XD_B:
381     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) ||
382            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B)) ||
383            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_B)) ||
384            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_B)) ||
385            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_B));
386   case IC_EVEX_OPSIZE_B:
387     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) ||
388            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B)) ||
389            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_B)) ||
390            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_B)) ||
391            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_B));
392   case IC_EVEX_K_B:
393     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) ||
394            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B)) ||
395            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_K_B)) ||
396            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K_B)) ||
397            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K_B));
398   case IC_EVEX_XS_K_B:
399     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) ||
400            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B)) ||
401            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_K_B)) ||
402            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K_B)) ||
403            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K_B));
404   case IC_EVEX_XD_K_B:
405     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) ||
406            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B)) ||
407            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_K_B)) ||
408            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K_B)) ||
409            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K_B));
410   case IC_EVEX_OPSIZE_K_B:
411     return (VEX_LIG && VEX_WIG &&
412             inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) ||
413            (VEX_LIG && VEX_WIG &&
414             inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B)) ||
415            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K_B)) ||
416            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K_B)) ||
417            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K_B));
418   case IC_EVEX_KZ_B:
419     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) ||
420            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B)) ||
421            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_KZ_B)) ||
422            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ_B)) ||
423            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ_B));
424   case IC_EVEX_XS_KZ_B:
425     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) ||
426            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B)) ||
427            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ_B)) ||
428            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ_B)) ||
429            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ_B));
430   case IC_EVEX_XD_KZ_B:
431     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) ||
432            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B)) ||
433            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ_B)) ||
434            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ_B)) ||
435            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ_B));
436   case IC_EVEX_OPSIZE_KZ_B:
437     return (VEX_LIG && VEX_WIG &&
438             inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) ||
439            (VEX_LIG && VEX_WIG &&
440             inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B)) ||
441            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ_B)) ||
442            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ_B)) ||
443            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ_B));
444   case IC_EVEX_W_B:
445     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_B)) ||
446            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_B));
447   case IC_EVEX_W_XS_B:
448     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) ||
449            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B));
450   case IC_EVEX_W_XD_B:
451     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) ||
452            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B));
453   case IC_EVEX_W_OPSIZE_B:
454     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) ||
455            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B));
456   case IC_EVEX_W_K_B:
457     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) ||
458            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K_B));
459   case IC_EVEX_W_XS_K_B:
460     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) ||
461            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B));
462   case IC_EVEX_W_XD_K_B:
463     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) ||
464            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B));
465   case IC_EVEX_W_OPSIZE_K_B:
466     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) ||
467            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B));
468   case IC_EVEX_W_KZ_B:
469     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) ||
470            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B));
471   case IC_EVEX_W_XS_KZ_B:
472     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) ||
473            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B));
474   case IC_EVEX_W_XD_KZ_B:
475     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) ||
476            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B));
477   case IC_EVEX_W_OPSIZE_KZ_B:
478     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) ||
479            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B));
480   case IC_EVEX_L_B:
481     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_B);
482   case IC_EVEX_L_XS_B:
483     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B);
484   case IC_EVEX_L_XD_B:
485     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B);
486   case IC_EVEX_L_OPSIZE_B:
487     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B);
488   case IC_EVEX_L_K_B:
489     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K_B);
490   case IC_EVEX_L_XS_K_B:
491     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B);
492   case IC_EVEX_L_XD_K_B:
493     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B);
494   case IC_EVEX_L_OPSIZE_K_B:
495     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B);
496   case IC_EVEX_L_KZ_B:
497     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B);
498   case IC_EVEX_L_XS_KZ_B:
499     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B);
500   case IC_EVEX_L_XD_KZ_B:
501     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B);
502   case IC_EVEX_L_OPSIZE_KZ_B:
503     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B);
504   case IC_EVEX_L_W_B:
505   case IC_EVEX_L_W_XS_B:
506   case IC_EVEX_L_W_XD_B:
507   case IC_EVEX_L_W_OPSIZE_B:
508     return false;
509   case IC_EVEX_L_W_K_B:
510   case IC_EVEX_L_W_XS_K_B:
511   case IC_EVEX_L_W_XD_K_B:
512   case IC_EVEX_L_W_OPSIZE_K_B:
513     return false;
514   case IC_EVEX_L_W_KZ_B:
515   case IC_EVEX_L_W_XS_KZ_B:
516   case IC_EVEX_L_W_XD_KZ_B:
517   case IC_EVEX_L_W_OPSIZE_KZ_B:
518     return false;
519   case IC_EVEX_L2_B:
520     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_B);
521   case IC_EVEX_L2_XS_B:
522     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B);
523   case IC_EVEX_L2_XD_B:
524     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B);
525   case IC_EVEX_L2_OPSIZE_B:
526     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B);
527   case IC_EVEX_L2_K_B:
528     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B);
529   case IC_EVEX_L2_XS_K_B:
530     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B);
531   case IC_EVEX_L2_XD_K_B:
532     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B);
533   case IC_EVEX_L2_OPSIZE_K_B:
534     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B);
535   case IC_EVEX_L2_KZ_B:
536     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B);
537   case IC_EVEX_L2_XS_KZ_B:
538     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B);
539   case IC_EVEX_L2_XD_KZ_B:
540     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B);
541   case IC_EVEX_L2_OPSIZE_KZ_B:
542     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B);
543   case IC_EVEX_L2_W_B:
544   case IC_EVEX_L2_W_XS_B:
545   case IC_EVEX_L2_W_XD_B:
546   case IC_EVEX_L2_W_OPSIZE_B:
547     return false;
548   case IC_EVEX_L2_W_K_B:
549   case IC_EVEX_L2_W_XS_K_B:
550   case IC_EVEX_L2_W_XD_K_B:
551   case IC_EVEX_L2_W_OPSIZE_K_B:
552     return false;
553   case IC_EVEX_L2_W_KZ_B:
554   case IC_EVEX_L2_W_XS_KZ_B:
555   case IC_EVEX_L2_W_XD_KZ_B:
556   case IC_EVEX_L2_W_OPSIZE_KZ_B:
557     return false;
558   default:
559     errs() << "Unknown instruction class: " <<
560       stringForContext((InstructionContext)parent) << "\n";
561     llvm_unreachable("Unknown instruction class");
562   }
563 }
564 
565 /// outranks - Indicates whether, if an instruction has two different applicable
566 ///   classes, which class should be preferred when performing decode.  This
567 ///   imposes a total ordering (ties are resolved toward "lower")
568 ///
569 /// @param upper  - The class that may be preferable
570 /// @param lower  - The class that may be less preferable
571 /// @return       - True if upper is to be preferred, false otherwise.
outranks(InstructionContext upper,InstructionContext lower)572 static inline bool outranks(InstructionContext upper,
573                             InstructionContext lower) {
574   assert(upper < IC_max);
575   assert(lower < IC_max);
576 
577 #define ENUM_ENTRY(n, r, d) r,
578 #define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) \
579   ENUM_ENTRY(n##_K_B, r, d) ENUM_ENTRY(n##_KZ_B, r, d) \
580   ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d)
581   static int ranks[IC_max] = {
582     INSTRUCTION_CONTEXTS
583   };
584 #undef ENUM_ENTRY
585 #undef ENUM_ENTRY_K_B
586 
587   return (ranks[upper] > ranks[lower]);
588 }
589 
590 /// getDecisionType - Determines whether a ModRM decision with 255 entries can
591 ///   be compacted by eliminating redundant information.
592 ///
593 /// @param decision - The decision to be compacted.
594 /// @return         - The compactest available representation for the decision.
getDecisionType(ModRMDecision & decision)595 static ModRMDecisionType getDecisionType(ModRMDecision &decision) {
596   bool satisfiesOneEntry = true;
597   bool satisfiesSplitRM = true;
598   bool satisfiesSplitReg = true;
599   bool satisfiesSplitMisc = true;
600 
601   for (unsigned index = 0; index < 256; ++index) {
602     if (decision.instructionIDs[index] != decision.instructionIDs[0])
603       satisfiesOneEntry = false;
604 
605     if (((index & 0xc0) == 0xc0) &&
606        (decision.instructionIDs[index] != decision.instructionIDs[0xc0]))
607       satisfiesSplitRM = false;
608 
609     if (((index & 0xc0) != 0xc0) &&
610        (decision.instructionIDs[index] != decision.instructionIDs[0x00]))
611       satisfiesSplitRM = false;
612 
613     if (((index & 0xc0) == 0xc0) &&
614        (decision.instructionIDs[index] != decision.instructionIDs[index&0xf8]))
615       satisfiesSplitReg = false;
616 
617     if (((index & 0xc0) != 0xc0) &&
618        (decision.instructionIDs[index] != decision.instructionIDs[index&0x38]))
619       satisfiesSplitMisc = false;
620   }
621 
622   if (satisfiesOneEntry)
623     return MODRM_ONEENTRY;
624 
625   if (satisfiesSplitRM)
626     return MODRM_SPLITRM;
627 
628   if (satisfiesSplitReg && satisfiesSplitMisc)
629     return MODRM_SPLITREG;
630 
631   if (satisfiesSplitMisc)
632     return MODRM_SPLITMISC;
633 
634   return MODRM_FULL;
635 }
636 
637 /// stringForDecisionType - Returns a statically-allocated string corresponding
638 ///   to a particular decision type.
639 ///
640 /// @param dt - The decision type.
641 /// @return   - A pointer to the statically-allocated string (e.g.,
642 ///             "MODRM_ONEENTRY" for MODRM_ONEENTRY).
stringForDecisionType(ModRMDecisionType dt)643 static const char* stringForDecisionType(ModRMDecisionType dt) {
644 #define ENUM_ENTRY(n) case n: return #n;
645   switch (dt) {
646     default:
647       llvm_unreachable("Unknown decision type");
648     MODRMTYPES
649   };
650 #undef ENUM_ENTRY
651 }
652 
DisassemblerTables()653 DisassemblerTables::DisassemblerTables() {
654   for (unsigned i = 0; i < array_lengthof(Tables); i++)
655     Tables[i] = llvm::make_unique<ContextDecision>();
656 
657   HasConflicts = false;
658 }
659 
~DisassemblerTables()660 DisassemblerTables::~DisassemblerTables() {
661 }
662 
emitModRMDecision(raw_ostream & o1,raw_ostream & o2,unsigned & i1,unsigned & i2,unsigned & ModRMTableNum,ModRMDecision & decision) const663 void DisassemblerTables::emitModRMDecision(raw_ostream &o1, raw_ostream &o2,
664                                            unsigned &i1, unsigned &i2,
665                                            unsigned &ModRMTableNum,
666                                            ModRMDecision &decision) const {
667   static uint32_t sTableNumber = 0;
668   static uint32_t sEntryNumber = 1;
669   ModRMDecisionType dt = getDecisionType(decision);
670 
671   if (dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0)
672   {
673     o2.indent(i2) << "{ /* ModRMDecision */" << "\n";
674     i2++;
675 
676     o2.indent(i2) << stringForDecisionType(dt) << "," << "\n";
677     o2.indent(i2) << 0 << " /* EmptyTable */\n";
678 
679     i2--;
680     o2.indent(i2) << "}";
681     return;
682   }
683 
684   std::vector<unsigned> ModRMDecision;
685 
686   switch (dt) {
687     default:
688       llvm_unreachable("Unknown decision type");
689     case MODRM_ONEENTRY:
690       ModRMDecision.push_back(decision.instructionIDs[0]);
691       break;
692     case MODRM_SPLITRM:
693       ModRMDecision.push_back(decision.instructionIDs[0x00]);
694       ModRMDecision.push_back(decision.instructionIDs[0xc0]);
695       break;
696     case MODRM_SPLITREG:
697       for (unsigned index = 0; index < 64; index += 8)
698         ModRMDecision.push_back(decision.instructionIDs[index]);
699       for (unsigned index = 0xc0; index < 256; index += 8)
700         ModRMDecision.push_back(decision.instructionIDs[index]);
701       break;
702     case MODRM_SPLITMISC:
703       for (unsigned index = 0; index < 64; index += 8)
704         ModRMDecision.push_back(decision.instructionIDs[index]);
705       for (unsigned index = 0xc0; index < 256; ++index)
706         ModRMDecision.push_back(decision.instructionIDs[index]);
707       break;
708     case MODRM_FULL:
709       for (unsigned index = 0; index < 256; ++index)
710         ModRMDecision.push_back(decision.instructionIDs[index]);
711       break;
712   }
713 
714   unsigned &EntryNumber = ModRMTable[ModRMDecision];
715   if (EntryNumber == 0) {
716     EntryNumber = ModRMTableNum;
717 
718     ModRMTableNum += ModRMDecision.size();
719     o1 << "/* Table" << EntryNumber << " */\n";
720     i1++;
721     for (std::vector<unsigned>::const_iterator I = ModRMDecision.begin(),
722            E = ModRMDecision.end(); I != E; ++I) {
723       o1.indent(i1 * 2) << format("0x%hx", *I) << ", /* "
724                         << InstructionSpecifiers[*I].name << " */\n";
725     }
726     i1--;
727   }
728 
729   o2.indent(i2) << "{ /* struct ModRMDecision */" << "\n";
730   i2++;
731 
732   o2.indent(i2) << stringForDecisionType(dt) << "," << "\n";
733   o2.indent(i2) << EntryNumber << " /* Table" << EntryNumber << " */\n";
734 
735   i2--;
736   o2.indent(i2) << "}";
737 
738   switch (dt) {
739     default:
740       llvm_unreachable("Unknown decision type");
741     case MODRM_ONEENTRY:
742       sEntryNumber += 1;
743       break;
744     case MODRM_SPLITRM:
745       sEntryNumber += 2;
746       break;
747     case MODRM_SPLITREG:
748       sEntryNumber += 16;
749       break;
750     case MODRM_SPLITMISC:
751       sEntryNumber += 8 + 64;
752       break;
753     case MODRM_FULL:
754       sEntryNumber += 256;
755       break;
756   }
757 
758   // We assume that the index can fit into uint16_t.
759   assert(sEntryNumber < 65536U &&
760          "Index into ModRMDecision is too large for uint16_t!");
761 
762   ++sTableNumber;
763 }
764 
emitOpcodeDecision(raw_ostream & o1,raw_ostream & o2,unsigned & i1,unsigned & i2,unsigned & ModRMTableNum,OpcodeDecision & decision) const765 void DisassemblerTables::emitOpcodeDecision(raw_ostream &o1, raw_ostream &o2,
766                                             unsigned &i1, unsigned &i2,
767                                             unsigned &ModRMTableNum,
768                                             OpcodeDecision &decision) const {
769   o2.indent(i2) << "{ /* struct OpcodeDecision */" << "\n";
770   i2++;
771   o2.indent(i2) << "{" << "\n";
772   i2++;
773 
774   for (unsigned index = 0; index < 256; ++index) {
775     o2.indent(i2);
776 
777     o2 << "/* 0x" << format("%02hhx", index) << " */" << "\n";
778 
779     emitModRMDecision(o1, o2, i1, i2, ModRMTableNum,
780                       decision.modRMDecisions[index]);
781 
782     if (index <  255)
783       o2 << ",";
784 
785     o2 << "\n";
786   }
787 
788   i2--;
789   o2.indent(i2) << "}" << "\n";
790   i2--;
791   o2.indent(i2) << "}" << "\n";
792 }
793 
emitContextDecision(raw_ostream & o1,raw_ostream & o2,unsigned & i1,unsigned & i2,unsigned & ModRMTableNum,ContextDecision & decision,const char * name) const794 void DisassemblerTables::emitContextDecision(raw_ostream &o1, raw_ostream &o2,
795                                              unsigned &i1, unsigned &i2,
796                                              unsigned &ModRMTableNum,
797                                              ContextDecision &decision,
798                                              const char* name) const {
799   o2.indent(i2) << "static const struct ContextDecision " << name << " = {\n";
800   i2++;
801   o2.indent(i2) << "{ /* opcodeDecisions */" << "\n";
802   i2++;
803 
804   for (unsigned index = 0; index < IC_max; ++index) {
805     o2.indent(i2) << "/* ";
806     o2 << stringForContext((InstructionContext)index);
807     o2 << " */";
808     o2 << "\n";
809 
810     emitOpcodeDecision(o1, o2, i1, i2, ModRMTableNum,
811                        decision.opcodeDecisions[index]);
812 
813     if (index + 1 < IC_max)
814       o2 << ", ";
815   }
816 
817   i2--;
818   o2.indent(i2) << "}" << "\n";
819   i2--;
820   o2.indent(i2) << "};" << "\n";
821 }
822 
emitInstructionInfo(raw_ostream & o,unsigned & i) const823 void DisassemblerTables::emitInstructionInfo(raw_ostream &o,
824                                              unsigned &i) const {
825   unsigned NumInstructions = InstructionSpecifiers.size();
826 
827   o << "static const struct OperandSpecifier x86OperandSets[]["
828     << X86_MAX_OPERANDS << "] = {\n";
829 
830   typedef SmallVector<std::pair<OperandEncoding, OperandType>,
831                       X86_MAX_OPERANDS> OperandListTy;
832   std::map<OperandListTy, unsigned> OperandSets;
833 
834   unsigned OperandSetNum = 0;
835   for (unsigned Index = 0; Index < NumInstructions; ++Index) {
836     OperandListTy OperandList;
837 
838     for (unsigned OperandIndex = 0; OperandIndex < X86_MAX_OPERANDS;
839          ++OperandIndex) {
840       OperandEncoding Encoding = (OperandEncoding)InstructionSpecifiers[Index]
841                                  .operands[OperandIndex].encoding;
842       OperandType Type = (OperandType)InstructionSpecifiers[Index]
843                          .operands[OperandIndex].type;
844       OperandList.push_back(std::make_pair(Encoding, Type));
845     }
846     unsigned &N = OperandSets[OperandList];
847     if (N != 0) continue;
848 
849     N = ++OperandSetNum;
850 
851     o << "  { /* " << (OperandSetNum - 1) << " */\n";
852     for (unsigned i = 0, e = OperandList.size(); i != e; ++i) {
853       const char *Encoding = stringForOperandEncoding(OperandList[i].first);
854       const char *Type     = stringForOperandType(OperandList[i].second);
855       o << "    { " << Encoding << ", " << Type << " },\n";
856     }
857     o << "  },\n";
858   }
859   o << "};" << "\n\n";
860 
861   o.indent(i * 2) << "static const struct InstructionSpecifier ";
862   o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n";
863 
864   i++;
865 
866   for (unsigned index = 0; index < NumInstructions; ++index) {
867     o.indent(i * 2) << "{ /* " << index << " */\n";
868     i++;
869 
870     OperandListTy OperandList;
871     for (unsigned OperandIndex = 0; OperandIndex < X86_MAX_OPERANDS;
872          ++OperandIndex) {
873       OperandEncoding Encoding = (OperandEncoding)InstructionSpecifiers[index]
874                                  .operands[OperandIndex].encoding;
875       OperandType Type = (OperandType)InstructionSpecifiers[index]
876                          .operands[OperandIndex].type;
877       OperandList.push_back(std::make_pair(Encoding, Type));
878     }
879     o.indent(i * 2) << (OperandSets[OperandList] - 1) << ",\n";
880 
881     o.indent(i * 2) << "/* " << InstructionSpecifiers[index].name << " */\n";
882 
883     i--;
884     o.indent(i * 2) << "},\n";
885   }
886 
887   i--;
888   o.indent(i * 2) << "};" << "\n";
889 }
890 
emitContextTable(raw_ostream & o,unsigned & i) const891 void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const {
892   const unsigned int tableSize = 16384;
893   o.indent(i * 2) << "static const uint8_t " CONTEXTS_STR
894                      "[" << tableSize << "] = {\n";
895   i++;
896 
897   for (unsigned index = 0; index < tableSize; ++index) {
898     o.indent(i * 2);
899 
900     if (index & ATTR_EVEX) {
901       o << "IC_EVEX";
902       if (index & ATTR_EVEXL2)
903         o << "_L2";
904       else if (index & ATTR_EVEXL)
905         o << "_L";
906       if (index & ATTR_REXW)
907         o << "_W";
908       if (index & ATTR_OPSIZE)
909         o << "_OPSIZE";
910       else if (index & ATTR_XD)
911         o << "_XD";
912       else if (index & ATTR_XS)
913         o << "_XS";
914       if (index & ATTR_EVEXKZ)
915         o << "_KZ";
916       else if (index & ATTR_EVEXK)
917         o << "_K";
918       if (index & ATTR_EVEXB)
919         o << "_B";
920     }
921     else if ((index & ATTR_VEXL) && (index & ATTR_REXW) && (index & ATTR_OPSIZE))
922       o << "IC_VEX_L_W_OPSIZE";
923     else if ((index & ATTR_VEXL) && (index & ATTR_REXW) && (index & ATTR_XD))
924       o << "IC_VEX_L_W_XD";
925     else if ((index & ATTR_VEXL) && (index & ATTR_REXW) && (index & ATTR_XS))
926       o << "IC_VEX_L_W_XS";
927     else if ((index & ATTR_VEXL) && (index & ATTR_REXW))
928       o << "IC_VEX_L_W";
929     else if ((index & ATTR_VEXL) && (index & ATTR_OPSIZE))
930       o << "IC_VEX_L_OPSIZE";
931     else if ((index & ATTR_VEXL) && (index & ATTR_XD))
932       o << "IC_VEX_L_XD";
933     else if ((index & ATTR_VEXL) && (index & ATTR_XS))
934       o << "IC_VEX_L_XS";
935     else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_OPSIZE))
936       o << "IC_VEX_W_OPSIZE";
937     else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_XD))
938       o << "IC_VEX_W_XD";
939     else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_XS))
940       o << "IC_VEX_W_XS";
941     else if (index & ATTR_VEXL)
942       o << "IC_VEX_L";
943     else if ((index & ATTR_VEX) && (index & ATTR_REXW))
944       o << "IC_VEX_W";
945     else if ((index & ATTR_VEX) && (index & ATTR_OPSIZE))
946       o << "IC_VEX_OPSIZE";
947     else if ((index & ATTR_VEX) && (index & ATTR_XD))
948       o << "IC_VEX_XD";
949     else if ((index & ATTR_VEX) && (index & ATTR_XS))
950       o << "IC_VEX_XS";
951     else if (index & ATTR_VEX)
952       o << "IC_VEX";
953     else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS))
954       o << "IC_64BIT_REXW_XS";
955     else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD))
956       o << "IC_64BIT_REXW_XD";
957     else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
958              (index & ATTR_OPSIZE))
959       o << "IC_64BIT_REXW_OPSIZE";
960     else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
961              (index & ATTR_ADSIZE))
962       o << "IC_64BIT_REXW_ADSIZE";
963     else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_OPSIZE))
964       o << "IC_64BIT_XD_OPSIZE";
965     else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_ADSIZE))
966       o << "IC_64BIT_XD_ADSIZE";
967     else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_OPSIZE))
968       o << "IC_64BIT_XS_OPSIZE";
969     else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_ADSIZE))
970       o << "IC_64BIT_XS_ADSIZE";
971     else if ((index & ATTR_64BIT) && (index & ATTR_XS))
972       o << "IC_64BIT_XS";
973     else if ((index & ATTR_64BIT) && (index & ATTR_XD))
974       o << "IC_64BIT_XD";
975     else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE) &&
976              (index & ATTR_ADSIZE))
977       o << "IC_64BIT_OPSIZE_ADSIZE";
978     else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE))
979       o << "IC_64BIT_OPSIZE";
980     else if ((index & ATTR_64BIT) && (index & ATTR_ADSIZE))
981       o << "IC_64BIT_ADSIZE";
982     else if ((index & ATTR_64BIT) && (index & ATTR_REXW))
983       o << "IC_64BIT_REXW";
984     else if ((index & ATTR_64BIT))
985       o << "IC_64BIT";
986     else if ((index & ATTR_XS) && (index & ATTR_OPSIZE))
987       o << "IC_XS_OPSIZE";
988     else if ((index & ATTR_XD) && (index & ATTR_OPSIZE))
989       o << "IC_XD_OPSIZE";
990     else if ((index & ATTR_XS) && (index & ATTR_ADSIZE))
991       o << "IC_XS_ADSIZE";
992     else if ((index & ATTR_XD) && (index & ATTR_ADSIZE))
993       o << "IC_XD_ADSIZE";
994     else if (index & ATTR_XS)
995       o << "IC_XS";
996     else if (index & ATTR_XD)
997       o << "IC_XD";
998     else if ((index & ATTR_OPSIZE) && (index & ATTR_ADSIZE))
999       o << "IC_OPSIZE_ADSIZE";
1000     else if (index & ATTR_OPSIZE)
1001       o << "IC_OPSIZE";
1002     else if (index & ATTR_ADSIZE)
1003       o << "IC_ADSIZE";
1004     else
1005       o << "IC";
1006 
1007     if (index < tableSize - 1)
1008       o << ",";
1009     else
1010       o << " ";
1011 
1012     o << " /* " << index << " */";
1013 
1014     o << "\n";
1015   }
1016 
1017   i--;
1018   o.indent(i * 2) << "};" << "\n";
1019 }
1020 
emitContextDecisions(raw_ostream & o1,raw_ostream & o2,unsigned & i1,unsigned & i2,unsigned & ModRMTableNum) const1021 void DisassemblerTables::emitContextDecisions(raw_ostream &o1, raw_ostream &o2,
1022                                               unsigned &i1, unsigned &i2,
1023                                               unsigned &ModRMTableNum) const {
1024   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[0], ONEBYTE_STR);
1025   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[1], TWOBYTE_STR);
1026   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[2], THREEBYTE38_STR);
1027   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[3], THREEBYTE3A_STR);
1028   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[4], XOP8_MAP_STR);
1029   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[5], XOP9_MAP_STR);
1030   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[6], XOPA_MAP_STR);
1031   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[7], THREEDNOW_MAP_STR);
1032 }
1033 
emit(raw_ostream & o) const1034 void DisassemblerTables::emit(raw_ostream &o) const {
1035   unsigned i1 = 0;
1036   unsigned i2 = 0;
1037 
1038   std::string s1;
1039   std::string s2;
1040 
1041   raw_string_ostream o1(s1);
1042   raw_string_ostream o2(s2);
1043 
1044   emitInstructionInfo(o, i2);
1045   o << "\n";
1046 
1047   emitContextTable(o, i2);
1048   o << "\n";
1049 
1050   unsigned ModRMTableNum = 0;
1051 
1052   o << "static const InstrUID modRMTable[] = {\n";
1053   i1++;
1054   std::vector<unsigned> EmptyTable(1, 0);
1055   ModRMTable[EmptyTable] = ModRMTableNum;
1056   ModRMTableNum += EmptyTable.size();
1057   o1 << "/* EmptyTable */\n";
1058   o1.indent(i1 * 2) << "0x0,\n";
1059   i1--;
1060   emitContextDecisions(o1, o2, i1, i2, ModRMTableNum);
1061 
1062   o << o1.str();
1063   o << "  0x0\n";
1064   o << "};\n";
1065   o << "\n";
1066   o << o2.str();
1067   o << "\n";
1068   o << "\n";
1069 }
1070 
setTableFields(ModRMDecision & decision,const ModRMFilter & filter,InstrUID uid,uint8_t opcode)1071 void DisassemblerTables::setTableFields(ModRMDecision     &decision,
1072                                         const ModRMFilter &filter,
1073                                         InstrUID          uid,
1074                                         uint8_t           opcode) {
1075   for (unsigned index = 0; index < 256; ++index) {
1076     if (filter.accepts(index)) {
1077       if (decision.instructionIDs[index] == uid)
1078         continue;
1079 
1080       if (decision.instructionIDs[index] != 0) {
1081         InstructionSpecifier &newInfo =
1082           InstructionSpecifiers[uid];
1083         InstructionSpecifier &previousInfo =
1084           InstructionSpecifiers[decision.instructionIDs[index]];
1085 
1086         if(previousInfo.name == "NOOP" && (newInfo.name == "XCHG16ar" ||
1087                                            newInfo.name == "XCHG32ar" ||
1088                                            newInfo.name == "XCHG64ar"))
1089           continue; // special case for XCHG*ar and NOOP
1090 
1091         if (outranks(previousInfo.insnContext, newInfo.insnContext))
1092           continue;
1093 
1094         if (previousInfo.insnContext == newInfo.insnContext) {
1095           errs() << "Error: Primary decode conflict: ";
1096           errs() << newInfo.name << " would overwrite " << previousInfo.name;
1097           errs() << "\n";
1098           errs() << "ModRM   " << index << "\n";
1099           errs() << "Opcode  " << (uint16_t)opcode << "\n";
1100           errs() << "Context " << stringForContext(newInfo.insnContext) << "\n";
1101           HasConflicts = true;
1102         }
1103       }
1104 
1105       decision.instructionIDs[index] = uid;
1106     }
1107   }
1108 }
1109 
setTableFields(OpcodeType type,InstructionContext insnContext,uint8_t opcode,const ModRMFilter & filter,InstrUID uid,bool is32bit,bool noPrefix,bool ignoresVEX_L,bool ignoresVEX_W,unsigned addressSize)1110 void DisassemblerTables::setTableFields(OpcodeType          type,
1111                                         InstructionContext  insnContext,
1112                                         uint8_t             opcode,
1113                                         const ModRMFilter   &filter,
1114                                         InstrUID            uid,
1115                                         bool                is32bit,
1116                                         bool                noPrefix,
1117                                         bool                ignoresVEX_L,
1118                                         bool                ignoresVEX_W,
1119                                         unsigned            addressSize) {
1120   ContextDecision &decision = *Tables[type];
1121 
1122   for (unsigned index = 0; index < IC_max; ++index) {
1123     if ((is32bit || addressSize == 16) &&
1124         inheritsFrom((InstructionContext)index, IC_64BIT))
1125       continue;
1126 
1127     bool adSize64 = addressSize == 64;
1128     if (inheritsFrom((InstructionContext)index,
1129                      InstructionSpecifiers[uid].insnContext, noPrefix,
1130                      ignoresVEX_L, ignoresVEX_W, adSize64))
1131       setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode],
1132                      filter,
1133                      uid,
1134                      opcode);
1135   }
1136 }
1137