1 //===-- SparcMCTargetDesc.cpp - Sparc Target Descriptions -----------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file provides Sparc specific target descriptions.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #include "SparcMCTargetDesc.h"
14 #include "SparcInstPrinter.h"
15 #include "SparcMCAsmInfo.h"
16 #include "SparcTargetStreamer.h"
17 #include "TargetInfo/SparcTargetInfo.h"
18 #include "llvm/MC/MCInstrInfo.h"
19 #include "llvm/MC/MCRegisterInfo.h"
20 #include "llvm/MC/MCSubtargetInfo.h"
21 #include "llvm/MC/TargetRegistry.h"
22 #include "llvm/Support/ErrorHandling.h"
23
24 using namespace llvm;
25
26 #define GET_INSTRINFO_MC_DESC
27 #define ENABLE_INSTR_PREDICATE_VERIFIER
28 #include "SparcGenInstrInfo.inc"
29
30 #define GET_SUBTARGETINFO_MC_DESC
31 #include "SparcGenSubtargetInfo.inc"
32
33 #define GET_REGINFO_MC_DESC
34 #include "SparcGenRegisterInfo.inc"
35
createSparcMCAsmInfo(const MCRegisterInfo & MRI,const Triple & TT,const MCTargetOptions & Options)36 static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI,
37 const Triple &TT,
38 const MCTargetOptions &Options) {
39 MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
40 unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
41 MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, Reg, 0);
42 MAI->addInitialFrameState(Inst);
43 return MAI;
44 }
45
createSparcV9MCAsmInfo(const MCRegisterInfo & MRI,const Triple & TT,const MCTargetOptions & Options)46 static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI,
47 const Triple &TT,
48 const MCTargetOptions &Options) {
49 MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
50 unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
51 MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, Reg, 2047);
52 MAI->addInitialFrameState(Inst);
53 return MAI;
54 }
55
createSparcMCInstrInfo()56 static MCInstrInfo *createSparcMCInstrInfo() {
57 MCInstrInfo *X = new MCInstrInfo();
58 InitSparcMCInstrInfo(X);
59 return X;
60 }
61
createSparcMCRegisterInfo(const Triple & TT)62 static MCRegisterInfo *createSparcMCRegisterInfo(const Triple &TT) {
63 MCRegisterInfo *X = new MCRegisterInfo();
64 InitSparcMCRegisterInfo(X, SP::O7);
65 return X;
66 }
67
68 static MCSubtargetInfo *
createSparcMCSubtargetInfo(const Triple & TT,StringRef CPU,StringRef FS)69 createSparcMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
70 if (CPU.empty())
71 CPU = (TT.getArch() == Triple::sparcv9) ? "v9" : "v8";
72 return createSparcMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
73 }
74
75 static MCTargetStreamer *
createObjectTargetStreamer(MCStreamer & S,const MCSubtargetInfo & STI)76 createObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
77 return new SparcTargetELFStreamer(S);
78 }
79
createTargetAsmStreamer(MCStreamer & S,formatted_raw_ostream & OS,MCInstPrinter * InstPrint,bool isVerboseAsm)80 static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S,
81 formatted_raw_ostream &OS,
82 MCInstPrinter *InstPrint,
83 bool isVerboseAsm) {
84 return new SparcTargetAsmStreamer(S, OS);
85 }
86
createSparcMCInstPrinter(const Triple & T,unsigned SyntaxVariant,const MCAsmInfo & MAI,const MCInstrInfo & MII,const MCRegisterInfo & MRI)87 static MCInstPrinter *createSparcMCInstPrinter(const Triple &T,
88 unsigned SyntaxVariant,
89 const MCAsmInfo &MAI,
90 const MCInstrInfo &MII,
91 const MCRegisterInfo &MRI) {
92 return new SparcInstPrinter(MAI, MII, MRI);
93 }
94
LLVMInitializeSparcTargetMC()95 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcTargetMC() {
96 // Register the MC asm info.
97 RegisterMCAsmInfoFn X(getTheSparcTarget(), createSparcMCAsmInfo);
98 RegisterMCAsmInfoFn Y(getTheSparcV9Target(), createSparcV9MCAsmInfo);
99 RegisterMCAsmInfoFn Z(getTheSparcelTarget(), createSparcMCAsmInfo);
100
101 for (Target *T :
102 {&getTheSparcTarget(), &getTheSparcV9Target(), &getTheSparcelTarget()}) {
103 // Register the MC instruction info.
104 TargetRegistry::RegisterMCInstrInfo(*T, createSparcMCInstrInfo);
105
106 // Register the MC register info.
107 TargetRegistry::RegisterMCRegInfo(*T, createSparcMCRegisterInfo);
108
109 // Register the MC subtarget info.
110 TargetRegistry::RegisterMCSubtargetInfo(*T, createSparcMCSubtargetInfo);
111
112 // Register the MC Code Emitter.
113 TargetRegistry::RegisterMCCodeEmitter(*T, createSparcMCCodeEmitter);
114
115 // Register the asm backend.
116 TargetRegistry::RegisterMCAsmBackend(*T, createSparcAsmBackend);
117
118 // Register the object target streamer.
119 TargetRegistry::RegisterObjectTargetStreamer(*T,
120 createObjectTargetStreamer);
121
122 // Register the asm streamer.
123 TargetRegistry::RegisterAsmTargetStreamer(*T, createTargetAsmStreamer);
124
125 // Register the MCInstPrinter
126 TargetRegistry::RegisterMCInstPrinter(*T, createSparcMCInstPrinter);
127 }
128 }
129