1 //===-- RegisterContextPOSIXCore_powerpc.cpp --------------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9
10 #include "RegisterContextPOSIXCore_powerpc.h"
11
12 #include "lldb/Target/Thread.h"
13 #include "lldb/Utility/DataBufferHeap.h"
14 #include "lldb/Utility/RegisterValue.h"
15
16 using namespace lldb_private;
17
RegisterContextCorePOSIX_powerpc(Thread & thread,RegisterInfoInterface * register_info,const DataExtractor & gpregset,llvm::ArrayRef<CoreNote> notes)18 RegisterContextCorePOSIX_powerpc::RegisterContextCorePOSIX_powerpc(
19 Thread &thread, RegisterInfoInterface *register_info,
20 const DataExtractor &gpregset, llvm::ArrayRef<CoreNote> notes)
21 : RegisterContextPOSIX_powerpc(thread, 0, register_info) {
22 m_gpr_buffer.reset(
23 new DataBufferHeap(gpregset.GetDataStart(), gpregset.GetByteSize()));
24 m_gpr.SetData(m_gpr_buffer);
25 m_gpr.SetByteOrder(gpregset.GetByteOrder());
26
27 ArchSpec arch = register_info->GetTargetArchitecture();
28 DataExtractor fpregset = getRegset(notes, arch.GetTriple(), FPR_Desc);
29 m_fpr_buffer.reset(
30 new DataBufferHeap(fpregset.GetDataStart(), fpregset.GetByteSize()));
31 m_fpr.SetData(m_fpr_buffer);
32 m_fpr.SetByteOrder(fpregset.GetByteOrder());
33
34 DataExtractor vregset = getRegset(notes, arch.GetTriple(), PPC_VMX_Desc);
35 m_vec_buffer.reset(
36 new DataBufferHeap(vregset.GetDataStart(), vregset.GetByteSize()));
37 m_vec.SetData(m_vec_buffer);
38 m_vec.SetByteOrder(vregset.GetByteOrder());
39 }
40
~RegisterContextCorePOSIX_powerpc()41 RegisterContextCorePOSIX_powerpc::~RegisterContextCorePOSIX_powerpc() {}
42
ReadGPR()43 bool RegisterContextCorePOSIX_powerpc::ReadGPR() { return true; }
44
ReadFPR()45 bool RegisterContextCorePOSIX_powerpc::ReadFPR() { return true; }
46
ReadVMX()47 bool RegisterContextCorePOSIX_powerpc::ReadVMX() { return true; }
48
WriteGPR()49 bool RegisterContextCorePOSIX_powerpc::WriteGPR() {
50 assert(0);
51 return false;
52 }
53
WriteFPR()54 bool RegisterContextCorePOSIX_powerpc::WriteFPR() {
55 assert(0);
56 return false;
57 }
58
WriteVMX()59 bool RegisterContextCorePOSIX_powerpc::WriteVMX() {
60 assert(0);
61 return false;
62 }
63
ReadRegister(const RegisterInfo * reg_info,RegisterValue & value)64 bool RegisterContextCorePOSIX_powerpc::ReadRegister(
65 const RegisterInfo *reg_info, RegisterValue &value) {
66 lldb::offset_t offset = reg_info->byte_offset;
67 if (IsFPR(reg_info->kinds[lldb::eRegisterKindLLDB])) {
68 uint64_t v = m_fpr.GetMaxU64(&offset, reg_info->byte_size);
69 if (offset == reg_info->byte_offset + reg_info->byte_size) {
70 value = v;
71 return true;
72 }
73 } else if (IsVMX(reg_info->kinds[lldb::eRegisterKindLLDB])) {
74 uint32_t v[4];
75 offset = m_vec.CopyData(offset, reg_info->byte_size, &v);
76 if (offset == reg_info->byte_size) {
77 value.SetBytes(v, reg_info->byte_size, m_vec.GetByteOrder());
78 return true;
79 }
80 } else {
81 uint64_t v = m_gpr.GetMaxU64(&offset, reg_info->byte_size);
82 if (offset == reg_info->byte_offset + reg_info->byte_size) {
83 if (reg_info->byte_size < sizeof(v))
84 value = (uint32_t)v;
85 else
86 value = v;
87 return true;
88 }
89 }
90 return false;
91 }
92
ReadAllRegisterValues(lldb::DataBufferSP & data_sp)93 bool RegisterContextCorePOSIX_powerpc::ReadAllRegisterValues(
94 lldb::DataBufferSP &data_sp) {
95 return false;
96 }
97
WriteRegister(const RegisterInfo * reg_info,const RegisterValue & value)98 bool RegisterContextCorePOSIX_powerpc::WriteRegister(
99 const RegisterInfo *reg_info, const RegisterValue &value) {
100 return false;
101 }
102
WriteAllRegisterValues(const lldb::DataBufferSP & data_sp)103 bool RegisterContextCorePOSIX_powerpc::WriteAllRegisterValues(
104 const lldb::DataBufferSP &data_sp) {
105 return false;
106 }
107
HardwareSingleStep(bool enable)108 bool RegisterContextCorePOSIX_powerpc::HardwareSingleStep(bool enable) {
109 return false;
110 }
111