1//===- ArithmeticBase.td - Base defs for arith dialect ------*- tablegen -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef ARITHMETIC_BASE
10#define ARITHMETIC_BASE
11
12include "mlir/IR/EnumAttr.td"
13include "mlir/IR/OpBase.td"
14
15def Arithmetic_Dialect : Dialect {
16  let name = "arith";
17  let cppNamespace = "::mlir::arith";
18  let description = [{
19    The arithmetic dialect is intended to hold basic integer and floating point
20    mathematical operations. This includes unary, binary, and ternary arithmetic
21    ops, bitwise and shift ops, cast ops, and compare ops. Operations in this
22    dialect also accept vectors and tensors of integers or floats.
23  }];
24
25  let hasConstantMaterializer = 1;
26  let emitAccessorPrefix = kEmitAccessorPrefix_Prefixed;
27}
28
29// The predicate indicates the type of the comparison to perform:
30// (un)orderedness, (in)equality and less/greater than (or equal to) as
31// well as predicates that are always true or false.
32def Arith_CmpFPredicateAttr : I64EnumAttr<
33    "CmpFPredicate", "",
34    [
35      I64EnumAttrCase<"AlwaysFalse", 0, "false">,
36      I64EnumAttrCase<"OEQ", 1, "oeq">,
37      I64EnumAttrCase<"OGT", 2, "ogt">,
38      I64EnumAttrCase<"OGE", 3, "oge">,
39      I64EnumAttrCase<"OLT", 4, "olt">,
40      I64EnumAttrCase<"OLE", 5, "ole">,
41      I64EnumAttrCase<"ONE", 6, "one">,
42      I64EnumAttrCase<"ORD", 7, "ord">,
43      I64EnumAttrCase<"UEQ", 8, "ueq">,
44      I64EnumAttrCase<"UGT", 9, "ugt">,
45      I64EnumAttrCase<"UGE", 10, "uge">,
46      I64EnumAttrCase<"ULT", 11, "ult">,
47      I64EnumAttrCase<"ULE", 12, "ule">,
48      I64EnumAttrCase<"UNE", 13, "une">,
49      I64EnumAttrCase<"UNO", 14, "uno">,
50      I64EnumAttrCase<"AlwaysTrue", 15, "true">,
51    ]> {
52  let cppNamespace = "::mlir::arith";
53}
54
55def Arith_CmpIPredicateAttr : I64EnumAttr<
56    "CmpIPredicate", "",
57    [
58      I64EnumAttrCase<"eq", 0>,
59      I64EnumAttrCase<"ne", 1>,
60      I64EnumAttrCase<"slt", 2>,
61      I64EnumAttrCase<"sle", 3>,
62      I64EnumAttrCase<"sgt", 4>,
63      I64EnumAttrCase<"sge", 5>,
64      I64EnumAttrCase<"ult", 6>,
65      I64EnumAttrCase<"ule", 7>,
66      I64EnumAttrCase<"ugt", 8>,
67      I64EnumAttrCase<"uge", 9>,
68    ]> {
69  let cppNamespace = "::mlir::arith";
70}
71
72def ATOMIC_RMW_KIND_ADDF    : I64EnumAttrCase<"addf", 0>;
73def ATOMIC_RMW_KIND_ADDI    : I64EnumAttrCase<"addi", 1>;
74def ATOMIC_RMW_KIND_ASSIGN  : I64EnumAttrCase<"assign", 2>;
75def ATOMIC_RMW_KIND_MAXF    : I64EnumAttrCase<"maxf", 3>;
76def ATOMIC_RMW_KIND_MAXS    : I64EnumAttrCase<"maxs", 4>;
77def ATOMIC_RMW_KIND_MAXU    : I64EnumAttrCase<"maxu", 5>;
78def ATOMIC_RMW_KIND_MINF    : I64EnumAttrCase<"minf", 6>;
79def ATOMIC_RMW_KIND_MINS    : I64EnumAttrCase<"mins", 7>;
80def ATOMIC_RMW_KIND_MINU    : I64EnumAttrCase<"minu", 8>;
81def ATOMIC_RMW_KIND_MULF    : I64EnumAttrCase<"mulf", 9>;
82def ATOMIC_RMW_KIND_MULI    : I64EnumAttrCase<"muli", 10>;
83def ATOMIC_RMW_KIND_ORI     : I64EnumAttrCase<"ori", 11>;
84def ATOMIC_RMW_KIND_ANDI    : I64EnumAttrCase<"andi", 12>;
85
86def AtomicRMWKindAttr : I64EnumAttr<
87    "AtomicRMWKind", "",
88    [ATOMIC_RMW_KIND_ADDF, ATOMIC_RMW_KIND_ADDI, ATOMIC_RMW_KIND_ASSIGN,
89     ATOMIC_RMW_KIND_MAXF, ATOMIC_RMW_KIND_MAXS, ATOMIC_RMW_KIND_MAXU,
90     ATOMIC_RMW_KIND_MINF, ATOMIC_RMW_KIND_MINS, ATOMIC_RMW_KIND_MINU,
91     ATOMIC_RMW_KIND_MULF, ATOMIC_RMW_KIND_MULI, ATOMIC_RMW_KIND_ORI,
92     ATOMIC_RMW_KIND_ANDI]> {
93  let cppNamespace = "::mlir::arith";
94}
95
96#endif // ARITHMETIC_BASE
97