1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2011 Sandvine Incorporated ULC.
5 * Copyright (c) 2012 iXsystems, Inc.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29 /*
30 * Support for Winbond watchdog.
31 *
32 * With minor abstractions it might be possible to add support for other
33 * different Winbond Super I/O chips as well. Winbond seems to have four
34 * different types of chips, four different ways to get into extended config
35 * mode.
36 *
37 * Note: there is no serialization between the debugging sysctl handlers and
38 * the watchdog functions and possibly others poking the registers at the same
39 * time. For that at least possibly interfering sysctls are hidden by default.
40 */
41
42 #include <sys/cdefs.h>
43 __FBSDID("$FreeBSD$");
44
45 #include <sys/param.h>
46 #include <sys/kernel.h>
47 #include <sys/systm.h>
48 #include <sys/bus.h>
49 #include <sys/eventhandler.h>
50 #include <sys/module.h>
51 #include <sys/sbuf.h>
52 #include <sys/sysctl.h>
53 #include <sys/watchdog.h>
54
55 #include <dev/superio/superio.h>
56
57 #include <machine/bus.h>
58 #include <machine/resource.h>
59
60 /*
61 * Global registers.
62 */
63 #define WB_DEVICE_ID_REG 0x20 /* Device ID */
64 #define WB_DEVICE_REV_REG 0x21 /* Device revision */
65 #define WB_CR26 0x26 /* Bit6: HEFRAS (base port selector) */
66
67 /* LDN selection. */
68 #define WB_LDN_REG 0x07
69 #define WB_LDN_REG_LDN8 0x08 /* GPIO 2, Watchdog */
70
71 /*
72 * LDN8 (GPIO 2, Watchdog) specific registers and options.
73 */
74 /* CR30: LDN8 activation control. */
75 #define WB_LDN8_CR30 0x30
76 #define WB_LDN8_CR30_ACTIVE 0x01 /* 1: LD active */
77
78 /* CRF5: Watchdog scale, P20. Mapped to reg_1. */
79 #define WB_LDN8_CRF5 0xF5
80 #define WB_LDN8_CRF5_SCALE 0x08 /* 0: 1s, 1: 60s */
81 #define WB_LDN8_CRF5_KEYB_P20 0x04 /* 1: keyb P20 forces timeout */
82 #define WB_LDN8_CRF5_KBRST 0x02 /* 1: timeout causes pin60 kbd reset */
83
84 /* CRF6: Watchdog Timeout (0 == off). Mapped to reg_timeout. */
85 #define WB_LDN8_CRF6 0xF6
86
87 /* CRF7: Watchdog mouse, keyb, force, .. Mapped to reg_2. */
88 #define WB_LDN8_CRF7 0xF7
89 #define WB_LDN8_CRF7_MOUSE 0x80 /* 1: mouse irq resets wd timer */
90 #define WB_LDN8_CRF7_KEYB 0x40 /* 1: keyb irq resets wd timer */
91 #define WB_LDN8_CRF7_FORCE 0x20 /* 1: force timeout (self-clear) */
92 #define WB_LDN8_CRF7_TS 0x10 /* 0: counting, 1: fired */
93 #define WB_LDN8_CRF7_IRQS 0x0f /* irq source for watchdog, 2 == SMI */
94
95 enum chips { w83627hf, w83627s, w83697hf, w83697ug, w83637hf, w83627thf,
96 w83687thf, w83627ehf, w83627dhg, w83627uhg, w83667hg,
97 w83627dhg_p, w83667hg_b, nct6775, nct6776, nct6779, nct6791,
98 nct6792, nct6793, nct6795, nct6102 };
99
100 struct wb_softc {
101 device_t dev;
102 eventhandler_tag ev_tag;
103 enum chips chip;
104 uint8_t ctl_reg;
105 uint8_t time_reg;
106 uint8_t csr_reg;
107 int debug_verbose;
108
109 /*
110 * Special feature to let the watchdog fire at a different
111 * timeout as set by watchdog(4) but still use that API to
112 * re-load it periodically.
113 */
114 unsigned int timeout_override;
115
116 /*
117 * Space to save current state temporary and for sysctls.
118 * We want to know the timeout value and usually need two
119 * additional registers for options. Do not name them by
120 * register as these might be different by chip.
121 */
122 uint8_t reg_timeout;
123 uint8_t reg_1;
124 uint8_t reg_2;
125 };
126
127 struct winbond_vendor_device_id {
128 uint8_t device_id;
129 enum chips chip;
130 const char * descr;
131 } wb_devs[] = {
132 {
133 .device_id = 0x52,
134 .chip = w83627hf,
135 .descr = "Winbond 83627HF/F/HG/G",
136 },
137 {
138 .device_id = 0x59,
139 .chip = w83627s,
140 .descr = "Winbond 83627S",
141 },
142 {
143 .device_id = 0x60,
144 .chip = w83697hf,
145 .descr = "Winbond 83697HF",
146 },
147 {
148 .device_id = 0x68,
149 .chip = w83697ug,
150 .descr = "Winbond 83697UG",
151 },
152 {
153 .device_id = 0x70,
154 .chip = w83637hf,
155 .descr = "Winbond 83637HF",
156 },
157 {
158 .device_id = 0x82,
159 .chip = w83627thf,
160 .descr = "Winbond 83627THF",
161 },
162 {
163 .device_id = 0x85,
164 .chip = w83687thf,
165 .descr = "Winbond 83687THF",
166 },
167 {
168 .device_id = 0x88,
169 .chip = w83627ehf,
170 .descr = "Winbond 83627EHF",
171 },
172 {
173 .device_id = 0xa0,
174 .chip = w83627dhg,
175 .descr = "Winbond 83627DHG",
176 },
177 {
178 .device_id = 0xa2,
179 .chip = w83627uhg,
180 .descr = "Winbond 83627UHG",
181 },
182 {
183 .device_id = 0xa5,
184 .chip = w83667hg,
185 .descr = "Winbond 83667HG",
186 },
187 {
188 .device_id = 0xb0,
189 .chip = w83627dhg_p,
190 .descr = "Winbond 83627DHG-P",
191 },
192 {
193 .device_id = 0xb3,
194 .chip = w83667hg_b,
195 .descr = "Winbond 83667HG-B",
196 },
197 {
198 .device_id = 0xb4,
199 .chip = nct6775,
200 .descr = "Nuvoton NCT6775",
201 },
202 {
203 .device_id = 0xc3,
204 .chip = nct6776,
205 .descr = "Nuvoton NCT6776",
206 },
207 {
208 .device_id = 0xc4,
209 .chip = nct6102,
210 .descr = "Nuvoton NCT6102",
211 },
212 {
213 .device_id = 0xc5,
214 .chip = nct6779,
215 .descr = "Nuvoton NCT6779",
216 },
217 {
218 .device_id = 0xc8,
219 .chip = nct6791,
220 .descr = "Nuvoton NCT6791",
221 },
222 {
223 .device_id = 0xc9,
224 .chip = nct6792,
225 .descr = "Nuvoton NCT6792",
226 },
227 {
228 .device_id = 0xd1,
229 .chip = nct6793,
230 .descr = "Nuvoton NCT6793",
231 },
232 {
233 .device_id = 0xd3,
234 .chip = nct6795,
235 .descr = "Nuvoton NCT6795",
236 },
237 };
238
239 /*
240 * Return the watchdog related registers as we last read them. This will
241 * usually not give the current timeout or state on whether the watchdog
242 * fired.
243 */
244 static int
sysctl_wb_debug(SYSCTL_HANDLER_ARGS)245 sysctl_wb_debug(SYSCTL_HANDLER_ARGS)
246 {
247 struct wb_softc *sc;
248 struct sbuf sb;
249 int error;
250
251 sc = arg1;
252
253 sbuf_new_for_sysctl(&sb, NULL, 64, req);
254
255 sbuf_printf(&sb, "LDN8 (GPIO2, Watchdog): ");
256 sbuf_printf(&sb, "CR%02X 0x%02x ", sc->ctl_reg, sc->reg_1);
257 sbuf_printf(&sb, "CR%02X 0x%02x ", sc->time_reg, sc->reg_timeout);
258 sbuf_printf(&sb, "CR%02X 0x%02x", sc->csr_reg, sc->reg_2);
259
260 error = sbuf_finish(&sb);
261 sbuf_delete(&sb);
262 return (error);
263 }
264
265 /*
266 * Read the current values before returning them. Given this might poke
267 * the registers the same time as the watchdog, this sysctl handler should
268 * be marked CTLFLAG_SKIP to not show up by default.
269 */
270 static int
sysctl_wb_debug_current(SYSCTL_HANDLER_ARGS)271 sysctl_wb_debug_current(SYSCTL_HANDLER_ARGS)
272 {
273 struct wb_softc *sc;
274
275 sc = arg1;
276
277 sc->reg_1 = superio_read(sc->dev, sc->ctl_reg);
278 sc->reg_timeout = superio_read(sc->dev, sc->time_reg);
279 sc->reg_2 = superio_read(sc->dev, sc->csr_reg);
280
281 return (sysctl_wb_debug(oidp, arg1, arg2, req));
282 }
283
284 /*
285 * Sysctl handlers to force a watchdog timeout or to test the NMI functionality
286 * works as expetced.
287 * For testing we could set a test_nmi flag in the softc that, in case of NMI, a
288 * callback function from trap.c could check whether we fired and not report the
289 * timeout but clear the flag for the sysctl again. This is interesting given a
290 * lot of boards have jumpers to change the action on watchdog timeout or
291 * disable the watchdog completely.
292 * XXX-BZ notyet: currently no general infrastructure exists to do this.
293 */
294 static int
sysctl_wb_force_test_nmi(SYSCTL_HANDLER_ARGS)295 sysctl_wb_force_test_nmi(SYSCTL_HANDLER_ARGS)
296 {
297 struct wb_softc *sc;
298 int error, test, val;
299
300 sc = arg1;
301 test = arg2;
302
303 #ifdef notyet
304 val = sc->test_nmi;
305 #else
306 val = 0;
307 #endif
308 error = sysctl_handle_int(oidp, &val, 0, req);
309 if (error || !req->newptr)
310 return (error);
311
312 #ifdef notyet
313 /* Manually clear the test for a value of 0 and do nothing else. */
314 if (test && val == 0) {
315 sc->test_nmi = 0;
316 return (0);
317 }
318
319 /*
320 * If we are testing the NMI functionality, set the flag before
321 * forcing the timeout.
322 */
323 if (test)
324 sc->test_nmi = 1;
325 #endif
326
327 /* Force watchdog to fire. */
328 sc->reg_2 = superio_read(sc->dev, sc->csr_reg);
329 sc->reg_2 |= WB_LDN8_CRF7_FORCE;
330 superio_write(sc->dev, sc->csr_reg, sc->reg_2);
331
332 return (0);
333 }
334
335 /*
336 * Print current watchdog state.
337 *
338 * Note: it is the responsibility of the caller to update the registers
339 * upfront.
340 */
341 static void
wb_print_state(struct wb_softc * sc,const char * msg)342 wb_print_state(struct wb_softc *sc, const char *msg)
343 {
344
345 device_printf(sc->dev, "%s%sWatchdog %sabled. %s"
346 "Scaling by %ds, timer at %d (%s=%ds%s). "
347 "CR%02X 0x%02x CR%02X 0x%02x\n",
348 (msg != NULL) ? msg : "", (msg != NULL) ? ": " : "",
349 (sc->reg_timeout > 0x00) ? "en" : "dis",
350 (sc->reg_2 & WB_LDN8_CRF7_TS) ? "Watchdog fired. " : "",
351 (sc->reg_1 & WB_LDN8_CRF5_SCALE) ? 60 : 1,
352 sc->reg_timeout,
353 (sc->reg_timeout > 0x00) ? "<" : "",
354 sc->reg_timeout * ((sc->reg_1 & WB_LDN8_CRF5_SCALE) ? 60 : 1),
355 (sc->reg_timeout > 0x00) ? " left" : "",
356 sc->ctl_reg, sc->reg_1, sc->csr_reg, sc->reg_2);
357 }
358
359 /*
360 * (Re)load the watchdog counter depending on timeout. A timeout of 0 will
361 * disable the watchdog.
362 */
363 static int
wb_set_watchdog(struct wb_softc * sc,unsigned int timeout)364 wb_set_watchdog(struct wb_softc *sc, unsigned int timeout)
365 {
366
367 if (timeout != 0) {
368 /*
369 * In case an override is set, let it override. It may lead
370 * to strange results as we do not check the input of the sysctl.
371 */
372 if (sc->timeout_override > 0)
373 timeout = sc->timeout_override;
374
375 /* Make sure we support the requested timeout. */
376 if (timeout > 255 * 60)
377 return (EINVAL);
378 }
379
380 if (sc->debug_verbose)
381 wb_print_state(sc, "Before watchdog counter (re)load");
382
383 if (timeout == 0) {
384 /* Disable watchdog. */
385 sc->reg_timeout = 0;
386 superio_write(sc->dev, sc->time_reg, sc->reg_timeout);
387
388 } else {
389 /* Read current scaling factor. */
390 sc->reg_1 = superio_read(sc->dev, sc->ctl_reg);
391
392 if (timeout > 255) {
393 /* Set scaling factor to 60s. */
394 sc->reg_1 |= WB_LDN8_CRF5_SCALE;
395 sc->reg_timeout = (timeout / 60);
396 if (timeout % 60)
397 sc->reg_timeout++;
398 } else {
399 /* Set scaling factor to 1s. */
400 sc->reg_1 &= ~WB_LDN8_CRF5_SCALE;
401 sc->reg_timeout = timeout;
402 }
403
404 /* In case we fired before we need to clear to fire again. */
405 sc->reg_2 = superio_read(sc->dev, sc->csr_reg);
406 if (sc->reg_2 & WB_LDN8_CRF7_TS) {
407 sc->reg_2 &= ~WB_LDN8_CRF7_TS;
408 superio_write(sc->dev, sc->csr_reg, sc->reg_2);
409 }
410
411 /* Write back scaling factor. */
412 superio_write(sc->dev, sc->ctl_reg, sc->reg_1);
413
414 /* Set timer and arm/reset the watchdog. */
415 superio_write(sc->dev, sc->time_reg, sc->reg_timeout);
416 }
417
418 if (sc->debug_verbose)
419 wb_print_state(sc, "After watchdog counter (re)load");
420 return (0);
421 }
422
423 /*
424 * watchdog(9) EVENTHANDLER function implementation to (re)load the counter
425 * with the given timeout or disable the watchdog.
426 */
427 static void
wb_watchdog_fn(void * private,u_int cmd,int * error)428 wb_watchdog_fn(void *private, u_int cmd, int *error)
429 {
430 struct wb_softc *sc;
431 unsigned int timeout;
432 int e;
433
434 sc = private;
435 KASSERT(sc != NULL, ("%s: watchdog handler function called without "
436 "softc.", __func__));
437
438 cmd &= WD_INTERVAL;
439 if (cmd > 0 && cmd <= 63) {
440 /* Reset (and arm) watchdog. */
441 timeout = ((uint64_t)1 << cmd) / 1000000000;
442 if (timeout == 0)
443 timeout = 1;
444 e = wb_set_watchdog(sc, timeout);
445 if (e == 0) {
446 if (error != NULL)
447 *error = 0;
448 } else {
449 /* On error, try to make sure the WD is disabled. */
450 wb_set_watchdog(sc, 0);
451 }
452
453 } else {
454 /* Disable watchdog. */
455 e = wb_set_watchdog(sc, 0);
456 if (e != 0 && cmd == 0 && error != NULL) {
457 /* Failed to disable watchdog. */
458 *error = EOPNOTSUPP;
459 }
460 }
461 }
462
463 static int
wb_probe(device_t dev)464 wb_probe(device_t dev)
465 {
466 char buf[128];
467 struct wb_softc *sc;
468 int j;
469 uint8_t devid;
470 uint8_t revid;
471
472 if (superio_vendor(dev) != SUPERIO_VENDOR_NUVOTON)
473 return (ENXIO);
474 if (superio_get_type(dev) != SUPERIO_DEV_WDT)
475 return (ENXIO);
476
477 sc = device_get_softc(dev);
478 devid = superio_devid(dev) >> 8;
479 revid = superio_revid(dev);
480 for (j = 0; j < nitems(wb_devs); j++) {
481 if (wb_devs[j].device_id == devid) {
482 sc->chip = wb_devs[j].chip;
483 snprintf(buf, sizeof(buf),
484 "%s (0x%02x/0x%02x) Watchdog Timer",
485 wb_devs[j].descr, devid, revid);
486 device_set_desc_copy(dev, buf);
487 return (BUS_PROBE_SPECIFIC);
488 }
489 }
490 if (bootverbose) {
491 device_printf(dev,
492 "unrecognized chip: devid 0x%02x, revid 0x%02x\n",
493 devid, revid);
494 }
495 return (ENXIO);
496 }
497
498 static int
wb_attach(device_t dev)499 wb_attach(device_t dev)
500 {
501 struct wb_softc *sc;
502 struct sysctl_ctx_list *sctx;
503 struct sysctl_oid *soid;
504 unsigned long timeout;
505 uint8_t t;
506
507 sc = device_get_softc(dev);
508 sc->dev = dev;
509
510 /* Make sure WDT is enabled. */
511 superio_dev_enable(dev, WB_LDN8_CR30_ACTIVE);
512
513 switch (sc->chip) {
514 case w83697hf:
515 case w83697ug:
516 sc->ctl_reg = 0xf3;
517 sc->time_reg = 0xf4;
518 sc->csr_reg = 0xf7;
519 break;
520 case nct6102:
521 sc->ctl_reg = 0xf0;
522 sc->time_reg = 0xf1;
523 sc->csr_reg = 0xf2;
524 break;
525 default:
526 sc->ctl_reg = 0xf5;
527 sc->time_reg = 0xf6;
528 sc->csr_reg = 0xf7;
529 break;
530 }
531
532 switch (sc->chip) {
533 case w83627hf:
534 case w83627s:
535 t = superio_read(dev, 0x2B) & ~0x10;
536 superio_write(dev, 0x2B, t); /* set GPIO24 to WDT0 */
537 break;
538 case w83697hf:
539 /* Set pin 119 to WDTO# mode (= CR29, WDT0) */
540 t = superio_read(dev, 0x29) & ~0x60;
541 t |= 0x20;
542 superio_write(dev, 0x29, t);
543 break;
544 case w83697ug:
545 /* Set pin 118 to WDTO# mode */
546 t = superio_read(dev, 0x2b) & ~0x04;
547 superio_write(dev, 0x2b, t);
548 break;
549 case w83627thf:
550 t = (superio_read(dev, 0x2B) & ~0x08) | 0x04;
551 superio_write(dev, 0x2B, t); /* set GPIO3 to WDT0 */
552 break;
553 case w83627dhg:
554 case w83627dhg_p:
555 t = superio_read(dev, 0x2D) & ~0x01; /* PIN77 -> WDT0# */
556 superio_write(dev, 0x2D, t); /* set GPIO5 to WDT0 */
557 t = superio_read(dev, sc->ctl_reg);
558 t |= 0x02; /* enable the WDTO# output low pulse
559 * to the KBRST# pin */
560 superio_write(dev, sc->ctl_reg, t);
561 break;
562 case w83637hf:
563 break;
564 case w83687thf:
565 t = superio_read(dev, 0x2C) & ~0x80; /* PIN47 -> WDT0# */
566 superio_write(dev, 0x2C, t);
567 break;
568 case w83627ehf:
569 case w83627uhg:
570 case w83667hg:
571 case w83667hg_b:
572 case nct6775:
573 case nct6776:
574 case nct6779:
575 case nct6791:
576 case nct6792:
577 case nct6793:
578 case nct6795:
579 case nct6102:
580 /*
581 * These chips have a fixed WDTO# output pin (W83627UHG),
582 * or support more than one WDTO# output pin.
583 * Don't touch its configuration, and hope the BIOS
584 * does the right thing.
585 */
586 t = superio_read(dev, sc->ctl_reg);
587 t |= 0x02; /* enable the WDTO# output low pulse
588 * to the KBRST# pin */
589 superio_write(dev, sc->ctl_reg, t);
590 break;
591 default:
592 break;
593 }
594
595 /* Read the current watchdog configuration. */
596 sc->reg_1 = superio_read(dev, sc->ctl_reg);
597 sc->reg_timeout = superio_read(dev, sc->time_reg);
598 sc->reg_2 = superio_read(dev, sc->csr_reg);
599
600 /* Print current state if bootverbose or watchdog already enabled. */
601 if (bootverbose || (sc->reg_timeout > 0x00))
602 wb_print_state(sc, "Before watchdog attach");
603
604 sc->reg_1 &= ~WB_LDN8_CRF5_KEYB_P20;
605 sc->reg_1 |= WB_LDN8_CRF5_KBRST;
606 superio_write(dev, sc->ctl_reg, sc->reg_1);
607
608 /*
609 * Clear a previous watchdog timeout event (if still set).
610 * Disable timer reset on mouse interrupts. Leave reset on keyboard,
611 * since one of my boards is getting stuck in reboot without it.
612 */
613 sc->reg_2 &= ~(WB_LDN8_CRF7_MOUSE|WB_LDN8_CRF7_TS);
614 superio_write(dev, sc->csr_reg, sc->reg_2);
615
616 /* Read global timeout override tunable, Add per device sysctls. */
617 if (TUNABLE_ULONG_FETCH("hw.wbwd.timeout_override", &timeout)) {
618 if (timeout > 0)
619 sc->timeout_override = timeout;
620 }
621 sctx = device_get_sysctl_ctx(dev);
622 soid = device_get_sysctl_tree(dev);
623 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO,
624 "timeout_override", CTLFLAG_RW, &sc->timeout_override, 0,
625 "Timeout in seconds overriding default watchdog timeout");
626 SYSCTL_ADD_INT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO,
627 "debug_verbose", CTLFLAG_RW, &sc->debug_verbose, 0,
628 "Enables extra debugging information");
629 SYSCTL_ADD_PROC(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "debug",
630 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, 0,
631 sysctl_wb_debug, "A",
632 "Selected register information from last change by driver");
633 SYSCTL_ADD_PROC(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "debug_current",
634 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_SKIP | CTLFLAG_MPSAFE,
635 sc, 0, sysctl_wb_debug_current, "A",
636 "Selected register information (may interfere)");
637 SYSCTL_ADD_PROC(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "force_timeout",
638 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_SKIP | CTLFLAG_MPSAFE, sc, 0,
639 sysctl_wb_force_test_nmi, "I", "Enable to force watchdog to fire.");
640
641 /* Register watchdog. */
642 sc->ev_tag = EVENTHANDLER_REGISTER(watchdog_list, wb_watchdog_fn, sc,
643 0);
644
645 if (bootverbose)
646 wb_print_state(sc, "After watchdog attach");
647
648 return (0);
649 }
650
651 static int
wb_detach(device_t dev)652 wb_detach(device_t dev)
653 {
654 struct wb_softc *sc;
655
656 sc = device_get_softc(dev);
657
658 /* Unregister and stop the watchdog if running. */
659 if (sc->ev_tag)
660 EVENTHANDLER_DEREGISTER(watchdog_list, sc->ev_tag);
661 wb_set_watchdog(sc, 0);
662
663 /* Bus subroutines take care of sysctls already. */
664
665 return (0);
666 }
667
668 static device_method_t wb_methods[] = {
669 /* Device interface */
670 DEVMETHOD(device_probe, wb_probe),
671 DEVMETHOD(device_attach, wb_attach),
672 DEVMETHOD(device_detach, wb_detach),
673
674 DEVMETHOD_END
675 };
676
677 static driver_t wb_driver = {
678 "wbwd",
679 wb_methods,
680 sizeof(struct wb_softc)
681 };
682
683 static devclass_t wb_devclass;
684
685 DRIVER_MODULE(wb, superio, wb_driver, wb_devclass, NULL, NULL);
686 MODULE_DEPEND(wb, superio, 1, 1, 1);
687 MODULE_VERSION(wb, 1);
688