1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2014-2021 Broadcom
3  * All rights reserved.
4  */
5 
6 /* date: Fri Oct  8 11:41:10 2021 */
7 
8 #include "ulp_template_db_enum.h"
9 #include "ulp_template_db_field.h"
10 #include "ulp_template_struct.h"
11 #include "ulp_template_db_tbl.h"
12 
13 /* Mapper templates for header act list */
14 struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_act_tmpl_list[] = {
15 	/* act_tid: 1, ingress */
16 	[1] = {
17 	.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
18 	.num_tbls = 5,
19 	.start_tbl_idx = 0,
20 	.reject_info = {
21 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
22 		.cond_start_idx = 0,
23 		.cond_nums = 9 }
24 	},
25 	/* act_tid: 2, ingress */
26 	[2] = {
27 	.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
28 	.num_tbls = 7,
29 	.start_tbl_idx = 5,
30 	.reject_info = {
31 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
32 		.cond_start_idx = 14,
33 		.cond_nums = 0 }
34 	},
35 	/* act_tid: 3, ingress */
36 	[3] = {
37 	.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
38 	.num_tbls = 7,
39 	.start_tbl_idx = 12,
40 	.reject_info = {
41 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
42 		.cond_start_idx = 15,
43 		.cond_nums = 0 }
44 	},
45 	/* act_tid: 4, egress */
46 	[4] = {
47 	.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
48 	.num_tbls = 5,
49 	.start_tbl_idx = 19,
50 	.reject_info = {
51 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
52 		.cond_start_idx = 21,
53 		.cond_nums = 0 }
54 	},
55 	/* act_tid: 5, egress */
56 	[5] = {
57 	.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
58 	.num_tbls = 7,
59 	.start_tbl_idx = 24,
60 	.reject_info = {
61 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
62 		.cond_start_idx = 29,
63 		.cond_nums = 0 }
64 	},
65 	/* act_tid: 6, egress */
66 	[6] = {
67 	.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
68 	.num_tbls = 6,
69 	.start_tbl_idx = 31,
70 	.reject_info = {
71 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
72 		.cond_start_idx = 35,
73 		.cond_nums = 0 }
74 	}
75 };
76 
77 struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
78 	{ /* act_tid: 1, , table: shared_mirror_record.rd */
79 	.resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
80 	.resource_type = TF_TBL_TYPE_MIRROR_CONFIG,
81 	.resource_sub_type =
82 		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_MIRROR,
83 	.direction = TF_DIR_RX,
84 	.execute_info = {
85 		.cond_true_goto  = 1,
86 		.cond_false_goto = 1,
87 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
88 		.cond_start_idx = 9,
89 		.cond_nums = 1 },
90 	.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
91 	.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
92 	.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
93 	.key_start_idx = 0,
94 	.blob_key_bit_size = 1,
95 	.key_bit_size = 1,
96 	.key_num_fields = 1,
97 	.ident_start_idx = 0,
98 	.ident_nums = 1
99 	},
100 	{ /* act_tid: 1, , table: int_flow_counter_tbl.0 */
101 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
102 	.resource_type = TF_TBL_TYPE_ACT_STATS_64,
103 	.resource_sub_type =
104 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT,
105 	.direction = TF_DIR_RX,
106 	.execute_info = {
107 		.cond_true_goto  = 1,
108 		.cond_false_goto = 1,
109 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
110 		.cond_start_idx = 10,
111 		.cond_nums = 1 },
112 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,
113 	.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,
114 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
115 	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
116 	.result_start_idx = 0,
117 	.result_bit_size = 64,
118 	.result_num_fields = 1
119 	},
120 	{ /* act_tid: 1, , table: int_vtag_encap_record.0 */
121 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
122 	.resource_type = TF_TBL_TYPE_ACT_ENCAP_8B,
123 	.resource_sub_type =
124 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
125 	.direction = TF_DIR_RX,
126 	.execute_info = {
127 		.cond_true_goto  = 1,
128 		.cond_false_goto = 1,
129 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
130 		.cond_start_idx = 11,
131 		.cond_nums = 1 },
132 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
133 	.tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,
134 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
135 	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
136 	.record_size = 8,
137 	.result_start_idx = 1,
138 	.result_bit_size = 0,
139 	.result_num_fields = 0,
140 	.encap_num_fields = 11
141 	},
142 	{ /* act_tid: 1, , table: int_full_act_record.0 */
143 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
144 	.resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
145 	.resource_sub_type =
146 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
147 	.direction = TF_DIR_RX,
148 	.execute_info = {
149 		.cond_true_goto  = 1,
150 		.cond_false_goto = 1,
151 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
152 		.cond_start_idx = 12,
153 		.cond_nums = 1 },
154 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
155 	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
156 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
157 	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
158 	.result_start_idx = 12,
159 	.result_bit_size = 128,
160 	.result_num_fields = 26,
161 	.encap_num_fields = 0
162 	},
163 	{ /* act_tid: 1, , table: ext_full_act_record.0 */
164 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
165 	.resource_type = TF_TBL_TYPE_EXT,
166 	.resource_sub_type =
167 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
168 	.direction = TF_DIR_RX,
169 	.execute_info = {
170 		.cond_true_goto  = 0,
171 		.cond_false_goto = 0,
172 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
173 		.cond_start_idx = 13,
174 		.cond_nums = 1 },
175 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
176 	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
177 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
178 	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
179 	.result_start_idx = 38,
180 	.result_bit_size = 128,
181 	.result_num_fields = 26,
182 	.encap_num_fields = 11
183 	},
184 	{ /* act_tid: 2, , table: control.0 */
185 	.resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,
186 	.direction = TF_DIR_RX,
187 	.execute_info = {
188 		.cond_true_goto  = 1,
189 		.cond_false_goto = 1,
190 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
191 		.cond_start_idx = 14,
192 		.cond_nums = 0 },
193 	.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
194 	.fdb_operand = BNXT_ULP_RF_IDX_RID
195 	},
196 	{ /* act_tid: 2, , table: mirror_tbl.alloc */
197 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
198 	.resource_type = TF_TBL_TYPE_MIRROR_CONFIG,
199 	.resource_sub_type =
200 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
201 	.direction = TF_DIR_RX,
202 	.execute_info = {
203 		.cond_true_goto  = 1,
204 		.cond_false_goto = 1,
205 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
206 		.cond_start_idx = 14,
207 		.cond_nums = 0 },
208 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,
209 	.tbl_operand = BNXT_ULP_RF_IDX_MIRROR_PTR_0,
210 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,
211 	.fdb_operand = BNXT_ULP_RF_IDX_RID,
212 	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
213 	.result_start_idx = 75,
214 	.result_bit_size = 32,
215 	.result_num_fields = 6
216 	},
217 	{ /* act_tid: 2, , table: int_flow_counter_tbl.0 */
218 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
219 	.resource_type = TF_TBL_TYPE_ACT_STATS_64,
220 	.resource_sub_type =
221 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT,
222 	.direction = TF_DIR_RX,
223 	.execute_info = {
224 		.cond_true_goto  = 1,
225 		.cond_false_goto = 1,
226 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
227 		.cond_start_idx = 14,
228 		.cond_nums = 1 },
229 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,
230 	.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,
231 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,
232 	.fdb_operand = BNXT_ULP_RF_IDX_RID,
233 	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
234 	.result_start_idx = 81,
235 	.result_bit_size = 64,
236 	.result_num_fields = 1
237 	},
238 	{ /* act_tid: 2, , table: int_full_act_record.0 */
239 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
240 	.resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
241 	.resource_sub_type =
242 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
243 	.direction = TF_DIR_RX,
244 	.execute_info = {
245 		.cond_true_goto  = 1,
246 		.cond_false_goto = 1,
247 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
248 		.cond_start_idx = 15,
249 		.cond_nums = 0 },
250 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
251 	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
252 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,
253 	.fdb_operand = BNXT_ULP_RF_IDX_RID,
254 	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
255 	.result_start_idx = 82,
256 	.result_bit_size = 128,
257 	.result_num_fields = 26,
258 	.encap_num_fields = 0
259 	},
260 	{ /* act_tid: 2, , table: ext_full_act_record.0 */
261 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
262 	.resource_type = TF_TBL_TYPE_EXT,
263 	.resource_sub_type =
264 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
265 	.direction = TF_DIR_RX,
266 	.execute_info = {
267 		.cond_true_goto  = 1,
268 		.cond_false_goto = 1,
269 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
270 		.cond_start_idx = 15,
271 		.cond_nums = 0 },
272 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
273 	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
274 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,
275 	.fdb_operand = BNXT_ULP_RF_IDX_RID,
276 	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
277 	.result_start_idx = 108,
278 	.result_bit_size = 128,
279 	.result_num_fields = 26,
280 	.encap_num_fields = 11
281 	},
282 	{ /* act_tid: 2, , table: mirror_tbl.wr */
283 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
284 	.resource_type = TF_TBL_TYPE_MIRROR_CONFIG,
285 	.resource_sub_type =
286 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
287 	.direction = TF_DIR_RX,
288 	.execute_info = {
289 		.cond_true_goto  = 1,
290 		.cond_false_goto = 1,
291 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
292 		.cond_start_idx = 15,
293 		.cond_nums = 0 },
294 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_REGFILE,
295 	.tbl_operand = BNXT_ULP_RF_IDX_MIRROR_PTR_0,
296 	.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
297 	.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
298 	.result_start_idx = 145,
299 	.result_bit_size = 32,
300 	.result_num_fields = 6
301 	},
302 	{ /* act_tid: 2, , table: shared_mirror_record.wr */
303 	.resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
304 	.resource_type = TF_TBL_TYPE_MIRROR_CONFIG,
305 	.resource_sub_type =
306 		BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_MIRROR,
307 	.direction = TF_DIR_RX,
308 	.execute_info = {
309 		.cond_true_goto  = 0,
310 		.cond_false_goto = 0,
311 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
312 		.cond_start_idx = 15,
313 		.cond_nums = 0 },
314 	.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
315 	.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
316 	.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
317 	.key_start_idx = 1,
318 	.blob_key_bit_size = 1,
319 	.key_bit_size = 1,
320 	.key_num_fields = 1,
321 	.result_start_idx = 151,
322 	.result_bit_size = 34,
323 	.result_num_fields = 2
324 	},
325 	{ /* act_tid: 3, , table: control.0 */
326 	.resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,
327 	.direction = TF_DIR_RX,
328 	.execute_info = {
329 		.cond_true_goto  = 1023,
330 		.cond_false_goto = 1,
331 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
332 		.cond_start_idx = 15,
333 		.cond_nums = 1 },
334 	.fdb_opcode = BNXT_ULP_FDB_OPC_NOP
335 	},
336 	{ /* act_tid: 3, , table: int_flow_counter_tbl.0 */
337 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
338 	.resource_type = TF_TBL_TYPE_ACT_STATS_64,
339 	.resource_sub_type =
340 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT,
341 	.direction = TF_DIR_RX,
342 	.execute_info = {
343 		.cond_true_goto  = 1,
344 		.cond_false_goto = 1,
345 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
346 		.cond_start_idx = 16,
347 		.cond_nums = 1 },
348 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,
349 	.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,
350 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
351 	.result_start_idx = 153,
352 	.result_bit_size = 64,
353 	.result_num_fields = 1
354 	},
355 	{ /* act_tid: 3, , table: act_modify_ipv4_src.0 */
356 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
357 	.resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4,
358 	.resource_sub_type =
359 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
360 	.direction = TF_DIR_RX,
361 	.execute_info = {
362 		.cond_true_goto  = 1,
363 		.cond_false_goto = 1,
364 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
365 		.cond_start_idx = 17,
366 		.cond_nums = 1 },
367 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
368 	.tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0,
369 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
370 	.result_start_idx = 154,
371 	.result_bit_size = 32,
372 	.result_num_fields = 1
373 	},
374 	{ /* act_tid: 3, , table: act_modify_ipv4_dst.0 */
375 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
376 	.resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4,
377 	.resource_sub_type =
378 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
379 	.direction = TF_DIR_RX,
380 	.execute_info = {
381 		.cond_true_goto  = 1,
382 		.cond_false_goto = 1,
383 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
384 		.cond_start_idx = 18,
385 		.cond_nums = 1 },
386 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
387 	.tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0,
388 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
389 	.result_start_idx = 155,
390 	.result_bit_size = 32,
391 	.result_num_fields = 1
392 	},
393 	{ /* act_tid: 3, , table: int_encap_mac_record.0 */
394 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
395 	.resource_type = TF_TBL_TYPE_ACT_ENCAP_16B,
396 	.resource_sub_type =
397 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
398 	.direction = TF_DIR_RX,
399 	.execute_info = {
400 		.cond_true_goto  = 1,
401 		.cond_false_goto = 1,
402 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
403 		.cond_start_idx = 19,
404 		.cond_nums = 0 },
405 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,
406 	.tbl_operand = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR,
407 	.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
408 	.record_size = 16,
409 	.result_start_idx = 156,
410 	.result_bit_size = 0,
411 	.result_num_fields = 0,
412 	.encap_num_fields = 11
413 	},
414 	{ /* act_tid: 3, , table: int_full_act_record.0 */
415 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
416 	.resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
417 	.resource_sub_type =
418 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
419 	.direction = TF_DIR_RX,
420 	.execute_info = {
421 		.cond_true_goto  = 1,
422 		.cond_false_goto = 1,
423 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
424 		.cond_start_idx = 19,
425 		.cond_nums = 1 },
426 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
427 	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
428 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
429 	.result_start_idx = 167,
430 	.result_bit_size = 128,
431 	.result_num_fields = 26
432 	},
433 	{ /* act_tid: 3, , table: ext_full_act_record.0 */
434 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
435 	.resource_type = TF_TBL_TYPE_EXT,
436 	.resource_sub_type =
437 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
438 	.direction = TF_DIR_RX,
439 	.execute_info = {
440 		.cond_true_goto  = 0,
441 		.cond_false_goto = 0,
442 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
443 		.cond_start_idx = 20,
444 		.cond_nums = 1 },
445 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
446 	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
447 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
448 	.result_start_idx = 193,
449 	.result_bit_size = 128,
450 	.result_num_fields = 26,
451 	.encap_num_fields = 11
452 	},
453 	{ /* act_tid: 4, , table: int_flow_counter_tbl.0 */
454 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
455 	.resource_type = TF_TBL_TYPE_ACT_STATS_64,
456 	.resource_sub_type =
457 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT,
458 	.direction = TF_DIR_TX,
459 	.execute_info = {
460 		.cond_true_goto  = 1,
461 		.cond_false_goto = 1,
462 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
463 		.cond_start_idx = 21,
464 		.cond_nums = 1 },
465 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,
466 	.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,
467 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
468 	.result_start_idx = 230,
469 	.result_bit_size = 64,
470 	.result_num_fields = 1
471 	},
472 	{ /* act_tid: 4, , table: int_vtag_encap_record.0 */
473 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
474 	.resource_type = TF_TBL_TYPE_ACT_ENCAP_16B,
475 	.resource_sub_type =
476 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
477 	.direction = TF_DIR_TX,
478 	.execute_info = {
479 		.cond_true_goto  = 1,
480 		.cond_false_goto = 1,
481 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
482 		.cond_start_idx = 22,
483 		.cond_nums = 2 },
484 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
485 	.tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,
486 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
487 	.record_size = 8,
488 	.result_start_idx = 231,
489 	.result_bit_size = 0,
490 	.result_num_fields = 0,
491 	.encap_num_fields = 11
492 	},
493 	{ /* act_tid: 4, , table: int_full_act_record.0 */
494 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
495 	.resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
496 	.resource_sub_type =
497 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
498 	.direction = TF_DIR_TX,
499 	.execute_info = {
500 		.cond_true_goto  = 1,
501 		.cond_false_goto = 1,
502 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
503 		.cond_start_idx = 24,
504 		.cond_nums = 1 },
505 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
506 	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
507 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
508 	.result_start_idx = 242,
509 	.result_bit_size = 128,
510 	.result_num_fields = 26
511 	},
512 	{ /* act_tid: 4, , table: ext_full_act_record.no_tag */
513 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
514 	.resource_type = TF_TBL_TYPE_EXT,
515 	.resource_sub_type =
516 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
517 	.direction = TF_DIR_TX,
518 	.execute_info = {
519 		.cond_true_goto  = 1,
520 		.cond_false_goto = 1,
521 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
522 		.cond_start_idx = 25,
523 		.cond_nums = 2 },
524 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
525 	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
526 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
527 	.result_start_idx = 268,
528 	.result_bit_size = 128,
529 	.result_num_fields = 26,
530 	.encap_num_fields = 11
531 	},
532 	{ /* act_tid: 4, , table: ext_full_act_record.one_tag */
533 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
534 	.resource_type = TF_TBL_TYPE_EXT,
535 	.resource_sub_type =
536 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
537 	.direction = TF_DIR_TX,
538 	.execute_info = {
539 		.cond_true_goto  = 0,
540 		.cond_false_goto = 0,
541 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
542 		.cond_start_idx = 27,
543 		.cond_nums = 2 },
544 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
545 	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
546 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
547 	.result_start_idx = 305,
548 	.result_bit_size = 128,
549 	.result_num_fields = 26,
550 	.encap_num_fields = 11
551 	},
552 	{ /* act_tid: 5, , table: control.0 */
553 	.resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,
554 	.direction = TF_DIR_TX,
555 	.execute_info = {
556 		.cond_true_goto  = 1023,
557 		.cond_false_goto = 1,
558 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
559 		.cond_start_idx = 29,
560 		.cond_nums = 1 },
561 	.fdb_opcode = BNXT_ULP_FDB_OPC_NOP
562 	},
563 	{ /* act_tid: 5, , table: int_flow_counter_tbl.0 */
564 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
565 	.resource_type = TF_TBL_TYPE_ACT_STATS_64,
566 	.resource_sub_type =
567 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT,
568 	.direction = TF_DIR_TX,
569 	.execute_info = {
570 		.cond_true_goto  = 1,
571 		.cond_false_goto = 1,
572 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
573 		.cond_start_idx = 30,
574 		.cond_nums = 1 },
575 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,
576 	.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,
577 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
578 	.result_start_idx = 342,
579 	.result_bit_size = 64,
580 	.result_num_fields = 1
581 	},
582 	{ /* act_tid: 5, , table: act_modify_ipv4_src.0 */
583 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
584 	.resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4,
585 	.resource_sub_type =
586 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
587 	.direction = TF_DIR_TX,
588 	.execute_info = {
589 		.cond_true_goto  = 1,
590 		.cond_false_goto = 1,
591 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
592 		.cond_start_idx = 31,
593 		.cond_nums = 1 },
594 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
595 	.tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0,
596 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
597 	.result_start_idx = 343,
598 	.result_bit_size = 32,
599 	.result_num_fields = 1
600 	},
601 	{ /* act_tid: 5, , table: act_modify_ipv4_dst.0 */
602 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
603 	.resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4,
604 	.resource_sub_type =
605 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
606 	.direction = TF_DIR_TX,
607 	.execute_info = {
608 		.cond_true_goto  = 1,
609 		.cond_false_goto = 1,
610 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
611 		.cond_start_idx = 32,
612 		.cond_nums = 1 },
613 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
614 	.tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0,
615 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
616 	.result_start_idx = 344,
617 	.result_bit_size = 32,
618 	.result_num_fields = 1
619 	},
620 	{ /* act_tid: 5, , table: int_encap_mac_record.dummy */
621 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
622 	.resource_type = TF_TBL_TYPE_ACT_ENCAP_16B,
623 	.resource_sub_type =
624 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
625 	.direction = TF_DIR_TX,
626 	.execute_info = {
627 		.cond_true_goto  = 1,
628 		.cond_false_goto = 1,
629 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
630 		.cond_start_idx = 33,
631 		.cond_nums = 0 },
632 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,
633 	.tbl_operand = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR,
634 	.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
635 	.record_size = 16,
636 	.result_start_idx = 345,
637 	.result_bit_size = 0,
638 	.result_num_fields = 0,
639 	.encap_num_fields = 11
640 	},
641 	{ /* act_tid: 5, , table: int_full_act_record.0 */
642 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
643 	.resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
644 	.resource_sub_type =
645 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
646 	.direction = TF_DIR_TX,
647 	.execute_info = {
648 		.cond_true_goto  = 1,
649 		.cond_false_goto = 1,
650 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
651 		.cond_start_idx = 33,
652 		.cond_nums = 1 },
653 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
654 	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
655 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
656 	.result_start_idx = 356,
657 	.result_bit_size = 128,
658 	.result_num_fields = 26
659 	},
660 	{ /* act_tid: 5, , table: ext_full_act_record.0 */
661 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
662 	.resource_type = TF_TBL_TYPE_EXT,
663 	.resource_sub_type =
664 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
665 	.direction = TF_DIR_TX,
666 	.execute_info = {
667 		.cond_true_goto  = 0,
668 		.cond_false_goto = 0,
669 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
670 		.cond_start_idx = 34,
671 		.cond_nums = 1 },
672 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
673 	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
674 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
675 	.result_start_idx = 382,
676 	.result_bit_size = 128,
677 	.result_num_fields = 26,
678 	.encap_num_fields = 11
679 	},
680 	{ /* act_tid: 6, , table: int_flow_counter_tbl.0 */
681 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
682 	.resource_type = TF_TBL_TYPE_ACT_STATS_64,
683 	.resource_sub_type =
684 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT,
685 	.direction = TF_DIR_TX,
686 	.execute_info = {
687 		.cond_true_goto  = 1,
688 		.cond_false_goto = 1,
689 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
690 		.cond_start_idx = 35,
691 		.cond_nums = 1 },
692 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,
693 	.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,
694 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
695 	.result_start_idx = 419,
696 	.result_bit_size = 64,
697 	.result_num_fields = 1
698 	},
699 	{ /* act_tid: 6, , table: sp_smac_ipv4.0 */
700 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
701 	.resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4,
702 	.resource_sub_type =
703 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
704 	.direction = TF_DIR_TX,
705 	.execute_info = {
706 		.cond_true_goto  = 1,
707 		.cond_false_goto = 1,
708 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
709 		.cond_start_idx = 36,
710 		.cond_nums = 1 },
711 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
712 	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_SP_PTR,
713 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
714 	.record_size = 16,
715 	.result_start_idx = 420,
716 	.result_bit_size = 0,
717 	.result_num_fields = 0,
718 	.encap_num_fields = 2
719 	},
720 	{ /* act_tid: 6, , table: sp_smac_ipv6.0 */
721 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
722 	.resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6,
723 	.resource_sub_type =
724 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
725 	.direction = TF_DIR_TX,
726 	.execute_info = {
727 		.cond_true_goto  = 1,
728 		.cond_false_goto = 1,
729 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
730 		.cond_start_idx = 37,
731 		.cond_nums = 1 },
732 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
733 	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_SP_PTR,
734 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
735 	.record_size = 24,
736 	.result_start_idx = 422,
737 	.result_bit_size = 0,
738 	.result_num_fields = 0,
739 	.encap_num_fields = 2
740 	},
741 	{ /* act_tid: 6, , table: int_tun_encap_record.0 */
742 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
743 	.resource_type = TF_TBL_TYPE_ACT_ENCAP_64B,
744 	.resource_sub_type =
745 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
746 	.direction = TF_DIR_TX,
747 	.execute_info = {
748 		.cond_true_goto  = 1,
749 		.cond_false_goto = 1,
750 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
751 		.cond_start_idx = 38,
752 		.cond_nums = 1 },
753 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
754 	.tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,
755 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
756 	.record_size = 64,
757 	.result_start_idx = 424,
758 	.result_bit_size = 0,
759 	.result_num_fields = 0,
760 	.encap_num_fields = 30
761 	},
762 	{ /* act_tid: 6, , table: int_full_act_record.0 */
763 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
764 	.resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
765 	.resource_sub_type =
766 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
767 	.direction = TF_DIR_TX,
768 	.execute_info = {
769 		.cond_true_goto  = 1,
770 		.cond_false_goto = 1,
771 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
772 		.cond_start_idx = 39,
773 		.cond_nums = 1 },
774 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
775 	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
776 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
777 	.result_start_idx = 454,
778 	.result_bit_size = 128,
779 	.result_num_fields = 26
780 	},
781 	{ /* act_tid: 6, , table: ext_full_act_record_vxlan.0 */
782 	.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
783 	.resource_type = TF_TBL_TYPE_EXT,
784 	.resource_sub_type =
785 		BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
786 	.direction = TF_DIR_TX,
787 	.execute_info = {
788 		.cond_true_goto  = 0,
789 		.cond_false_goto = 0,
790 		.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
791 		.cond_start_idx = 40,
792 		.cond_nums = 1 },
793 	.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
794 	.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
795 	.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
796 	.result_start_idx = 480,
797 	.result_bit_size = 128,
798 	.result_num_fields = 26,
799 	.encap_num_fields = 30
800 	}
801 };
802 
803 struct bnxt_ulp_mapper_cond_info ulp_wh_plus_act_cond_list[] = {
804 	/* cond_reject: wh_plus, act_tid: 1 */
805 	{
806 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
807 	.cond_operand = BNXT_ULP_ACT_BIT_SET_IPV4_SRC
808 	},
809 	{
810 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
811 	.cond_operand = BNXT_ULP_ACT_BIT_SET_IPV6_SRC
812 	},
813 	{
814 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
815 	.cond_operand = BNXT_ULP_ACT_BIT_SET_TP_SRC
816 	},
817 	{
818 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
819 	.cond_operand = BNXT_ULP_ACT_BIT_SET_IPV4_DST
820 	},
821 	{
822 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
823 	.cond_operand = BNXT_ULP_ACT_BIT_SET_IPV6_DST
824 	},
825 	{
826 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
827 	.cond_operand = BNXT_ULP_ACT_BIT_SET_TP_DST
828 	},
829 	{
830 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
831 	.cond_operand = BNXT_ULP_ACT_BIT_PUSH_VLAN
832 	},
833 	{
834 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
835 	.cond_operand = BNXT_ULP_ACT_BIT_SET_VLAN_VID
836 	},
837 	{
838 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
839 	.cond_operand = BNXT_ULP_ACT_BIT_SET_VLAN_PCP
840 	},
841 	/* cond_execute: act_tid: 1, shared_mirror_record.rd */
842 	{
843 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
844 	.cond_operand = BNXT_ULP_ACT_BIT_SHARED_SAMPLE
845 	},
846 	/* cond_execute: act_tid: 1, int_flow_counter_tbl.0 */
847 	{
848 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
849 	.cond_operand = BNXT_ULP_ACT_BIT_COUNT
850 	},
851 	/* cond_execute: act_tid: 1, int_vtag_encap_record.0 */
852 	{
853 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
854 	.cond_operand = BNXT_ULP_ACT_BIT_PUSH_VLAN
855 	},
856 	/* cond_execute: act_tid: 1, int_full_act_record.0 */
857 	{
858 	.cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_NOT_SET,
859 	},
860 	/* cond_execute: act_tid: 1, ext_full_act_record.0 */
861 	{
862 	.cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_IS_SET,
863 	},
864 	/* cond_execute: act_tid: 2, int_flow_counter_tbl.0 */
865 	{
866 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
867 	.cond_operand = BNXT_ULP_ACT_BIT_COUNT
868 	},
869 	/* cond_execute: act_tid: 3, control.0 */
870 	{
871 	.cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET,
872 	.cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS
873 	},
874 	/* cond_execute: act_tid: 3, int_flow_counter_tbl.0 */
875 	{
876 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
877 	.cond_operand = BNXT_ULP_ACT_BIT_COUNT
878 	},
879 	/* cond_execute: act_tid: 3, act_modify_ipv4_src.0 */
880 	{
881 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
882 	.cond_operand = BNXT_ULP_ACT_BIT_SET_IPV4_SRC
883 	},
884 	/* cond_execute: act_tid: 3, act_modify_ipv4_dst.0 */
885 	{
886 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
887 	.cond_operand = BNXT_ULP_ACT_BIT_SET_IPV4_DST
888 	},
889 	/* cond_execute: act_tid: 3, int_full_act_record.0 */
890 	{
891 	.cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_NOT_SET,
892 	},
893 	/* cond_execute: act_tid: 3, ext_full_act_record.0 */
894 	{
895 	.cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_IS_SET,
896 	},
897 	/* cond_execute: act_tid: 4, int_flow_counter_tbl.0 */
898 	{
899 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
900 	.cond_operand = BNXT_ULP_ACT_BIT_COUNT
901 	},
902 	/* cond_execute: act_tid: 4, int_vtag_encap_record.0 */
903 	{
904 	.cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_NOT_SET,
905 	},
906 	{
907 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
908 	.cond_operand = BNXT_ULP_ACT_BIT_PUSH_VLAN
909 	},
910 	/* cond_execute: act_tid: 4, int_full_act_record.0 */
911 	{
912 	.cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_NOT_SET,
913 	},
914 	/* cond_execute: act_tid: 4, ext_full_act_record.no_tag */
915 	{
916 	.cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_IS_SET,
917 	},
918 	{
919 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_NOT_SET,
920 	.cond_operand = BNXT_ULP_ACT_BIT_PUSH_VLAN
921 	},
922 	/* cond_execute: act_tid: 4, ext_full_act_record.one_tag */
923 	{
924 	.cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_IS_SET,
925 	},
926 	{
927 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
928 	.cond_operand = BNXT_ULP_ACT_BIT_PUSH_VLAN
929 	},
930 	/* cond_execute: act_tid: 5, control.0 */
931 	{
932 	.cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET,
933 	.cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS
934 	},
935 	/* cond_execute: act_tid: 5, int_flow_counter_tbl.0 */
936 	{
937 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
938 	.cond_operand = BNXT_ULP_ACT_BIT_COUNT
939 	},
940 	/* cond_execute: act_tid: 5, act_modify_ipv4_src.0 */
941 	{
942 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
943 	.cond_operand = BNXT_ULP_ACT_BIT_SET_IPV4_SRC
944 	},
945 	/* cond_execute: act_tid: 5, act_modify_ipv4_dst.0 */
946 	{
947 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
948 	.cond_operand = BNXT_ULP_ACT_BIT_SET_IPV4_DST
949 	},
950 	/* cond_execute: act_tid: 5, int_full_act_record.0 */
951 	{
952 	.cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_NOT_SET,
953 	},
954 	/* cond_execute: act_tid: 5, ext_full_act_record.0 */
955 	{
956 	.cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_IS_SET,
957 	},
958 	/* cond_execute: act_tid: 6, int_flow_counter_tbl.0 */
959 	{
960 	.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
961 	.cond_operand = BNXT_ULP_ACT_BIT_COUNT
962 	},
963 	/* cond_execute: act_tid: 6, sp_smac_ipv4.0 */
964 	{
965 	.cond_opcode = BNXT_ULP_COND_OPC_CF_IS_SET,
966 	.cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG
967 	},
968 	/* cond_execute: act_tid: 6, sp_smac_ipv6.0 */
969 	{
970 	.cond_opcode = BNXT_ULP_COND_OPC_CF_IS_SET,
971 	.cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG
972 	},
973 	/* cond_execute: act_tid: 6, int_tun_encap_record.0 */
974 	{
975 	.cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_NOT_SET,
976 	},
977 	/* cond_execute: act_tid: 6, int_full_act_record.0 */
978 	{
979 	.cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_NOT_SET,
980 	},
981 	/* cond_execute: act_tid: 6, ext_full_act_record_vxlan.0 */
982 	{
983 	.cond_opcode = BNXT_ULP_COND_OPC_EXT_MEM_IS_SET,
984 	}
985 };
986 
987 struct bnxt_ulp_mapper_key_info ulp_wh_plus_act_key_info_list[] = {
988 	/* act_tid: 1, , table: shared_mirror_record.rd */
989 	{
990 	.field_info_mask = {
991 		.description = "shared_index",
992 		.field_bit_size = 1,
993 		.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
994 		.field_src1 = BNXT_ULP_FIELD_SRC_ONES,
995 		.field_opr1 = {
996 			0xff}
997 		},
998 	.field_info_spec = {
999 		.description = "shared_index",
1000 		.field_bit_size = 1,
1001 		.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1002 		.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
1003 		.field_opr1 = {
1004 		(BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE >> 8) & 0xff,
1005 		BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE & 0xff}
1006 		}
1007 	},
1008 	/* act_tid: 2, , table: shared_mirror_record.wr */
1009 	{
1010 	.field_info_mask = {
1011 		.description = "shared_index",
1012 		.field_bit_size = 1,
1013 		.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1014 		.field_src1 = BNXT_ULP_FIELD_SRC_ONES,
1015 		.field_opr1 = {
1016 			0xff}
1017 		},
1018 	.field_info_spec = {
1019 		.description = "shared_index",
1020 		.field_bit_size = 1,
1021 		.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1022 		.field_src1 = BNXT_ULP_FIELD_SRC_RF,
1023 		.field_opr1 = {
1024 		(BNXT_ULP_RF_IDX_MIRROR_PTR_0 >> 8) & 0xff,
1025 		BNXT_ULP_RF_IDX_MIRROR_PTR_0 & 0xff}
1026 		}
1027 	}
1028 };
1029 
1030 struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
1031 	/* act_tid: 1, , table: int_flow_counter_tbl.0 */
1032 	{
1033 	.description = "count",
1034 	.field_bit_size = 64,
1035 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1036 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1037 	},
1038 	/* act_tid: 1, , table: int_vtag_encap_record.0 */
1039 	{
1040 	.description = "ecv_valid",
1041 	.field_bit_size = 1,
1042 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1043 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
1044 	.field_opr1 = {
1045 	ULP_WP_SYM_ECV_VALID_YES}
1046 	},
1047 	{
1048 	.description = "ecv_custom_en",
1049 	.field_bit_size = 1,
1050 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1051 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1052 	},
1053 	{
1054 	.description = "ecv_vtag_type",
1055 	.field_bit_size = 4,
1056 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1057 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
1058 	.field_opr1 = {
1059 	ULP_WP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI}
1060 	},
1061 	{
1062 	.description = "ecv_l2_en",
1063 	.field_bit_size = 1,
1064 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1065 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1066 	},
1067 	{
1068 	.description = "ecv_l3_type",
1069 	.field_bit_size = 3,
1070 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1071 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1072 	},
1073 	{
1074 	.description = "ecv_l4_type",
1075 	.field_bit_size = 3,
1076 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1077 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1078 	},
1079 	{
1080 	.description = "ecv_tun_type",
1081 	.field_bit_size = 3,
1082 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1083 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1084 	},
1085 	{
1086 	.description = "vtag_tpid",
1087 	.field_bit_size = 16,
1088 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1089 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
1090 	.field_opr1 = {
1091 	(BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN >> 8) & 0xff,
1092 	BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff}
1093 	},
1094 	{
1095 	.description = "vtag_pcp",
1096 	.field_bit_size = 3,
1097 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1098 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
1099 	.field_opr1 = {
1100 	(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff,
1101 	BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff}
1102 	},
1103 	{
1104 	.description = "vtag_de",
1105 	.field_bit_size = 1,
1106 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1107 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1108 	},
1109 	{
1110 	.description = "vtag_vid",
1111 	.field_bit_size = 12,
1112 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1113 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
1114 	.field_opr1 = {
1115 	(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff,
1116 	BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff}
1117 	},
1118 	/* act_tid: 1, , table: int_full_act_record.0 */
1119 	{
1120 	.description = "flow_cntr_ptr",
1121 	.field_bit_size = 14,
1122 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1123 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
1124 	.field_opr1 = {
1125 	(BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
1126 	BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff}
1127 	},
1128 	{
1129 	.description = "age_enable",
1130 	.field_bit_size = 1,
1131 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1132 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1133 	},
1134 	{
1135 	.description = "agg_cntr_en",
1136 	.field_bit_size = 1,
1137 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1138 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1139 	},
1140 	{
1141 	.description = "rate_cntr_en",
1142 	.field_bit_size = 1,
1143 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1144 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1145 	},
1146 	{
1147 	.description = "flow_cntr_en",
1148 	.field_bit_size = 1,
1149 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1150 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
1151 	.field_opr1 = {
1152 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff,
1153 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff,
1154 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff,
1155 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff,
1156 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff,
1157 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff,
1158 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff,
1159 	(uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff}
1160 	},
1161 	{
1162 	.description = "tcpflags_key",
1163 	.field_bit_size = 8,
1164 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1165 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1166 	},
1167 	{
1168 	.description = "tcpflags_mir",
1169 	.field_bit_size = 1,
1170 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1171 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1172 	},
1173 	{
1174 	.description = "tcpflags_match",
1175 	.field_bit_size = 1,
1176 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1177 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1178 	},
1179 	{
1180 	.description = "encap_ptr",
1181 	.field_bit_size = 11,
1182 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1183 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
1184 	.field_opr1 = {
1185 	(BNXT_ULP_RF_IDX_ENCAP_PTR_0 >> 8) & 0xff,
1186 	BNXT_ULP_RF_IDX_ENCAP_PTR_0 & 0xff}
1187 	},
1188 	{
1189 	.description = "dst_ip_ptr",
1190 	.field_bit_size = 10,
1191 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1192 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
1193 	.field_opr1 = {
1194 	(BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff,
1195 	BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 & 0xff}
1196 	},
1197 	{
1198 	.description = "tcp_dst_port",
1199 	.field_bit_size = 16,
1200 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
1201 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
1202 	.field_opr1 = {
1203 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff,
1204 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff,
1205 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff,
1206 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff,
1207 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff,
1208 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff,
1209 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff,
1210 	(uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff},
1211 	.field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP,
1212 	.field_opr2 = {
1213 	(BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff,
1214 	BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff},
1215 	.field_src3 = BNXT_ULP_FIELD_SRC_ZERO
1216 	},
1217 	{
1218 	.description = "src_ip_ptr",
1219 	.field_bit_size = 10,
1220 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1221 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
1222 	.field_opr1 = {
1223 	(BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff,
1224 	BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 & 0xff}
1225 	},
1226 	{
1227 	.description = "tcp_src_port",
1228 	.field_bit_size = 16,
1229 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
1230 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
1231 	.field_opr1 = {
1232 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff,
1233 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff,
1234 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff,
1235 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff,
1236 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff,
1237 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff,
1238 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff,
1239 	(uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff},
1240 	.field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP,
1241 	.field_opr2 = {
1242 	(BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff,
1243 	BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff},
1244 	.field_src3 = BNXT_ULP_FIELD_SRC_ZERO
1245 	},
1246 	{
1247 	.description = "meter_id",
1248 	.field_bit_size = 10,
1249 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1250 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1251 	},
1252 	{
1253 	.description = "l3_rdir",
1254 	.field_bit_size = 1,
1255 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1256 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1257 	},
1258 	{
1259 	.description = "tl3_rdir",
1260 	.field_bit_size = 1,
1261 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1262 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1263 	},
1264 	{
1265 	.description = "l3_ttl_dec",
1266 	.field_bit_size = 1,
1267 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1268 	.field_src1 = BNXT_ULP_FIELD_SRC_CF,
1269 	.field_opr1 = {
1270 	(BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff,
1271 	BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff}
1272 	},
1273 	{
1274 	.description = "tl3_ttl_dec",
1275 	.field_bit_size = 1,
1276 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1277 	.field_src1 = BNXT_ULP_FIELD_SRC_CF,
1278 	.field_opr1 = {
1279 	(BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff,
1280 	BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff}
1281 	},
1282 	{
1283 	.description = "decap_func",
1284 	.field_bit_size = 4,
1285 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
1286 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
1287 	.field_opr1 = {
1288 	((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 56) & 0xff,
1289 	((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 48) & 0xff,
1290 	((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 40) & 0xff,
1291 	((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 32) & 0xff,
1292 	((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 24) & 0xff,
1293 	((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 16) & 0xff,
1294 	((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 8) & 0xff,
1295 	(uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP & 0xff},
1296 	.field_src2 = BNXT_ULP_FIELD_SRC_CONST,
1297 	.field_opr2 = {
1298 	ULP_WP_SYM_DECAP_FUNC_THRU_TUN},
1299 	.field_src3 = BNXT_ULP_FIELD_SRC_CONST,
1300 	.field_opr3 = {
1301 	ULP_WP_SYM_DECAP_FUNC_NONE}
1302 	},
1303 	{
1304 	.description = "vnic_or_vport",
1305 	.field_bit_size = 12,
1306 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1307 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
1308 	.field_opr1 = {
1309 	(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
1310 	BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff}
1311 	},
1312 	{
1313 	.description = "pop_vlan",
1314 	.field_bit_size = 1,
1315 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1316 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
1317 	.field_opr1 = {
1318 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 56) & 0xff,
1319 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 48) & 0xff,
1320 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 40) & 0xff,
1321 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 32) & 0xff,
1322 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 24) & 0xff,
1323 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 16) & 0xff,
1324 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 8) & 0xff,
1325 	(uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN & 0xff}
1326 	},
1327 	{
1328 	.description = "meter",
1329 	.field_bit_size = 1,
1330 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1331 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1332 	},
1333 	{
1334 	.description = "mirror",
1335 	.field_bit_size = 2,
1336 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
1337 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
1338 	.field_opr1 = {
1339 	((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 56) & 0xff,
1340 	((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 48) & 0xff,
1341 	((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 40) & 0xff,
1342 	((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 32) & 0xff,
1343 	((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 24) & 0xff,
1344 	((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 16) & 0xff,
1345 	((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 8) & 0xff,
1346 	(uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE & 0xff},
1347 	.field_src2 = BNXT_ULP_FIELD_SRC_RF,
1348 	.field_opr2 = {
1349 	(BNXT_ULP_RF_IDX_MIRROR_ID_0 >> 8) & 0xff,
1350 	BNXT_ULP_RF_IDX_MIRROR_ID_0 & 0xff},
1351 	.field_src3 = BNXT_ULP_FIELD_SRC_ZERO
1352 	},
1353 	{
1354 	.description = "drop",
1355 	.field_bit_size = 1,
1356 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1357 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
1358 	.field_opr1 = {
1359 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 56) & 0xff,
1360 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 48) & 0xff,
1361 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 40) & 0xff,
1362 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 32) & 0xff,
1363 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 24) & 0xff,
1364 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 16) & 0xff,
1365 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 8) & 0xff,
1366 	(uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff}
1367 	},
1368 	{
1369 	.description = "hit",
1370 	.field_bit_size = 1,
1371 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1372 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1373 	},
1374 	{
1375 	.description = "type",
1376 	.field_bit_size = 1,
1377 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1378 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1379 	},
1380 	/* act_tid: 1, , table: ext_full_act_record.0 */
1381 	{
1382 	.description = "flow_cntr_ptr",
1383 	.field_bit_size = 14,
1384 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1385 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
1386 	.field_opr1 = {
1387 	(BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
1388 	BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff}
1389 	},
1390 	{
1391 	.description = "age_enable",
1392 	.field_bit_size = 1,
1393 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1394 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1395 	},
1396 	{
1397 	.description = "agg_cntr_en",
1398 	.field_bit_size = 1,
1399 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1400 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1401 	},
1402 	{
1403 	.description = "rate_cntr_en",
1404 	.field_bit_size = 1,
1405 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1406 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1407 	},
1408 	{
1409 	.description = "flow_cntr_en",
1410 	.field_bit_size = 1,
1411 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1412 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
1413 	.field_opr1 = {
1414 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff,
1415 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff,
1416 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff,
1417 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff,
1418 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff,
1419 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff,
1420 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff,
1421 	(uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff}
1422 	},
1423 	{
1424 	.description = "flow_cntr_ext",
1425 	.field_bit_size = 1,
1426 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1427 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1428 	},
1429 	{
1430 	.description = "tcpflags_key",
1431 	.field_bit_size = 8,
1432 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1433 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1434 	},
1435 	{
1436 	.description = "tcpflags_mir",
1437 	.field_bit_size = 1,
1438 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1439 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1440 	},
1441 	{
1442 	.description = "tcpflags_match",
1443 	.field_bit_size = 1,
1444 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1445 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1446 	},
1447 	{
1448 	.description = "encap_ptr",
1449 	.field_bit_size = 11,
1450 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1451 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1452 	},
1453 	{
1454 	.description = "encap_rec_int",
1455 	.field_bit_size = 1,
1456 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1457 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1458 	},
1459 	{
1460 	.description = "dst_ip_ptr",
1461 	.field_bit_size = 10,
1462 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1463 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
1464 	.field_opr1 = {
1465 	(BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff,
1466 	BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 & 0xff}
1467 	},
1468 	{
1469 	.description = "tcp_dst_port",
1470 	.field_bit_size = 16,
1471 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
1472 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
1473 	.field_opr1 = {
1474 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff,
1475 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff,
1476 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff,
1477 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff,
1478 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff,
1479 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff,
1480 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff,
1481 	(uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff},
1482 	.field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP,
1483 	.field_opr2 = {
1484 	(BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff,
1485 	BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff},
1486 	.field_src3 = BNXT_ULP_FIELD_SRC_ZERO
1487 	},
1488 	{
1489 	.description = "src_ip_ptr",
1490 	.field_bit_size = 10,
1491 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1492 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
1493 	.field_opr1 = {
1494 	(BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff,
1495 	BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 & 0xff}
1496 	},
1497 	{
1498 	.description = "tcp_src_port",
1499 	.field_bit_size = 16,
1500 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
1501 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
1502 	.field_opr1 = {
1503 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff,
1504 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff,
1505 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff,
1506 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff,
1507 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff,
1508 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff,
1509 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff,
1510 	(uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff},
1511 	.field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP,
1512 	.field_opr2 = {
1513 	(BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff,
1514 	BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff},
1515 	.field_src3 = BNXT_ULP_FIELD_SRC_ZERO
1516 	},
1517 	{
1518 	.description = "meter_id",
1519 	.field_bit_size = 10,
1520 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1521 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1522 	},
1523 	{
1524 	.description = "l3_rdir",
1525 	.field_bit_size = 1,
1526 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1527 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1528 	},
1529 	{
1530 	.description = "tl3_rdir",
1531 	.field_bit_size = 1,
1532 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1533 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1534 	},
1535 	{
1536 	.description = "l3_ttl_dec",
1537 	.field_bit_size = 1,
1538 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1539 	.field_src1 = BNXT_ULP_FIELD_SRC_CF,
1540 	.field_opr1 = {
1541 	(BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff,
1542 	BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff}
1543 	},
1544 	{
1545 	.description = "tl3_ttl_dec",
1546 	.field_bit_size = 1,
1547 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1548 	.field_src1 = BNXT_ULP_FIELD_SRC_CF,
1549 	.field_opr1 = {
1550 	(BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff,
1551 	BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff}
1552 	},
1553 	{
1554 	.description = "decap_func",
1555 	.field_bit_size = 4,
1556 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
1557 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
1558 	.field_opr1 = {
1559 	((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 56) & 0xff,
1560 	((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 48) & 0xff,
1561 	((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 40) & 0xff,
1562 	((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 32) & 0xff,
1563 	((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 24) & 0xff,
1564 	((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 16) & 0xff,
1565 	((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 8) & 0xff,
1566 	(uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP & 0xff},
1567 	.field_src2 = BNXT_ULP_FIELD_SRC_CONST,
1568 	.field_opr2 = {
1569 	ULP_WP_SYM_DECAP_FUNC_THRU_TUN},
1570 	.field_src3 = BNXT_ULP_FIELD_SRC_CONST,
1571 	.field_opr3 = {
1572 	ULP_WP_SYM_DECAP_FUNC_NONE}
1573 	},
1574 	{
1575 	.description = "vnic_or_vport",
1576 	.field_bit_size = 12,
1577 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1578 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
1579 	.field_opr1 = {
1580 	(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
1581 	BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff}
1582 	},
1583 	{
1584 	.description = "pop_vlan",
1585 	.field_bit_size = 1,
1586 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1587 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
1588 	.field_opr1 = {
1589 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 56) & 0xff,
1590 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 48) & 0xff,
1591 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 40) & 0xff,
1592 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 32) & 0xff,
1593 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 24) & 0xff,
1594 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 16) & 0xff,
1595 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 8) & 0xff,
1596 	(uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN & 0xff}
1597 	},
1598 	{
1599 	.description = "meter",
1600 	.field_bit_size = 1,
1601 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1602 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1603 	},
1604 	{
1605 	.description = "mirror",
1606 	.field_bit_size = 2,
1607 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1608 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
1609 	.field_opr1 = {
1610 	(BNXT_ULP_RF_IDX_MIRROR_ID_0 >> 8) & 0xff,
1611 	BNXT_ULP_RF_IDX_MIRROR_ID_0 & 0xff}
1612 	},
1613 	{
1614 	.description = "drop",
1615 	.field_bit_size = 1,
1616 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1617 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
1618 	.field_opr1 = {
1619 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 56) & 0xff,
1620 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 48) & 0xff,
1621 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 40) & 0xff,
1622 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 32) & 0xff,
1623 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 24) & 0xff,
1624 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 16) & 0xff,
1625 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 8) & 0xff,
1626 	(uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff}
1627 	},
1628 	{
1629 	.description = "ecv_valid",
1630 	.field_bit_size = 1,
1631 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1632 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
1633 	.field_opr1 = {
1634 	ULP_WP_SYM_ECV_VALID_YES}
1635 	},
1636 	{
1637 	.description = "ecv_custom_en",
1638 	.field_bit_size = 1,
1639 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1640 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1641 	},
1642 	{
1643 	.description = "ecv_vtag_type",
1644 	.field_bit_size = 4,
1645 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1646 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1647 	},
1648 	{
1649 	.description = "ecv_l2_en",
1650 	.field_bit_size = 1,
1651 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1652 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1653 	},
1654 	{
1655 	.description = "ecv_l3_type",
1656 	.field_bit_size = 3,
1657 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1658 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1659 	},
1660 	{
1661 	.description = "ecv_l4_type",
1662 	.field_bit_size = 3,
1663 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1664 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1665 	},
1666 	{
1667 	.description = "ecv_tun_type",
1668 	.field_bit_size = 3,
1669 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1670 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1671 	},
1672 	{
1673 	.description = "vtag_tpid",
1674 	.field_bit_size = 16,
1675 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1676 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1677 	},
1678 	{
1679 	.description = "vtag_pcp",
1680 	.field_bit_size = 3,
1681 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1682 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1683 	},
1684 	{
1685 	.description = "vtag_de",
1686 	.field_bit_size = 1,
1687 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1688 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1689 	},
1690 	{
1691 	.description = "vtag_vid",
1692 	.field_bit_size = 12,
1693 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1694 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1695 	},
1696 	/* act_tid: 2, , table: mirror_tbl.alloc */
1697 	{
1698 	.description = "act_rec_ptr",
1699 	.field_bit_size = 16,
1700 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1701 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1702 	},
1703 	{
1704 	.description = "enable",
1705 	.field_bit_size = 1,
1706 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1707 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
1708 	.field_opr1 = {
1709 	1}
1710 	},
1711 	{
1712 	.description = "copy",
1713 	.field_bit_size = 1,
1714 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1715 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1716 	},
1717 	{
1718 	.description = "ign_drop",
1719 	.field_bit_size = 1,
1720 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1721 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1722 	},
1723 	{
1724 	.description = "reserved",
1725 	.field_bit_size = 2,
1726 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1727 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1728 	},
1729 	{
1730 	.description = "sp_ptr",
1731 	.field_bit_size = 11,
1732 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1733 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1734 	},
1735 	/* act_tid: 2, , table: int_flow_counter_tbl.0 */
1736 	{
1737 	.description = "count",
1738 	.field_bit_size = 64,
1739 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1740 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1741 	},
1742 	/* act_tid: 2, , table: int_full_act_record.0 */
1743 	{
1744 	.description = "flow_cntr_ptr",
1745 	.field_bit_size = 14,
1746 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1747 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
1748 	.field_opr1 = {
1749 	(BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
1750 	BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff}
1751 	},
1752 	{
1753 	.description = "age_enable",
1754 	.field_bit_size = 1,
1755 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1756 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1757 	},
1758 	{
1759 	.description = "agg_cntr_en",
1760 	.field_bit_size = 1,
1761 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1762 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1763 	},
1764 	{
1765 	.description = "rate_cntr_en",
1766 	.field_bit_size = 1,
1767 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1768 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1769 	},
1770 	{
1771 	.description = "flow_cntr_en",
1772 	.field_bit_size = 1,
1773 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1774 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
1775 	.field_opr1 = {
1776 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff,
1777 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff,
1778 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff,
1779 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff,
1780 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff,
1781 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff,
1782 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff,
1783 	(uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff}
1784 	},
1785 	{
1786 	.description = "tcpflags_key",
1787 	.field_bit_size = 8,
1788 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1789 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1790 	},
1791 	{
1792 	.description = "tcpflags_mir",
1793 	.field_bit_size = 1,
1794 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1795 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1796 	},
1797 	{
1798 	.description = "tcpflags_match",
1799 	.field_bit_size = 1,
1800 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1801 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1802 	},
1803 	{
1804 	.description = "encap_ptr",
1805 	.field_bit_size = 11,
1806 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1807 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1808 	},
1809 	{
1810 	.description = "dst_ip_ptr",
1811 	.field_bit_size = 10,
1812 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1813 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1814 	},
1815 	{
1816 	.description = "tcp_dst_port",
1817 	.field_bit_size = 16,
1818 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1819 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1820 	},
1821 	{
1822 	.description = "src_ip_ptr",
1823 	.field_bit_size = 10,
1824 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1825 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1826 	},
1827 	{
1828 	.description = "tcp_src_port",
1829 	.field_bit_size = 16,
1830 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1831 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1832 	},
1833 	{
1834 	.description = "meter_id",
1835 	.field_bit_size = 10,
1836 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1837 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1838 	},
1839 	{
1840 	.description = "l3_rdir",
1841 	.field_bit_size = 1,
1842 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1843 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1844 	},
1845 	{
1846 	.description = "tl3_rdir",
1847 	.field_bit_size = 1,
1848 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1849 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1850 	},
1851 	{
1852 	.description = "l3_ttl_dec",
1853 	.field_bit_size = 1,
1854 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1855 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1856 	},
1857 	{
1858 	.description = "tl3_ttl_dec",
1859 	.field_bit_size = 1,
1860 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1861 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1862 	},
1863 	{
1864 	.description = "decap_func",
1865 	.field_bit_size = 4,
1866 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1867 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1868 	},
1869 	{
1870 	.description = "vnic_or_vport",
1871 	.field_bit_size = 12,
1872 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1873 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
1874 	.field_opr1 = {
1875 	(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
1876 	BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff}
1877 	},
1878 	{
1879 	.description = "pop_vlan",
1880 	.field_bit_size = 1,
1881 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1882 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1883 	},
1884 	{
1885 	.description = "meter",
1886 	.field_bit_size = 1,
1887 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1888 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1889 	},
1890 	{
1891 	.description = "mirror",
1892 	.field_bit_size = 2,
1893 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_PLUS_SRC2,
1894 	.field_src2 = BNXT_ULP_FIELD_SRC_CONST,
1895 	.field_opr2 = {
1896 	1}
1897 	},
1898 	{
1899 	.description = "drop",
1900 	.field_bit_size = 1,
1901 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1902 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1903 	},
1904 	{
1905 	.description = "hit",
1906 	.field_bit_size = 1,
1907 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1908 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1909 	},
1910 	{
1911 	.description = "type",
1912 	.field_bit_size = 1,
1913 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1914 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1915 	},
1916 	/* act_tid: 2, , table: ext_full_act_record.0 */
1917 	{
1918 	.description = "flow_cntr_ptr",
1919 	.field_bit_size = 14,
1920 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1921 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
1922 	.field_opr1 = {
1923 	(BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
1924 	BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff}
1925 	},
1926 	{
1927 	.description = "age_enable",
1928 	.field_bit_size = 1,
1929 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1930 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1931 	},
1932 	{
1933 	.description = "agg_cntr_en",
1934 	.field_bit_size = 1,
1935 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1936 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1937 	},
1938 	{
1939 	.description = "rate_cntr_en",
1940 	.field_bit_size = 1,
1941 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1942 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1943 	},
1944 	{
1945 	.description = "flow_cntr_en",
1946 	.field_bit_size = 1,
1947 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1948 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
1949 	.field_opr1 = {
1950 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff,
1951 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff,
1952 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff,
1953 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff,
1954 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff,
1955 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff,
1956 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff,
1957 	(uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff}
1958 	},
1959 	{
1960 	.description = "flow_cntr_ext",
1961 	.field_bit_size = 1,
1962 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1963 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1964 	},
1965 	{
1966 	.description = "tcpflags_key",
1967 	.field_bit_size = 8,
1968 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1969 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1970 	},
1971 	{
1972 	.description = "tcpflags_mir",
1973 	.field_bit_size = 1,
1974 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1975 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1976 	},
1977 	{
1978 	.description = "tcpflags_match",
1979 	.field_bit_size = 1,
1980 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1981 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1982 	},
1983 	{
1984 	.description = "encap_ptr",
1985 	.field_bit_size = 11,
1986 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1987 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1988 	},
1989 	{
1990 	.description = "encap_rec_int",
1991 	.field_bit_size = 1,
1992 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1993 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
1994 	},
1995 	{
1996 	.description = "dst_ip_ptr",
1997 	.field_bit_size = 10,
1998 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
1999 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2000 	},
2001 	{
2002 	.description = "tcp_dst_port",
2003 	.field_bit_size = 16,
2004 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2005 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2006 	},
2007 	{
2008 	.description = "src_ip_ptr",
2009 	.field_bit_size = 10,
2010 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2011 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2012 	},
2013 	{
2014 	.description = "tcp_src_port",
2015 	.field_bit_size = 16,
2016 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2017 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2018 	},
2019 	{
2020 	.description = "meter_id",
2021 	.field_bit_size = 10,
2022 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2023 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2024 	},
2025 	{
2026 	.description = "l3_rdir",
2027 	.field_bit_size = 1,
2028 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2029 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2030 	},
2031 	{
2032 	.description = "tl3_rdir",
2033 	.field_bit_size = 1,
2034 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2035 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2036 	},
2037 	{
2038 	.description = "l3_ttl_dec",
2039 	.field_bit_size = 1,
2040 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2041 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2042 	},
2043 	{
2044 	.description = "tl3_ttl_dec",
2045 	.field_bit_size = 1,
2046 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2047 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2048 	},
2049 	{
2050 	.description = "decap_func",
2051 	.field_bit_size = 4,
2052 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2053 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2054 	},
2055 	{
2056 	.description = "vnic_or_vport",
2057 	.field_bit_size = 12,
2058 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2059 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
2060 	.field_opr1 = {
2061 	(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
2062 	BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff}
2063 	},
2064 	{
2065 	.description = "pop_vlan",
2066 	.field_bit_size = 1,
2067 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2068 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
2069 	.field_opr1 = {
2070 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 56) & 0xff,
2071 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 48) & 0xff,
2072 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 40) & 0xff,
2073 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 32) & 0xff,
2074 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 24) & 0xff,
2075 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 16) & 0xff,
2076 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 8) & 0xff,
2077 	(uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN & 0xff}
2078 	},
2079 	{
2080 	.description = "meter",
2081 	.field_bit_size = 1,
2082 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2083 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2084 	},
2085 	{
2086 	.description = "mirror",
2087 	.field_bit_size = 2,
2088 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_PLUS_SRC2,
2089 	.field_src2 = BNXT_ULP_FIELD_SRC_CONST,
2090 	.field_opr2 = {
2091 	1}
2092 	},
2093 	{
2094 	.description = "drop",
2095 	.field_bit_size = 1,
2096 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2097 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2098 	},
2099 	{
2100 	.description = "ecv_valid",
2101 	.field_bit_size = 1,
2102 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2103 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
2104 	.field_opr1 = {
2105 	ULP_WP_SYM_ECV_VALID_YES}
2106 	},
2107 	{
2108 	.description = "ecv_custom_en",
2109 	.field_bit_size = 1,
2110 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2111 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2112 	},
2113 	{
2114 	.description = "ecv_vtag_type",
2115 	.field_bit_size = 4,
2116 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2117 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2118 	},
2119 	{
2120 	.description = "ecv_l2_en",
2121 	.field_bit_size = 1,
2122 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2123 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2124 	},
2125 	{
2126 	.description = "ecv_l3_type",
2127 	.field_bit_size = 3,
2128 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2129 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2130 	},
2131 	{
2132 	.description = "ecv_l4_type",
2133 	.field_bit_size = 3,
2134 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2135 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2136 	},
2137 	{
2138 	.description = "ecv_tun_type",
2139 	.field_bit_size = 3,
2140 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2141 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2142 	},
2143 	{
2144 	.description = "vtag_tpid",
2145 	.field_bit_size = 16,
2146 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2147 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2148 	},
2149 	{
2150 	.description = "vtag_pcp",
2151 	.field_bit_size = 3,
2152 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2153 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2154 	},
2155 	{
2156 	.description = "vtag_de",
2157 	.field_bit_size = 1,
2158 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2159 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2160 	},
2161 	{
2162 	.description = "vtag_vid",
2163 	.field_bit_size = 12,
2164 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2165 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2166 	},
2167 	/* act_tid: 2, , table: mirror_tbl.wr */
2168 	{
2169 	.description = "act_rec_ptr",
2170 	.field_bit_size = 16,
2171 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2172 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
2173 	.field_opr1 = {
2174 	(BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
2175 	BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
2176 	},
2177 	{
2178 	.description = "enable",
2179 	.field_bit_size = 1,
2180 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2181 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
2182 	.field_opr1 = {
2183 	1}
2184 	},
2185 	{
2186 	.description = "copy",
2187 	.field_bit_size = 1,
2188 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2189 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2190 	},
2191 	{
2192 	.description = "ign_drop",
2193 	.field_bit_size = 1,
2194 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2195 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2196 	},
2197 	{
2198 	.description = "reserved",
2199 	.field_bit_size = 2,
2200 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2201 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2202 	},
2203 	{
2204 	.description = "sp_ptr",
2205 	.field_bit_size = 11,
2206 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2207 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2208 	},
2209 	/* act_tid: 2, , table: shared_mirror_record.wr */
2210 	{
2211 	.description = "rid",
2212 	.field_bit_size = 32,
2213 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2214 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
2215 	.field_opr1 = {
2216 	(BNXT_ULP_RF_IDX_RID >> 8) & 0xff,
2217 	BNXT_ULP_RF_IDX_RID & 0xff}
2218 	},
2219 	{
2220 	.description = "mirror_id",
2221 	.field_bit_size = 2,
2222 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_PLUS_SRC2_POST,
2223 	.field_src2 = BNXT_ULP_FIELD_SRC_CONST,
2224 	.field_opr2 = {
2225 	(1 >> 8) & 0xff,
2226 	1 & 0xff}
2227 	},
2228 	/* act_tid: 3, , table: int_flow_counter_tbl.0 */
2229 	{
2230 	.description = "count",
2231 	.field_bit_size = 64,
2232 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2233 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2234 	},
2235 	/* act_tid: 3, , table: act_modify_ipv4_src.0 */
2236 	{
2237 	.description = "ipv4_addr",
2238 	.field_bit_size = 32,
2239 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2240 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
2241 	.field_opr1 = {
2242 	(BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC >> 8) & 0xff,
2243 	BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC & 0xff}
2244 	},
2245 	/* act_tid: 3, , table: act_modify_ipv4_dst.0 */
2246 	{
2247 	.description = "ipv4_addr",
2248 	.field_bit_size = 32,
2249 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2250 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
2251 	.field_opr1 = {
2252 	(BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST >> 8) & 0xff,
2253 	BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST & 0xff}
2254 	},
2255 	/* act_tid: 3, , table: int_encap_mac_record.0 */
2256 	{
2257 	.description = "ecv_valid",
2258 	.field_bit_size = 1,
2259 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2260 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
2261 	.field_opr1 = {
2262 	1}
2263 	},
2264 	{
2265 	.description = "ecv_custom_en",
2266 	.field_bit_size = 1,
2267 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2268 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2269 	},
2270 	{
2271 	.description = "ecv_vtag_type",
2272 	.field_bit_size = 4,
2273 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2274 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2275 	},
2276 	{
2277 	.description = "ecv_l2_en",
2278 	.field_bit_size = 1,
2279 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2280 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
2281 	.field_opr1 = {
2282 	ULP_WP_SYM_ECV_L2_EN_YES}
2283 	},
2284 	{
2285 	.description = "ecv_l3_type",
2286 	.field_bit_size = 3,
2287 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2288 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2289 	},
2290 	{
2291 	.description = "ecv_l4_type",
2292 	.field_bit_size = 3,
2293 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2294 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2295 	},
2296 	{
2297 	.description = "ecv_tun_type",
2298 	.field_bit_size = 3,
2299 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2300 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2301 	},
2302 	{
2303 	.description = "vtag_tpid",
2304 	.field_bit_size = 16,
2305 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2306 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2307 	},
2308 	{
2309 	.description = "vtag_pcp",
2310 	.field_bit_size = 3,
2311 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2312 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2313 	},
2314 	{
2315 	.description = "vtag_de",
2316 	.field_bit_size = 1,
2317 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2318 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2319 	},
2320 	{
2321 	.description = "vtag_vid",
2322 	.field_bit_size = 12,
2323 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2324 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2325 	},
2326 	/* act_tid: 3, , table: int_full_act_record.0 */
2327 	{
2328 	.description = "flow_cntr_ptr",
2329 	.field_bit_size = 14,
2330 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2331 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
2332 	.field_opr1 = {
2333 	(BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
2334 	BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff}
2335 	},
2336 	{
2337 	.description = "age_enable",
2338 	.field_bit_size = 1,
2339 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2340 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2341 	},
2342 	{
2343 	.description = "agg_cntr_en",
2344 	.field_bit_size = 1,
2345 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2346 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2347 	},
2348 	{
2349 	.description = "rate_cntr_en",
2350 	.field_bit_size = 1,
2351 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2352 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2353 	},
2354 	{
2355 	.description = "flow_cntr_en",
2356 	.field_bit_size = 1,
2357 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2358 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
2359 	.field_opr1 = {
2360 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff,
2361 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff,
2362 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff,
2363 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff,
2364 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff,
2365 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff,
2366 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff,
2367 	(uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff}
2368 	},
2369 	{
2370 	.description = "tcpflags_key",
2371 	.field_bit_size = 8,
2372 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2373 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2374 	},
2375 	{
2376 	.description = "tcpflags_mir",
2377 	.field_bit_size = 1,
2378 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2379 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2380 	},
2381 	{
2382 	.description = "tcpflags_match",
2383 	.field_bit_size = 1,
2384 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2385 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2386 	},
2387 	{
2388 	.description = "encap_ptr",
2389 	.field_bit_size = 11,
2390 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2391 	.field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
2392 	.field_opr1 = {
2393 	(BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR >> 8) & 0xff,
2394 	BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR & 0xff}
2395 	},
2396 	{
2397 	.description = "dst_ip_ptr",
2398 	.field_bit_size = 10,
2399 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2400 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
2401 	.field_opr1 = {
2402 	(BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff,
2403 	BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 & 0xff}
2404 	},
2405 	{
2406 	.description = "tcp_dst_port",
2407 	.field_bit_size = 16,
2408 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
2409 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
2410 	.field_opr1 = {
2411 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff,
2412 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff,
2413 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff,
2414 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff,
2415 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff,
2416 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff,
2417 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff,
2418 	(uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff},
2419 	.field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP,
2420 	.field_opr2 = {
2421 	(BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff,
2422 	BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff},
2423 	.field_src3 = BNXT_ULP_FIELD_SRC_ZERO
2424 	},
2425 	{
2426 	.description = "src_ip_ptr",
2427 	.field_bit_size = 10,
2428 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2429 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
2430 	.field_opr1 = {
2431 	(BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff,
2432 	BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 & 0xff}
2433 	},
2434 	{
2435 	.description = "tcp_src_port",
2436 	.field_bit_size = 16,
2437 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
2438 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
2439 	.field_opr1 = {
2440 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff,
2441 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff,
2442 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff,
2443 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff,
2444 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff,
2445 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff,
2446 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff,
2447 	(uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff},
2448 	.field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP,
2449 	.field_opr2 = {
2450 	(BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff,
2451 	BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff},
2452 	.field_src3 = BNXT_ULP_FIELD_SRC_ZERO
2453 	},
2454 	{
2455 	.description = "meter_id",
2456 	.field_bit_size = 10,
2457 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2458 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2459 	},
2460 	{
2461 	.description = "l3_rdir",
2462 	.field_bit_size = 1,
2463 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2464 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2465 	},
2466 	{
2467 	.description = "tl3_rdir",
2468 	.field_bit_size = 1,
2469 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2470 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2471 	},
2472 	{
2473 	.description = "l3_ttl_dec",
2474 	.field_bit_size = 1,
2475 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2476 	.field_src1 = BNXT_ULP_FIELD_SRC_CF,
2477 	.field_opr1 = {
2478 	(BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff,
2479 	BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff}
2480 	},
2481 	{
2482 	.description = "tl3_ttl_dec",
2483 	.field_bit_size = 1,
2484 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2485 	.field_src1 = BNXT_ULP_FIELD_SRC_CF,
2486 	.field_opr1 = {
2487 	(BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff,
2488 	BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff}
2489 	},
2490 	{
2491 	.description = "decap_func",
2492 	.field_bit_size = 4,
2493 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
2494 	.field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT,
2495 	.field_opr1 = {
2496 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
2497 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
2498 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
2499 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
2500 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
2501 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
2502 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
2503 	(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
2504 	.field_src2 = BNXT_ULP_FIELD_SRC_CONST,
2505 	.field_opr2 = {
2506 	ULP_WP_SYM_DECAP_FUNC_THRU_TL2},
2507 	.field_src3 = BNXT_ULP_FIELD_SRC_CONST,
2508 	.field_opr3 = {
2509 	ULP_WP_SYM_DECAP_FUNC_THRU_L2}
2510 	},
2511 	{
2512 	.description = "vnic_or_vport",
2513 	.field_bit_size = 12,
2514 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2515 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
2516 	.field_opr1 = {
2517 	(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
2518 	BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff}
2519 	},
2520 	{
2521 	.description = "pop_vlan",
2522 	.field_bit_size = 1,
2523 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2524 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2525 	},
2526 	{
2527 	.description = "meter",
2528 	.field_bit_size = 1,
2529 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2530 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2531 	},
2532 	{
2533 	.description = "mirror",
2534 	.field_bit_size = 2,
2535 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2536 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2537 	},
2538 	{
2539 	.description = "drop",
2540 	.field_bit_size = 1,
2541 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2542 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2543 	},
2544 	{
2545 	.description = "hit",
2546 	.field_bit_size = 1,
2547 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2548 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2549 	},
2550 	{
2551 	.description = "type",
2552 	.field_bit_size = 1,
2553 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2554 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2555 	},
2556 	/* act_tid: 3, , table: ext_full_act_record.0 */
2557 	{
2558 	.description = "flow_cntr_ptr",
2559 	.field_bit_size = 14,
2560 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2561 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
2562 	.field_opr1 = {
2563 	(BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
2564 	BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff}
2565 	},
2566 	{
2567 	.description = "age_enable",
2568 	.field_bit_size = 1,
2569 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2570 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2571 	},
2572 	{
2573 	.description = "agg_cntr_en",
2574 	.field_bit_size = 1,
2575 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2576 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2577 	},
2578 	{
2579 	.description = "rate_cntr_en",
2580 	.field_bit_size = 1,
2581 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2582 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2583 	},
2584 	{
2585 	.description = "flow_cntr_en",
2586 	.field_bit_size = 1,
2587 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2588 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
2589 	.field_opr1 = {
2590 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff,
2591 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff,
2592 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff,
2593 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff,
2594 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff,
2595 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff,
2596 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff,
2597 	(uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff}
2598 	},
2599 	{
2600 	.description = "flow_cntr_ext",
2601 	.field_bit_size = 1,
2602 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2603 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2604 	},
2605 	{
2606 	.description = "tcpflags_key",
2607 	.field_bit_size = 8,
2608 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2609 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2610 	},
2611 	{
2612 	.description = "tcpflags_mir",
2613 	.field_bit_size = 1,
2614 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2615 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2616 	},
2617 	{
2618 	.description = "tcpflags_match",
2619 	.field_bit_size = 1,
2620 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2621 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2622 	},
2623 	{
2624 	.description = "encap_ptr",
2625 	.field_bit_size = 11,
2626 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2627 	.field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
2628 	.field_opr1 = {
2629 	(BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR >> 8) & 0xff,
2630 	BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR & 0xff}
2631 	},
2632 	{
2633 	.description = "encap_rec_int",
2634 	.field_bit_size = 1,
2635 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2636 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
2637 	.field_opr1 = {
2638 	1}
2639 	},
2640 	{
2641 	.description = "dst_ip_ptr",
2642 	.field_bit_size = 10,
2643 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2644 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
2645 	.field_opr1 = {
2646 	(BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff,
2647 	BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 & 0xff}
2648 	},
2649 	{
2650 	.description = "tcp_dst_port",
2651 	.field_bit_size = 16,
2652 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
2653 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
2654 	.field_opr1 = {
2655 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff,
2656 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff,
2657 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff,
2658 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff,
2659 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff,
2660 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff,
2661 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff,
2662 	(uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff},
2663 	.field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP,
2664 	.field_opr2 = {
2665 	(BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff,
2666 	BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff},
2667 	.field_src3 = BNXT_ULP_FIELD_SRC_ZERO
2668 	},
2669 	{
2670 	.description = "src_ip_ptr",
2671 	.field_bit_size = 10,
2672 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2673 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
2674 	.field_opr1 = {
2675 	(BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff,
2676 	BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 & 0xff}
2677 	},
2678 	{
2679 	.description = "tcp_src_port",
2680 	.field_bit_size = 16,
2681 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
2682 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
2683 	.field_opr1 = {
2684 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff,
2685 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff,
2686 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff,
2687 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff,
2688 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff,
2689 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff,
2690 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff,
2691 	(uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff},
2692 	.field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP,
2693 	.field_opr2 = {
2694 	(BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff,
2695 	BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff},
2696 	.field_src3 = BNXT_ULP_FIELD_SRC_ZERO
2697 	},
2698 	{
2699 	.description = "meter_id",
2700 	.field_bit_size = 10,
2701 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2702 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2703 	},
2704 	{
2705 	.description = "l3_rdir",
2706 	.field_bit_size = 1,
2707 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2708 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2709 	},
2710 	{
2711 	.description = "tl3_rdir",
2712 	.field_bit_size = 1,
2713 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2714 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2715 	},
2716 	{
2717 	.description = "l3_ttl_dec",
2718 	.field_bit_size = 1,
2719 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2720 	.field_src1 = BNXT_ULP_FIELD_SRC_CF,
2721 	.field_opr1 = {
2722 	(BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff,
2723 	BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff}
2724 	},
2725 	{
2726 	.description = "tl3_ttl_dec",
2727 	.field_bit_size = 1,
2728 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2729 	.field_src1 = BNXT_ULP_FIELD_SRC_CF,
2730 	.field_opr1 = {
2731 	(BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff,
2732 	BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff}
2733 	},
2734 	{
2735 	.description = "decap_func",
2736 	.field_bit_size = 4,
2737 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
2738 	.field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT,
2739 	.field_opr1 = {
2740 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
2741 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
2742 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
2743 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
2744 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
2745 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
2746 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
2747 	(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
2748 	.field_src2 = BNXT_ULP_FIELD_SRC_CONST,
2749 	.field_opr2 = {
2750 	ULP_WP_SYM_DECAP_FUNC_THRU_TL2},
2751 	.field_src3 = BNXT_ULP_FIELD_SRC_CONST,
2752 	.field_opr3 = {
2753 	ULP_WP_SYM_DECAP_FUNC_THRU_L2}
2754 	},
2755 	{
2756 	.description = "vnic_or_vport",
2757 	.field_bit_size = 12,
2758 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2759 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
2760 	.field_opr1 = {
2761 	(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
2762 	BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff}
2763 	},
2764 	{
2765 	.description = "pop_vlan",
2766 	.field_bit_size = 1,
2767 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2768 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2769 	},
2770 	{
2771 	.description = "meter",
2772 	.field_bit_size = 1,
2773 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2774 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2775 	},
2776 	{
2777 	.description = "mirror",
2778 	.field_bit_size = 2,
2779 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2780 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2781 	},
2782 	{
2783 	.description = "drop",
2784 	.field_bit_size = 1,
2785 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2786 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2787 	},
2788 	{
2789 	.description = "ecv_valid",
2790 	.field_bit_size = 1,
2791 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2792 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
2793 	.field_opr1 = {
2794 	ULP_WP_SYM_ECV_VALID_YES}
2795 	},
2796 	{
2797 	.description = "ecv_custom_en",
2798 	.field_bit_size = 1,
2799 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2800 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2801 	},
2802 	{
2803 	.description = "ecv_vtag_type",
2804 	.field_bit_size = 4,
2805 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2806 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2807 	},
2808 	{
2809 	.description = "ecv_l2_en",
2810 	.field_bit_size = 1,
2811 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2812 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2813 	},
2814 	{
2815 	.description = "ecv_l3_type",
2816 	.field_bit_size = 3,
2817 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2818 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2819 	},
2820 	{
2821 	.description = "ecv_l4_type",
2822 	.field_bit_size = 3,
2823 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2824 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2825 	},
2826 	{
2827 	.description = "ecv_tun_type",
2828 	.field_bit_size = 3,
2829 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2830 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2831 	},
2832 	{
2833 	.description = "vtag_tpid",
2834 	.field_bit_size = 16,
2835 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2836 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2837 	},
2838 	{
2839 	.description = "vtag_pcp",
2840 	.field_bit_size = 3,
2841 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2842 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2843 	},
2844 	{
2845 	.description = "vtag_de",
2846 	.field_bit_size = 1,
2847 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2848 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2849 	},
2850 	{
2851 	.description = "vtag_vid",
2852 	.field_bit_size = 12,
2853 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2854 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2855 	},
2856 	/* act_tid: 4, , table: int_flow_counter_tbl.0 */
2857 	{
2858 	.description = "count",
2859 	.field_bit_size = 64,
2860 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2861 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2862 	},
2863 	/* act_tid: 4, , table: int_vtag_encap_record.0 */
2864 	{
2865 	.description = "ecv_valid",
2866 	.field_bit_size = 1,
2867 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2868 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
2869 	.field_opr1 = {
2870 	1}
2871 	},
2872 	{
2873 	.description = "ecv_custom_en",
2874 	.field_bit_size = 1,
2875 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2876 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2877 	},
2878 	{
2879 	.description = "ecv_vtag_type",
2880 	.field_bit_size = 4,
2881 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2882 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
2883 	.field_opr1 = {
2884 	ULP_WP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI}
2885 	},
2886 	{
2887 	.description = "ecv_l2_en",
2888 	.field_bit_size = 1,
2889 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2890 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2891 	},
2892 	{
2893 	.description = "ecv_l3_type",
2894 	.field_bit_size = 3,
2895 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2896 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2897 	},
2898 	{
2899 	.description = "ecv_l4_type",
2900 	.field_bit_size = 3,
2901 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2902 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2903 	},
2904 	{
2905 	.description = "ecv_tun_type",
2906 	.field_bit_size = 3,
2907 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2908 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2909 	},
2910 	{
2911 	.description = "vtag_tpid",
2912 	.field_bit_size = 16,
2913 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2914 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
2915 	.field_opr1 = {
2916 	(BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN >> 8) & 0xff,
2917 	BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff}
2918 	},
2919 	{
2920 	.description = "vtag_pcp",
2921 	.field_bit_size = 3,
2922 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2923 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
2924 	.field_opr1 = {
2925 	(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff,
2926 	BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff}
2927 	},
2928 	{
2929 	.description = "vtag_de",
2930 	.field_bit_size = 1,
2931 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2932 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2933 	},
2934 	{
2935 	.description = "vtag_vid",
2936 	.field_bit_size = 12,
2937 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2938 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
2939 	.field_opr1 = {
2940 	(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff,
2941 	BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff}
2942 	},
2943 	/* act_tid: 4, , table: int_full_act_record.0 */
2944 	{
2945 	.description = "flow_cntr_ptr",
2946 	.field_bit_size = 14,
2947 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2948 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
2949 	.field_opr1 = {
2950 	(BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
2951 	BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff}
2952 	},
2953 	{
2954 	.description = "age_enable",
2955 	.field_bit_size = 1,
2956 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2957 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2958 	},
2959 	{
2960 	.description = "agg_cntr_en",
2961 	.field_bit_size = 1,
2962 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2963 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2964 	},
2965 	{
2966 	.description = "rate_cntr_en",
2967 	.field_bit_size = 1,
2968 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2969 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2970 	},
2971 	{
2972 	.description = "flow_cntr_en",
2973 	.field_bit_size = 1,
2974 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2975 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
2976 	.field_opr1 = {
2977 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff,
2978 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff,
2979 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff,
2980 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff,
2981 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff,
2982 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff,
2983 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff,
2984 	(uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff}
2985 	},
2986 	{
2987 	.description = "tcpflags_key",
2988 	.field_bit_size = 8,
2989 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2990 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2991 	},
2992 	{
2993 	.description = "tcpflags_mir",
2994 	.field_bit_size = 1,
2995 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
2996 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
2997 	},
2998 	{
2999 	.description = "tcpflags_match",
3000 	.field_bit_size = 1,
3001 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3002 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3003 	},
3004 	{
3005 	.description = "encap_ptr",
3006 	.field_bit_size = 11,
3007 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3008 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
3009 	.field_opr1 = {
3010 	(BNXT_ULP_RF_IDX_ENCAP_PTR_0 >> 8) & 0xff,
3011 	BNXT_ULP_RF_IDX_ENCAP_PTR_0 & 0xff}
3012 	},
3013 	{
3014 	.description = "dst_ip_ptr",
3015 	.field_bit_size = 10,
3016 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3017 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3018 	},
3019 	{
3020 	.description = "tcp_dst_port",
3021 	.field_bit_size = 16,
3022 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3023 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3024 	},
3025 	{
3026 	.description = "src_ip_ptr",
3027 	.field_bit_size = 10,
3028 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3029 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3030 	},
3031 	{
3032 	.description = "tcp_src_port",
3033 	.field_bit_size = 16,
3034 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3035 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3036 	},
3037 	{
3038 	.description = "meter_id",
3039 	.field_bit_size = 10,
3040 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3041 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3042 	},
3043 	{
3044 	.description = "l3_rdir",
3045 	.field_bit_size = 1,
3046 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3047 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3048 	},
3049 	{
3050 	.description = "tl3_rdir",
3051 	.field_bit_size = 1,
3052 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3053 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3054 	},
3055 	{
3056 	.description = "l3_ttl_dec",
3057 	.field_bit_size = 1,
3058 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3059 	.field_src1 = BNXT_ULP_FIELD_SRC_CF,
3060 	.field_opr1 = {
3061 	(BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff,
3062 	BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff}
3063 	},
3064 	{
3065 	.description = "tl3_ttl_dec",
3066 	.field_bit_size = 1,
3067 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3068 	.field_src1 = BNXT_ULP_FIELD_SRC_CF,
3069 	.field_opr1 = {
3070 	(BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff,
3071 	BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff}
3072 	},
3073 	{
3074 	.description = "decap_func",
3075 	.field_bit_size = 4,
3076 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3077 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3078 	},
3079 	{
3080 	.description = "vnic_or_vport",
3081 	.field_bit_size = 12,
3082 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3083 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
3084 	.field_opr1 = {
3085 	(BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff,
3086 	BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff}
3087 	},
3088 	{
3089 	.description = "pop_vlan",
3090 	.field_bit_size = 1,
3091 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3092 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3093 	},
3094 	{
3095 	.description = "meter",
3096 	.field_bit_size = 1,
3097 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3098 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3099 	},
3100 	{
3101 	.description = "mirror",
3102 	.field_bit_size = 2,
3103 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3104 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3105 	},
3106 	{
3107 	.description = "drop",
3108 	.field_bit_size = 1,
3109 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3110 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
3111 	.field_opr1 = {
3112 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 56) & 0xff,
3113 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 48) & 0xff,
3114 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 40) & 0xff,
3115 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 32) & 0xff,
3116 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 24) & 0xff,
3117 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 16) & 0xff,
3118 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 8) & 0xff,
3119 	(uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff}
3120 	},
3121 	{
3122 	.description = "hit",
3123 	.field_bit_size = 1,
3124 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3125 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3126 	},
3127 	{
3128 	.description = "type",
3129 	.field_bit_size = 1,
3130 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3131 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3132 	},
3133 	/* act_tid: 4, , table: ext_full_act_record.no_tag */
3134 	{
3135 	.description = "flow_cntr_ptr",
3136 	.field_bit_size = 14,
3137 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3138 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
3139 	.field_opr1 = {
3140 	(BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
3141 	BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff}
3142 	},
3143 	{
3144 	.description = "age_enable",
3145 	.field_bit_size = 1,
3146 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3147 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3148 	},
3149 	{
3150 	.description = "agg_cntr_en",
3151 	.field_bit_size = 1,
3152 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3153 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3154 	},
3155 	{
3156 	.description = "rate_cntr_en",
3157 	.field_bit_size = 1,
3158 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3159 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3160 	},
3161 	{
3162 	.description = "flow_cntr_en",
3163 	.field_bit_size = 1,
3164 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3165 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
3166 	.field_opr1 = {
3167 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff,
3168 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff,
3169 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff,
3170 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff,
3171 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff,
3172 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff,
3173 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff,
3174 	(uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff}
3175 	},
3176 	{
3177 	.description = "flow_cntr_ext",
3178 	.field_bit_size = 1,
3179 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3180 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3181 	},
3182 	{
3183 	.description = "tcpflags_key",
3184 	.field_bit_size = 8,
3185 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3186 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3187 	},
3188 	{
3189 	.description = "tcpflags_mir",
3190 	.field_bit_size = 1,
3191 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3192 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3193 	},
3194 	{
3195 	.description = "tcpflags_match",
3196 	.field_bit_size = 1,
3197 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3198 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3199 	},
3200 	{
3201 	.description = "encap_ptr",
3202 	.field_bit_size = 11,
3203 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3204 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3205 	},
3206 	{
3207 	.description = "encap_rec_int",
3208 	.field_bit_size = 1,
3209 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3210 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3211 	},
3212 	{
3213 	.description = "dst_ip_ptr",
3214 	.field_bit_size = 10,
3215 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3216 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3217 	},
3218 	{
3219 	.description = "tcp_dst_port",
3220 	.field_bit_size = 16,
3221 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3222 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3223 	},
3224 	{
3225 	.description = "src_ip_ptr",
3226 	.field_bit_size = 10,
3227 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3228 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3229 	},
3230 	{
3231 	.description = "tcp_src_port",
3232 	.field_bit_size = 16,
3233 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3234 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3235 	},
3236 	{
3237 	.description = "meter_id",
3238 	.field_bit_size = 10,
3239 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3240 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3241 	},
3242 	{
3243 	.description = "l3_rdir",
3244 	.field_bit_size = 1,
3245 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3246 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3247 	},
3248 	{
3249 	.description = "tl3_rdir",
3250 	.field_bit_size = 1,
3251 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3252 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3253 	},
3254 	{
3255 	.description = "l3_ttl_dec",
3256 	.field_bit_size = 1,
3257 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3258 	.field_src1 = BNXT_ULP_FIELD_SRC_CF,
3259 	.field_opr1 = {
3260 	(BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff,
3261 	BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff}
3262 	},
3263 	{
3264 	.description = "tl3_ttl_dec",
3265 	.field_bit_size = 1,
3266 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3267 	.field_src1 = BNXT_ULP_FIELD_SRC_CF,
3268 	.field_opr1 = {
3269 	(BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff,
3270 	BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff}
3271 	},
3272 	{
3273 	.description = "decap_func",
3274 	.field_bit_size = 4,
3275 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3276 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3277 	},
3278 	{
3279 	.description = "vnic_or_vport",
3280 	.field_bit_size = 12,
3281 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3282 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
3283 	.field_opr1 = {
3284 	(BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff,
3285 	BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff}
3286 	},
3287 	{
3288 	.description = "pop_vlan",
3289 	.field_bit_size = 1,
3290 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3291 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3292 	},
3293 	{
3294 	.description = "meter",
3295 	.field_bit_size = 1,
3296 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3297 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3298 	},
3299 	{
3300 	.description = "mirror",
3301 	.field_bit_size = 2,
3302 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3303 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3304 	},
3305 	{
3306 	.description = "drop",
3307 	.field_bit_size = 1,
3308 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3309 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
3310 	.field_opr1 = {
3311 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 56) & 0xff,
3312 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 48) & 0xff,
3313 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 40) & 0xff,
3314 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 32) & 0xff,
3315 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 24) & 0xff,
3316 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 16) & 0xff,
3317 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 8) & 0xff,
3318 	(uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff}
3319 	},
3320 	{
3321 	.description = "ecv_valid",
3322 	.field_bit_size = 1,
3323 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3324 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
3325 	.field_opr1 = {
3326 	ULP_WP_SYM_ECV_VALID_YES}
3327 	},
3328 	{
3329 	.description = "ecv_custom_en",
3330 	.field_bit_size = 1,
3331 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3332 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3333 	},
3334 	{
3335 	.description = "ecv_vtag_type",
3336 	.field_bit_size = 4,
3337 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3338 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3339 	},
3340 	{
3341 	.description = "ecv_l2_en",
3342 	.field_bit_size = 1,
3343 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3344 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3345 	},
3346 	{
3347 	.description = "ecv_l3_type",
3348 	.field_bit_size = 3,
3349 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3350 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3351 	},
3352 	{
3353 	.description = "ecv_l4_type",
3354 	.field_bit_size = 3,
3355 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3356 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3357 	},
3358 	{
3359 	.description = "ecv_tun_type",
3360 	.field_bit_size = 3,
3361 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3362 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3363 	},
3364 	{
3365 	.description = "vtag_tpid",
3366 	.field_bit_size = 16,
3367 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3368 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3369 	},
3370 	{
3371 	.description = "vtag_pcp",
3372 	.field_bit_size = 3,
3373 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3374 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3375 	},
3376 	{
3377 	.description = "vtag_de",
3378 	.field_bit_size = 1,
3379 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3380 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3381 	},
3382 	{
3383 	.description = "vtag_vid",
3384 	.field_bit_size = 12,
3385 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3386 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3387 	},
3388 	/* act_tid: 4, , table: ext_full_act_record.one_tag */
3389 	{
3390 	.description = "flow_cntr_ptr",
3391 	.field_bit_size = 14,
3392 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3393 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
3394 	.field_opr1 = {
3395 	(BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
3396 	BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff}
3397 	},
3398 	{
3399 	.description = "age_enable",
3400 	.field_bit_size = 1,
3401 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3402 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3403 	},
3404 	{
3405 	.description = "agg_cntr_en",
3406 	.field_bit_size = 1,
3407 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3408 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3409 	},
3410 	{
3411 	.description = "rate_cntr_en",
3412 	.field_bit_size = 1,
3413 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3414 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3415 	},
3416 	{
3417 	.description = "flow_cntr_en",
3418 	.field_bit_size = 1,
3419 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3420 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
3421 	.field_opr1 = {
3422 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff,
3423 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff,
3424 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff,
3425 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff,
3426 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff,
3427 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff,
3428 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff,
3429 	(uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff}
3430 	},
3431 	{
3432 	.description = "flow_cntr_ext",
3433 	.field_bit_size = 1,
3434 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3435 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3436 	},
3437 	{
3438 	.description = "tcpflags_key",
3439 	.field_bit_size = 8,
3440 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3441 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3442 	},
3443 	{
3444 	.description = "tcpflags_mir",
3445 	.field_bit_size = 1,
3446 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3447 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3448 	},
3449 	{
3450 	.description = "tcpflags_match",
3451 	.field_bit_size = 1,
3452 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3453 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3454 	},
3455 	{
3456 	.description = "encap_ptr",
3457 	.field_bit_size = 11,
3458 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3459 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3460 	},
3461 	{
3462 	.description = "encap_rec_int",
3463 	.field_bit_size = 1,
3464 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3465 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3466 	},
3467 	{
3468 	.description = "dst_ip_ptr",
3469 	.field_bit_size = 10,
3470 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3471 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3472 	},
3473 	{
3474 	.description = "tcp_dst_port",
3475 	.field_bit_size = 16,
3476 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3477 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3478 	},
3479 	{
3480 	.description = "src_ip_ptr",
3481 	.field_bit_size = 10,
3482 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3483 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3484 	},
3485 	{
3486 	.description = "tcp_src_port",
3487 	.field_bit_size = 16,
3488 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3489 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3490 	},
3491 	{
3492 	.description = "meter_id",
3493 	.field_bit_size = 10,
3494 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3495 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3496 	},
3497 	{
3498 	.description = "l3_rdir",
3499 	.field_bit_size = 1,
3500 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3501 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3502 	},
3503 	{
3504 	.description = "tl3_rdir",
3505 	.field_bit_size = 1,
3506 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3507 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3508 	},
3509 	{
3510 	.description = "l3_ttl_dec",
3511 	.field_bit_size = 1,
3512 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3513 	.field_src1 = BNXT_ULP_FIELD_SRC_CF,
3514 	.field_opr1 = {
3515 	(BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff,
3516 	BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff}
3517 	},
3518 	{
3519 	.description = "tl3_ttl_dec",
3520 	.field_bit_size = 1,
3521 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3522 	.field_src1 = BNXT_ULP_FIELD_SRC_CF,
3523 	.field_opr1 = {
3524 	(BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff,
3525 	BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff}
3526 	},
3527 	{
3528 	.description = "decap_func",
3529 	.field_bit_size = 4,
3530 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3531 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3532 	},
3533 	{
3534 	.description = "vnic_or_vport",
3535 	.field_bit_size = 12,
3536 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3537 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
3538 	.field_opr1 = {
3539 	(BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff,
3540 	BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff}
3541 	},
3542 	{
3543 	.description = "pop_vlan",
3544 	.field_bit_size = 1,
3545 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3546 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
3547 	.field_opr1 = {
3548 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 56) & 0xff,
3549 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 48) & 0xff,
3550 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 40) & 0xff,
3551 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 32) & 0xff,
3552 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 24) & 0xff,
3553 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 16) & 0xff,
3554 	((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 8) & 0xff,
3555 	(uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN & 0xff}
3556 	},
3557 	{
3558 	.description = "meter",
3559 	.field_bit_size = 1,
3560 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3561 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3562 	},
3563 	{
3564 	.description = "mirror",
3565 	.field_bit_size = 2,
3566 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3567 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3568 	},
3569 	{
3570 	.description = "drop",
3571 	.field_bit_size = 1,
3572 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3573 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
3574 	.field_opr1 = {
3575 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 56) & 0xff,
3576 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 48) & 0xff,
3577 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 40) & 0xff,
3578 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 32) & 0xff,
3579 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 24) & 0xff,
3580 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 16) & 0xff,
3581 	((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 8) & 0xff,
3582 	(uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff}
3583 	},
3584 	{
3585 	.description = "ecv_valid",
3586 	.field_bit_size = 1,
3587 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3588 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
3589 	.field_opr1 = {
3590 	1}
3591 	},
3592 	{
3593 	.description = "ecv_custom_en",
3594 	.field_bit_size = 1,
3595 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3596 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3597 	},
3598 	{
3599 	.description = "ecv_vtag_type",
3600 	.field_bit_size = 4,
3601 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3602 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
3603 	.field_opr1 = {
3604 	ULP_WP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI}
3605 	},
3606 	{
3607 	.description = "ecv_l2_en",
3608 	.field_bit_size = 1,
3609 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3610 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3611 	},
3612 	{
3613 	.description = "ecv_l3_type",
3614 	.field_bit_size = 3,
3615 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3616 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3617 	},
3618 	{
3619 	.description = "ecv_l4_type",
3620 	.field_bit_size = 3,
3621 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3622 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3623 	},
3624 	{
3625 	.description = "ecv_tun_type",
3626 	.field_bit_size = 3,
3627 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3628 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3629 	},
3630 	{
3631 	.description = "vtag_tpid",
3632 	.field_bit_size = 16,
3633 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3634 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
3635 	.field_opr1 = {
3636 	(BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN >> 8) & 0xff,
3637 	BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff}
3638 	},
3639 	{
3640 	.description = "vtag_pcp",
3641 	.field_bit_size = 3,
3642 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3643 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
3644 	.field_opr1 = {
3645 	(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff,
3646 	BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff}
3647 	},
3648 	{
3649 	.description = "vtag_de",
3650 	.field_bit_size = 1,
3651 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3652 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3653 	},
3654 	{
3655 	.description = "vtag_vid",
3656 	.field_bit_size = 12,
3657 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3658 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
3659 	.field_opr1 = {
3660 	(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff,
3661 	BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff}
3662 	},
3663 	/* act_tid: 5, , table: int_flow_counter_tbl.0 */
3664 	{
3665 	.description = "count",
3666 	.field_bit_size = 64,
3667 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3668 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3669 	},
3670 	/* act_tid: 5, , table: act_modify_ipv4_src.0 */
3671 	{
3672 	.description = "ipv4_addr",
3673 	.field_bit_size = 32,
3674 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3675 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
3676 	.field_opr1 = {
3677 	(BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC >> 8) & 0xff,
3678 	BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC & 0xff}
3679 	},
3680 	/* act_tid: 5, , table: act_modify_ipv4_dst.0 */
3681 	{
3682 	.description = "ipv4_addr",
3683 	.field_bit_size = 32,
3684 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3685 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
3686 	.field_opr1 = {
3687 	(BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST >> 8) & 0xff,
3688 	BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST & 0xff}
3689 	},
3690 	/* act_tid: 5, , table: int_encap_mac_record.dummy */
3691 	{
3692 	.description = "ecv_valid",
3693 	.field_bit_size = 1,
3694 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3695 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
3696 	.field_opr1 = {
3697 	1}
3698 	},
3699 	{
3700 	.description = "ecv_custom_en",
3701 	.field_bit_size = 1,
3702 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3703 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3704 	},
3705 	{
3706 	.description = "ecv_vtag_type",
3707 	.field_bit_size = 4,
3708 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3709 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3710 	},
3711 	{
3712 	.description = "ecv_l2_en",
3713 	.field_bit_size = 1,
3714 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3715 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
3716 	.field_opr1 = {
3717 	ULP_WP_SYM_ECV_L2_EN_YES}
3718 	},
3719 	{
3720 	.description = "ecv_l3_type",
3721 	.field_bit_size = 3,
3722 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3723 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3724 	},
3725 	{
3726 	.description = "ecv_l4_type",
3727 	.field_bit_size = 3,
3728 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3729 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3730 	},
3731 	{
3732 	.description = "ecv_tun_type",
3733 	.field_bit_size = 3,
3734 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3735 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3736 	},
3737 	{
3738 	.description = "vtag_tpid",
3739 	.field_bit_size = 16,
3740 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3741 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3742 	},
3743 	{
3744 	.description = "vtag_pcp",
3745 	.field_bit_size = 3,
3746 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3747 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3748 	},
3749 	{
3750 	.description = "vtag_de",
3751 	.field_bit_size = 1,
3752 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3753 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3754 	},
3755 	{
3756 	.description = "vtag_vid",
3757 	.field_bit_size = 12,
3758 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3759 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3760 	},
3761 	/* act_tid: 5, , table: int_full_act_record.0 */
3762 	{
3763 	.description = "flow_cntr_ptr",
3764 	.field_bit_size = 14,
3765 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3766 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
3767 	.field_opr1 = {
3768 	(BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
3769 	BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff}
3770 	},
3771 	{
3772 	.description = "age_enable",
3773 	.field_bit_size = 1,
3774 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3775 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3776 	},
3777 	{
3778 	.description = "agg_cntr_en",
3779 	.field_bit_size = 1,
3780 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3781 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3782 	},
3783 	{
3784 	.description = "rate_cntr_en",
3785 	.field_bit_size = 1,
3786 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3787 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3788 	},
3789 	{
3790 	.description = "flow_cntr_en",
3791 	.field_bit_size = 1,
3792 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3793 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
3794 	.field_opr1 = {
3795 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff,
3796 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff,
3797 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff,
3798 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff,
3799 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff,
3800 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff,
3801 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff,
3802 	(uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff}
3803 	},
3804 	{
3805 	.description = "tcpflags_key",
3806 	.field_bit_size = 8,
3807 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3808 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3809 	},
3810 	{
3811 	.description = "tcpflags_mir",
3812 	.field_bit_size = 1,
3813 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3814 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3815 	},
3816 	{
3817 	.description = "tcpflags_match",
3818 	.field_bit_size = 1,
3819 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3820 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3821 	},
3822 	{
3823 	.description = "encap_ptr",
3824 	.field_bit_size = 11,
3825 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3826 	.field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
3827 	.field_opr1 = {
3828 	(BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR >> 8) & 0xff,
3829 	BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR & 0xff}
3830 	},
3831 	{
3832 	.description = "dst_ip_ptr",
3833 	.field_bit_size = 10,
3834 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3835 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
3836 	.field_opr1 = {
3837 	(BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff,
3838 	BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 & 0xff}
3839 	},
3840 	{
3841 	.description = "tcp_dst_port",
3842 	.field_bit_size = 16,
3843 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
3844 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
3845 	.field_opr1 = {
3846 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff,
3847 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff,
3848 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff,
3849 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff,
3850 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff,
3851 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff,
3852 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff,
3853 	(uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff},
3854 	.field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP,
3855 	.field_opr2 = {
3856 	(BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff,
3857 	BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff},
3858 	.field_src3 = BNXT_ULP_FIELD_SRC_ZERO
3859 	},
3860 	{
3861 	.description = "src_ip_ptr",
3862 	.field_bit_size = 10,
3863 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3864 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
3865 	.field_opr1 = {
3866 	(BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff,
3867 	BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 & 0xff}
3868 	},
3869 	{
3870 	.description = "tcp_src_port",
3871 	.field_bit_size = 16,
3872 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
3873 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
3874 	.field_opr1 = {
3875 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff,
3876 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff,
3877 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff,
3878 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff,
3879 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff,
3880 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff,
3881 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff,
3882 	(uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff},
3883 	.field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP,
3884 	.field_opr2 = {
3885 	(BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff,
3886 	BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff},
3887 	.field_src3 = BNXT_ULP_FIELD_SRC_ZERO
3888 	},
3889 	{
3890 	.description = "meter_id",
3891 	.field_bit_size = 10,
3892 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3893 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3894 	},
3895 	{
3896 	.description = "l3_rdir",
3897 	.field_bit_size = 1,
3898 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3899 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3900 	},
3901 	{
3902 	.description = "tl3_rdir",
3903 	.field_bit_size = 1,
3904 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3905 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3906 	},
3907 	{
3908 	.description = "l3_ttl_dec",
3909 	.field_bit_size = 1,
3910 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3911 	.field_src1 = BNXT_ULP_FIELD_SRC_CF,
3912 	.field_opr1 = {
3913 	(BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff,
3914 	BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff}
3915 	},
3916 	{
3917 	.description = "tl3_ttl_dec",
3918 	.field_bit_size = 1,
3919 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3920 	.field_src1 = BNXT_ULP_FIELD_SRC_CF,
3921 	.field_opr1 = {
3922 	(BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff,
3923 	BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff}
3924 	},
3925 	{
3926 	.description = "decap_func",
3927 	.field_bit_size = 4,
3928 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
3929 	.field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT,
3930 	.field_opr1 = {
3931 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
3932 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
3933 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
3934 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
3935 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
3936 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
3937 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
3938 	(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
3939 	.field_src2 = BNXT_ULP_FIELD_SRC_CONST,
3940 	.field_opr2 = {
3941 	ULP_WP_SYM_DECAP_FUNC_THRU_TL2},
3942 	.field_src3 = BNXT_ULP_FIELD_SRC_CONST,
3943 	.field_opr3 = {
3944 	ULP_WP_SYM_DECAP_FUNC_THRU_L2}
3945 	},
3946 	{
3947 	.description = "vnic_or_vport",
3948 	.field_bit_size = 12,
3949 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3950 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
3951 	.field_opr1 = {
3952 	(BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff,
3953 	BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff}
3954 	},
3955 	{
3956 	.description = "pop_vlan",
3957 	.field_bit_size = 1,
3958 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3959 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3960 	},
3961 	{
3962 	.description = "meter",
3963 	.field_bit_size = 1,
3964 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3965 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3966 	},
3967 	{
3968 	.description = "mirror",
3969 	.field_bit_size = 2,
3970 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3971 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3972 	},
3973 	{
3974 	.description = "drop",
3975 	.field_bit_size = 1,
3976 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3977 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3978 	},
3979 	{
3980 	.description = "hit",
3981 	.field_bit_size = 1,
3982 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3983 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3984 	},
3985 	{
3986 	.description = "type",
3987 	.field_bit_size = 1,
3988 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3989 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
3990 	},
3991 	/* act_tid: 5, , table: ext_full_act_record.0 */
3992 	{
3993 	.description = "flow_cntr_ptr",
3994 	.field_bit_size = 14,
3995 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
3996 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
3997 	.field_opr1 = {
3998 	(BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
3999 	BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff}
4000 	},
4001 	{
4002 	.description = "age_enable",
4003 	.field_bit_size = 1,
4004 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4005 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4006 	},
4007 	{
4008 	.description = "agg_cntr_en",
4009 	.field_bit_size = 1,
4010 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4011 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4012 	},
4013 	{
4014 	.description = "rate_cntr_en",
4015 	.field_bit_size = 1,
4016 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4017 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4018 	},
4019 	{
4020 	.description = "flow_cntr_en",
4021 	.field_bit_size = 1,
4022 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4023 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
4024 	.field_opr1 = {
4025 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff,
4026 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff,
4027 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff,
4028 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff,
4029 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff,
4030 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff,
4031 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff,
4032 	(uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff}
4033 	},
4034 	{
4035 	.description = "flow_cntr_ext",
4036 	.field_bit_size = 1,
4037 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4038 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4039 	},
4040 	{
4041 	.description = "tcpflags_key",
4042 	.field_bit_size = 8,
4043 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4044 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4045 	},
4046 	{
4047 	.description = "tcpflags_mir",
4048 	.field_bit_size = 1,
4049 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4050 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4051 	},
4052 	{
4053 	.description = "tcpflags_match",
4054 	.field_bit_size = 1,
4055 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4056 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4057 	},
4058 	{
4059 	.description = "encap_ptr",
4060 	.field_bit_size = 11,
4061 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4062 	.field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
4063 	.field_opr1 = {
4064 	(BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR >> 8) & 0xff,
4065 	BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR & 0xff}
4066 	},
4067 	{
4068 	.description = "encap_rec_int",
4069 	.field_bit_size = 1,
4070 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4071 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
4072 	.field_opr1 = {
4073 	1}
4074 	},
4075 	{
4076 	.description = "dst_ip_ptr",
4077 	.field_bit_size = 10,
4078 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4079 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
4080 	.field_opr1 = {
4081 	(BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff,
4082 	BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 & 0xff}
4083 	},
4084 	{
4085 	.description = "tcp_dst_port",
4086 	.field_bit_size = 16,
4087 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4088 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
4089 	.field_opr1 = {
4090 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff,
4091 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff,
4092 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff,
4093 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff,
4094 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff,
4095 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff,
4096 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff,
4097 	(uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff},
4098 	.field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP,
4099 	.field_opr2 = {
4100 	(BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff,
4101 	BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff},
4102 	.field_src3 = BNXT_ULP_FIELD_SRC_ZERO
4103 	},
4104 	{
4105 	.description = "src_ip_ptr",
4106 	.field_bit_size = 10,
4107 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4108 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
4109 	.field_opr1 = {
4110 	(BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff,
4111 	BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 & 0xff}
4112 	},
4113 	{
4114 	.description = "tcp_src_port",
4115 	.field_bit_size = 16,
4116 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4117 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
4118 	.field_opr1 = {
4119 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff,
4120 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff,
4121 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff,
4122 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff,
4123 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff,
4124 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff,
4125 	((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff,
4126 	(uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff},
4127 	.field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP,
4128 	.field_opr2 = {
4129 	(BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff,
4130 	BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff},
4131 	.field_src3 = BNXT_ULP_FIELD_SRC_ZERO
4132 	},
4133 	{
4134 	.description = "meter_id",
4135 	.field_bit_size = 10,
4136 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4137 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4138 	},
4139 	{
4140 	.description = "l3_rdir",
4141 	.field_bit_size = 1,
4142 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4143 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4144 	},
4145 	{
4146 	.description = "tl3_rdir",
4147 	.field_bit_size = 1,
4148 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4149 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4150 	},
4151 	{
4152 	.description = "l3_ttl_dec",
4153 	.field_bit_size = 1,
4154 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4155 	.field_src1 = BNXT_ULP_FIELD_SRC_CF,
4156 	.field_opr1 = {
4157 	(BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff,
4158 	BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff}
4159 	},
4160 	{
4161 	.description = "tl3_ttl_dec",
4162 	.field_bit_size = 1,
4163 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4164 	.field_src1 = BNXT_ULP_FIELD_SRC_CF,
4165 	.field_opr1 = {
4166 	(BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff,
4167 	BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff}
4168 	},
4169 	{
4170 	.description = "decap_func",
4171 	.field_bit_size = 4,
4172 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4173 	.field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT,
4174 	.field_opr1 = {
4175 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
4176 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
4177 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
4178 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
4179 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
4180 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
4181 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
4182 	(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
4183 	.field_src2 = BNXT_ULP_FIELD_SRC_CONST,
4184 	.field_opr2 = {
4185 	ULP_WP_SYM_DECAP_FUNC_THRU_TL2},
4186 	.field_src3 = BNXT_ULP_FIELD_SRC_CONST,
4187 	.field_opr3 = {
4188 	ULP_WP_SYM_DECAP_FUNC_THRU_L2}
4189 	},
4190 	{
4191 	.description = "vnic_or_vport",
4192 	.field_bit_size = 12,
4193 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4194 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
4195 	.field_opr1 = {
4196 	(BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff,
4197 	BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff}
4198 	},
4199 	{
4200 	.description = "pop_vlan",
4201 	.field_bit_size = 1,
4202 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4203 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4204 	},
4205 	{
4206 	.description = "meter",
4207 	.field_bit_size = 1,
4208 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4209 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4210 	},
4211 	{
4212 	.description = "mirror",
4213 	.field_bit_size = 2,
4214 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4215 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4216 	},
4217 	{
4218 	.description = "drop",
4219 	.field_bit_size = 1,
4220 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4221 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4222 	},
4223 	{
4224 	.description = "ecv_valid",
4225 	.field_bit_size = 1,
4226 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4227 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
4228 	.field_opr1 = {
4229 	ULP_WP_SYM_ECV_VALID_YES}
4230 	},
4231 	{
4232 	.description = "ecv_custom_en",
4233 	.field_bit_size = 1,
4234 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4235 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4236 	},
4237 	{
4238 	.description = "ecv_vtag_type",
4239 	.field_bit_size = 4,
4240 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4241 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4242 	},
4243 	{
4244 	.description = "ecv_l2_en",
4245 	.field_bit_size = 1,
4246 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4247 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4248 	},
4249 	{
4250 	.description = "ecv_l3_type",
4251 	.field_bit_size = 3,
4252 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4253 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4254 	},
4255 	{
4256 	.description = "ecv_l4_type",
4257 	.field_bit_size = 3,
4258 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4259 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4260 	},
4261 	{
4262 	.description = "ecv_tun_type",
4263 	.field_bit_size = 3,
4264 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4265 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4266 	},
4267 	{
4268 	.description = "vtag_tpid",
4269 	.field_bit_size = 16,
4270 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4271 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4272 	},
4273 	{
4274 	.description = "vtag_pcp",
4275 	.field_bit_size = 3,
4276 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4277 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4278 	},
4279 	{
4280 	.description = "vtag_de",
4281 	.field_bit_size = 1,
4282 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4283 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4284 	},
4285 	{
4286 	.description = "vtag_vid",
4287 	.field_bit_size = 12,
4288 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4289 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4290 	},
4291 	/* act_tid: 6, , table: int_flow_counter_tbl.0 */
4292 	{
4293 	.description = "count",
4294 	.field_bit_size = 64,
4295 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4296 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4297 	},
4298 	/* act_tid: 6, , table: sp_smac_ipv4.0 */
4299 	{
4300 	.description = "smac",
4301 	.field_bit_size = 48,
4302 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4303 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4304 	.field_opr1 = {
4305 	(BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff,
4306 	BNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff}
4307 	},
4308 	{
4309 	.description = "ipv4_src_addr",
4310 	.field_bit_size = 32,
4311 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4312 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4313 	.field_opr1 = {
4314 	(BNXT_ULP_ENC_FIELD_IPV4_SADDR >> 8) & 0xff,
4315 	BNXT_ULP_ENC_FIELD_IPV4_SADDR & 0xff}
4316 	},
4317 	/* act_tid: 6, , table: sp_smac_ipv6.0 */
4318 	{
4319 	.description = "smac",
4320 	.field_bit_size = 48,
4321 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4322 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4323 	.field_opr1 = {
4324 	(BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff,
4325 	BNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff}
4326 	},
4327 	{
4328 	.description = "ipv6_src_addr",
4329 	.field_bit_size = 128,
4330 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4331 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4332 	.field_opr1 = {
4333 	(BNXT_ULP_ENC_FIELD_IPV6_SADDR >> 8) & 0xff,
4334 	BNXT_ULP_ENC_FIELD_IPV6_SADDR & 0xff}
4335 	},
4336 	/* act_tid: 6, , table: int_tun_encap_record.0 */
4337 	{
4338 	.description = "ecv_valid",
4339 	.field_bit_size = 1,
4340 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4341 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
4342 	.field_opr1 = {
4343 	ULP_WP_SYM_ECV_VALID_YES}
4344 	},
4345 	{
4346 	.description = "ecv_custom_en",
4347 	.field_bit_size = 1,
4348 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4349 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4350 	},
4351 	{
4352 	.description = "ecv_vtag_type",
4353 	.field_bit_size = 4,
4354 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4355 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
4356 	.field_opr1 = {
4357 	(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff,
4358 	BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff}
4359 	},
4360 	{
4361 	.description = "ecv_l2_en",
4362 	.field_bit_size = 1,
4363 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4364 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
4365 	.field_opr1 = {
4366 	ULP_WP_SYM_ECV_L2_EN_YES}
4367 	},
4368 	{
4369 	.description = "ecv_l3_type",
4370 	.field_bit_size = 3,
4371 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4372 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
4373 	.field_opr1 = {
4374 	(BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff,
4375 	BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff}
4376 	},
4377 	{
4378 	.description = "ecv_l4_type",
4379 	.field_bit_size = 3,
4380 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4381 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
4382 	.field_opr1 = {
4383 	ULP_WP_SYM_ECV_L4_TYPE_UDP_CSUM}
4384 	},
4385 	{
4386 	.description = "ecv_tun_type",
4387 	.field_bit_size = 3,
4388 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4389 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
4390 	.field_opr1 = {
4391 	ULP_WP_SYM_ECV_TUN_TYPE_VXLAN}
4392 	},
4393 	{
4394 	.description = "enc_eth_dmac",
4395 	.field_bit_size = 48,
4396 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4397 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4398 	.field_opr1 = {
4399 	(BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff,
4400 	BNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff}
4401 	},
4402 	{
4403 	.description = "enc_o_vlan_tag",
4404 	.field_bit_size = 16,
4405 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4406 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4407 	.field_opr1 = {
4408 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff,
4409 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff,
4410 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff,
4411 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff,
4412 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff,
4413 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff,
4414 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff,
4415 	(uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff},
4416 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4417 	.field_opr2 = {
4418 	(BNXT_ULP_ENC_FIELD_O_VLAN_TCI >> 8) & 0xff,
4419 	BNXT_ULP_ENC_FIELD_O_VLAN_TCI & 0xff},
4420 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4421 	},
4422 	{
4423 	.description = "enc_o_vlan_type",
4424 	.field_bit_size = 16,
4425 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4426 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4427 	.field_opr1 = {
4428 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff,
4429 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff,
4430 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff,
4431 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff,
4432 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff,
4433 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff,
4434 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff,
4435 	(uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff},
4436 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4437 	.field_opr2 = {
4438 	(BNXT_ULP_ENC_FIELD_O_VLAN_TYPE >> 8) & 0xff,
4439 	BNXT_ULP_ENC_FIELD_O_VLAN_TYPE & 0xff},
4440 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4441 	},
4442 	{
4443 	.description = "enc_i_vlan_tag",
4444 	.field_bit_size = 16,
4445 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4446 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4447 	.field_opr1 = {
4448 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff,
4449 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff,
4450 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff,
4451 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff,
4452 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff,
4453 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff,
4454 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff,
4455 	(uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff},
4456 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4457 	.field_opr2 = {
4458 	(BNXT_ULP_ENC_FIELD_I_VLAN_TCI >> 8) & 0xff,
4459 	BNXT_ULP_ENC_FIELD_I_VLAN_TCI & 0xff},
4460 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4461 	},
4462 	{
4463 	.description = "enc_i_vlan_type",
4464 	.field_bit_size = 16,
4465 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4466 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4467 	.field_opr1 = {
4468 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff,
4469 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff,
4470 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff,
4471 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff,
4472 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff,
4473 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff,
4474 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff,
4475 	(uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff},
4476 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4477 	.field_opr2 = {
4478 	(BNXT_ULP_ENC_FIELD_I_VLAN_TYPE >> 8) & 0xff,
4479 	BNXT_ULP_ENC_FIELD_I_VLAN_TYPE & 0xff},
4480 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4481 	},
4482 	{
4483 	.description = "enc_ipv4_ihl",
4484 	.field_bit_size = 8,
4485 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4486 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4487 	.field_opr1 = {
4488 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
4489 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
4490 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
4491 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
4492 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
4493 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
4494 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
4495 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
4496 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4497 	.field_opr2 = {
4498 	(BNXT_ULP_ENC_FIELD_IPV4_IHL >> 8) & 0xff,
4499 	BNXT_ULP_ENC_FIELD_IPV4_IHL & 0xff},
4500 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4501 	},
4502 	{
4503 	.description = "enc_ipv4_tos",
4504 	.field_bit_size = 8,
4505 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4506 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4507 	.field_opr1 = {
4508 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
4509 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
4510 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
4511 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
4512 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
4513 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
4514 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
4515 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
4516 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4517 	.field_opr2 = {
4518 	(BNXT_ULP_ENC_FIELD_IPV4_TOS >> 8) & 0xff,
4519 	BNXT_ULP_ENC_FIELD_IPV4_TOS & 0xff},
4520 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4521 	},
4522 	{
4523 	.description = "enc_ipv4_pkt_id",
4524 	.field_bit_size = 16,
4525 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4526 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4527 	.field_opr1 = {
4528 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
4529 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
4530 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
4531 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
4532 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
4533 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
4534 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
4535 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
4536 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4537 	.field_opr2 = {
4538 	(BNXT_ULP_ENC_FIELD_IPV4_PKT_ID >> 8) & 0xff,
4539 	BNXT_ULP_ENC_FIELD_IPV4_PKT_ID & 0xff},
4540 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4541 	},
4542 	{
4543 	.description = "enc_ipv4_frag",
4544 	.field_bit_size = 16,
4545 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4546 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4547 	.field_opr1 = {
4548 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
4549 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
4550 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
4551 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
4552 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
4553 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
4554 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
4555 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
4556 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4557 	.field_opr2 = {
4558 	(BNXT_ULP_ENC_FIELD_IPV4_FRAG >> 8) & 0xff,
4559 	BNXT_ULP_ENC_FIELD_IPV4_FRAG & 0xff},
4560 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4561 	},
4562 	{
4563 	.description = "enc_ipv4_ttl",
4564 	.field_bit_size = 8,
4565 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4566 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4567 	.field_opr1 = {
4568 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
4569 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
4570 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
4571 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
4572 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
4573 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
4574 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
4575 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
4576 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4577 	.field_opr2 = {
4578 	(BNXT_ULP_ENC_FIELD_IPV4_TTL >> 8) & 0xff,
4579 	BNXT_ULP_ENC_FIELD_IPV4_TTL & 0xff},
4580 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4581 	},
4582 	{
4583 	.description = "enc_ipv4_proto",
4584 	.field_bit_size = 8,
4585 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4586 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4587 	.field_opr1 = {
4588 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
4589 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
4590 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
4591 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
4592 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
4593 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
4594 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
4595 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
4596 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4597 	.field_opr2 = {
4598 	(BNXT_ULP_ENC_FIELD_IPV4_PROTO >> 8) & 0xff,
4599 	BNXT_ULP_ENC_FIELD_IPV4_PROTO & 0xff},
4600 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4601 	},
4602 	{
4603 	.description = "enc_ipv4_daddr",
4604 	.field_bit_size = 32,
4605 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4606 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4607 	.field_opr1 = {
4608 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
4609 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
4610 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
4611 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
4612 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
4613 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
4614 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
4615 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
4616 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4617 	.field_opr2 = {
4618 	(BNXT_ULP_ENC_FIELD_IPV4_DADDR >> 8) & 0xff,
4619 	BNXT_ULP_ENC_FIELD_IPV4_DADDR & 0xff},
4620 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4621 	},
4622 	{
4623 	.description = "enc_ipv6_vtc",
4624 	.field_bit_size = 32,
4625 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4626 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4627 	.field_opr1 = {
4628 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
4629 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
4630 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
4631 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
4632 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
4633 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
4634 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
4635 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
4636 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4637 	.field_opr2 = {
4638 	(BNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW >> 8) & 0xff,
4639 	BNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW & 0xff},
4640 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4641 	},
4642 	{
4643 	.description = "enc_ipv6_zero",
4644 	.field_bit_size = 16,
4645 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4646 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4647 	.field_opr1 = {
4648 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
4649 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
4650 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
4651 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
4652 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
4653 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
4654 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
4655 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
4656 	.field_src2 = BNXT_ULP_FIELD_SRC_ZERO,
4657 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4658 	},
4659 	{
4660 	.description = "enc_ipv6_proto",
4661 	.field_bit_size = 8,
4662 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4663 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4664 	.field_opr1 = {
4665 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
4666 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
4667 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
4668 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
4669 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
4670 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
4671 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
4672 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
4673 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4674 	.field_opr2 = {
4675 	(BNXT_ULP_ENC_FIELD_IPV6_PROTO >> 8) & 0xff,
4676 	BNXT_ULP_ENC_FIELD_IPV6_PROTO & 0xff},
4677 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4678 	},
4679 	{
4680 	.description = "enc_ipv6_ttl",
4681 	.field_bit_size = 8,
4682 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4683 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4684 	.field_opr1 = {
4685 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
4686 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
4687 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
4688 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
4689 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
4690 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
4691 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
4692 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
4693 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4694 	.field_opr2 = {
4695 	(BNXT_ULP_ENC_FIELD_IPV6_TTL >> 8) & 0xff,
4696 	BNXT_ULP_ENC_FIELD_IPV6_TTL & 0xff},
4697 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4698 	},
4699 	{
4700 	.description = "enc_ipv6_daddr",
4701 	.field_bit_size = 128,
4702 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4703 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4704 	.field_opr1 = {
4705 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
4706 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
4707 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
4708 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
4709 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
4710 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
4711 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
4712 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
4713 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4714 	.field_opr2 = {
4715 	(BNXT_ULP_ENC_FIELD_IPV6_DADDR >> 8) & 0xff,
4716 	BNXT_ULP_ENC_FIELD_IPV6_DADDR & 0xff},
4717 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4718 	},
4719 	{
4720 	.description = "enc_udp_sport",
4721 	.field_bit_size = 16,
4722 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4723 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4724 	.field_opr1 = {
4725 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 56) & 0xff,
4726 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 48) & 0xff,
4727 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 40) & 0xff,
4728 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 32) & 0xff,
4729 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 24) & 0xff,
4730 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 16) & 0xff,
4731 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 8) & 0xff,
4732 	(uint64_t)BNXT_ULP_HDR_BIT_O_UDP & 0xff},
4733 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4734 	.field_opr2 = {
4735 	(BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff,
4736 	BNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff},
4737 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4738 	},
4739 	{
4740 	.description = "enc_udp_dport",
4741 	.field_bit_size = 16,
4742 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4743 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4744 	.field_opr1 = {
4745 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 56) & 0xff,
4746 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 48) & 0xff,
4747 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 40) & 0xff,
4748 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 32) & 0xff,
4749 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 24) & 0xff,
4750 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 16) & 0xff,
4751 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 8) & 0xff,
4752 	(uint64_t)BNXT_ULP_HDR_BIT_O_UDP & 0xff},
4753 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4754 	.field_opr2 = {
4755 	(BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff,
4756 	BNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff},
4757 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4758 	},
4759 	{
4760 	.description = "enc_vxlan_flags",
4761 	.field_bit_size = 8,
4762 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4763 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4764 	.field_opr1 = {
4765 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
4766 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
4767 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
4768 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
4769 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
4770 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
4771 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
4772 	(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
4773 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4774 	.field_opr2 = {
4775 	(BNXT_ULP_ENC_FIELD_VXLAN_FLAGS >> 8) & 0xff,
4776 	BNXT_ULP_ENC_FIELD_VXLAN_FLAGS & 0xff},
4777 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4778 	},
4779 	{
4780 	.description = "enc_vxlan_rsvd0",
4781 	.field_bit_size = 24,
4782 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4783 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4784 	.field_opr1 = {
4785 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
4786 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
4787 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
4788 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
4789 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
4790 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
4791 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
4792 	(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
4793 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4794 	.field_opr2 = {
4795 	(BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 >> 8) & 0xff,
4796 	BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 & 0xff},
4797 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4798 	},
4799 	{
4800 	.description = "enc_vxlan_vni",
4801 	.field_bit_size = 24,
4802 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4803 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4804 	.field_opr1 = {
4805 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
4806 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
4807 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
4808 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
4809 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
4810 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
4811 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
4812 	(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
4813 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4814 	.field_opr2 = {
4815 	(BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff,
4816 	BNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff},
4817 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4818 	},
4819 	{
4820 	.description = "enc_vxlan_rsvd1",
4821 	.field_bit_size = 8,
4822 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
4823 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
4824 	.field_opr1 = {
4825 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
4826 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
4827 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
4828 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
4829 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
4830 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
4831 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
4832 	(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
4833 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
4834 	.field_opr2 = {
4835 	(BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 >> 8) & 0xff,
4836 	BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 & 0xff},
4837 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
4838 	},
4839 	/* act_tid: 6, , table: int_full_act_record.0 */
4840 	{
4841 	.description = "flow_cntr_ptr",
4842 	.field_bit_size = 14,
4843 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4844 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
4845 	.field_opr1 = {
4846 	(BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
4847 	BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff}
4848 	},
4849 	{
4850 	.description = "age_enable",
4851 	.field_bit_size = 1,
4852 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4853 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4854 	},
4855 	{
4856 	.description = "agg_cntr_en",
4857 	.field_bit_size = 1,
4858 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4859 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4860 	},
4861 	{
4862 	.description = "rate_cntr_en",
4863 	.field_bit_size = 1,
4864 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4865 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4866 	},
4867 	{
4868 	.description = "flow_cntr_en",
4869 	.field_bit_size = 1,
4870 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4871 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
4872 	.field_opr1 = {
4873 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff,
4874 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff,
4875 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff,
4876 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff,
4877 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff,
4878 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff,
4879 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff,
4880 	(uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff}
4881 	},
4882 	{
4883 	.description = "tcpflags_key",
4884 	.field_bit_size = 8,
4885 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4886 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4887 	},
4888 	{
4889 	.description = "tcpflags_mir",
4890 	.field_bit_size = 1,
4891 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4892 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4893 	},
4894 	{
4895 	.description = "tcpflags_match",
4896 	.field_bit_size = 1,
4897 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4898 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4899 	},
4900 	{
4901 	.description = "encap_ptr",
4902 	.field_bit_size = 11,
4903 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4904 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
4905 	.field_opr1 = {
4906 	(BNXT_ULP_RF_IDX_ENCAP_PTR_0 >> 8) & 0xff,
4907 	BNXT_ULP_RF_IDX_ENCAP_PTR_0 & 0xff}
4908 	},
4909 	{
4910 	.description = "dst_ip_ptr",
4911 	.field_bit_size = 10,
4912 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4913 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4914 	},
4915 	{
4916 	.description = "tcp_dst_port",
4917 	.field_bit_size = 16,
4918 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4919 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4920 	},
4921 	{
4922 	.description = "src_ip_ptr",
4923 	.field_bit_size = 10,
4924 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4925 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4926 	},
4927 	{
4928 	.description = "tcp_src_port",
4929 	.field_bit_size = 16,
4930 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4931 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4932 	},
4933 	{
4934 	.description = "meter_id",
4935 	.field_bit_size = 10,
4936 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4937 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4938 	},
4939 	{
4940 	.description = "l3_rdir",
4941 	.field_bit_size = 1,
4942 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4943 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4944 	},
4945 	{
4946 	.description = "tl3_rdir",
4947 	.field_bit_size = 1,
4948 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4949 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4950 	},
4951 	{
4952 	.description = "l3_ttl_dec",
4953 	.field_bit_size = 1,
4954 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4955 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4956 	},
4957 	{
4958 	.description = "tl3_ttl_dec",
4959 	.field_bit_size = 1,
4960 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4961 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4962 	},
4963 	{
4964 	.description = "decap_func",
4965 	.field_bit_size = 4,
4966 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4967 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4968 	},
4969 	{
4970 	.description = "vnic_or_vport",
4971 	.field_bit_size = 12,
4972 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4973 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
4974 	.field_opr1 = {
4975 	(BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff,
4976 	BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff}
4977 	},
4978 	{
4979 	.description = "pop_vlan",
4980 	.field_bit_size = 1,
4981 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4982 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4983 	},
4984 	{
4985 	.description = "meter",
4986 	.field_bit_size = 1,
4987 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4988 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4989 	},
4990 	{
4991 	.description = "mirror",
4992 	.field_bit_size = 2,
4993 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
4994 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
4995 	},
4996 	{
4997 	.description = "drop",
4998 	.field_bit_size = 1,
4999 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5000 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5001 	},
5002 	{
5003 	.description = "hit",
5004 	.field_bit_size = 1,
5005 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5006 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5007 	},
5008 	{
5009 	.description = "type",
5010 	.field_bit_size = 1,
5011 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5012 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5013 	},
5014 	/* act_tid: 6, , table: ext_full_act_record_vxlan.0 */
5015 	{
5016 	.description = "flow_cntr_ptr",
5017 	.field_bit_size = 14,
5018 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5019 	.field_src1 = BNXT_ULP_FIELD_SRC_RF,
5020 	.field_opr1 = {
5021 	(BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
5022 	BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff}
5023 	},
5024 	{
5025 	.description = "age_enable",
5026 	.field_bit_size = 1,
5027 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5028 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5029 	},
5030 	{
5031 	.description = "agg_cntr_en",
5032 	.field_bit_size = 1,
5033 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5034 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5035 	},
5036 	{
5037 	.description = "rate_cntr_en",
5038 	.field_bit_size = 1,
5039 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5040 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5041 	},
5042 	{
5043 	.description = "flow_cntr_en",
5044 	.field_bit_size = 1,
5045 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5046 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
5047 	.field_opr1 = {
5048 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff,
5049 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff,
5050 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff,
5051 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff,
5052 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff,
5053 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff,
5054 	((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff,
5055 	(uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff}
5056 	},
5057 	{
5058 	.description = "flow_cntr_ext",
5059 	.field_bit_size = 1,
5060 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5061 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5062 	},
5063 	{
5064 	.description = "tcpflags_key",
5065 	.field_bit_size = 8,
5066 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5067 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5068 	},
5069 	{
5070 	.description = "tcpflags_mir",
5071 	.field_bit_size = 1,
5072 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5073 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5074 	},
5075 	{
5076 	.description = "tcpflags_match",
5077 	.field_bit_size = 1,
5078 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5079 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5080 	},
5081 	{
5082 	.description = "encap_ptr",
5083 	.field_bit_size = 11,
5084 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5085 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5086 	},
5087 	{
5088 	.description = "encap_rec_int",
5089 	.field_bit_size = 1,
5090 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5091 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5092 	},
5093 	{
5094 	.description = "dst_ip_ptr",
5095 	.field_bit_size = 10,
5096 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5097 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5098 	},
5099 	{
5100 	.description = "tcp_dst_port",
5101 	.field_bit_size = 16,
5102 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5103 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5104 	},
5105 	{
5106 	.description = "src_ip_ptr",
5107 	.field_bit_size = 10,
5108 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5109 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5110 	},
5111 	{
5112 	.description = "tcp_src_port",
5113 	.field_bit_size = 16,
5114 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5115 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5116 	},
5117 	{
5118 	.description = "meter_id",
5119 	.field_bit_size = 10,
5120 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5121 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5122 	},
5123 	{
5124 	.description = "l3_rdir",
5125 	.field_bit_size = 1,
5126 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5127 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5128 	},
5129 	{
5130 	.description = "tl3_rdir",
5131 	.field_bit_size = 1,
5132 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5133 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5134 	},
5135 	{
5136 	.description = "l3_ttl_dec",
5137 	.field_bit_size = 1,
5138 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5139 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5140 	},
5141 	{
5142 	.description = "tl3_ttl_dec",
5143 	.field_bit_size = 1,
5144 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5145 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5146 	},
5147 	{
5148 	.description = "decap_func",
5149 	.field_bit_size = 4,
5150 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5151 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5152 	},
5153 	{
5154 	.description = "vnic_or_vport",
5155 	.field_bit_size = 12,
5156 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5157 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
5158 	.field_opr1 = {
5159 	(BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff,
5160 	BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff}
5161 	},
5162 	{
5163 	.description = "pop_vlan",
5164 	.field_bit_size = 1,
5165 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5166 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5167 	},
5168 	{
5169 	.description = "meter",
5170 	.field_bit_size = 1,
5171 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5172 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5173 	},
5174 	{
5175 	.description = "mirror",
5176 	.field_bit_size = 2,
5177 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5178 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5179 	},
5180 	{
5181 	.description = "drop",
5182 	.field_bit_size = 1,
5183 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5184 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5185 	},
5186 	{
5187 	.description = "ecv_valid",
5188 	.field_bit_size = 1,
5189 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5190 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
5191 	.field_opr1 = {
5192 	ULP_WP_SYM_ECV_VALID_YES}
5193 	},
5194 	{
5195 	.description = "ecv_custom_en",
5196 	.field_bit_size = 1,
5197 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5198 	.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
5199 	},
5200 	{
5201 	.description = "ecv_vtag_type",
5202 	.field_bit_size = 4,
5203 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5204 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
5205 	.field_opr1 = {
5206 	(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff,
5207 	BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff}
5208 	},
5209 	{
5210 	.description = "ecv_l2_en",
5211 	.field_bit_size = 1,
5212 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5213 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
5214 	.field_opr1 = {
5215 	ULP_WP_SYM_ECV_L2_EN_YES}
5216 	},
5217 	{
5218 	.description = "ecv_l3_type",
5219 	.field_bit_size = 3,
5220 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5221 	.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
5222 	.field_opr1 = {
5223 	(BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff,
5224 	BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff}
5225 	},
5226 	{
5227 	.description = "ecv_l4_type",
5228 	.field_bit_size = 3,
5229 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5230 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
5231 	.field_opr1 = {
5232 	ULP_WP_SYM_ECV_L4_TYPE_UDP_CSUM}
5233 	},
5234 	{
5235 	.description = "ecv_tun_type",
5236 	.field_bit_size = 3,
5237 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5238 	.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
5239 	.field_opr1 = {
5240 	ULP_WP_SYM_ECV_TUN_TYPE_VXLAN}
5241 	},
5242 	{
5243 	.description = "enc_eth_dmac",
5244 	.field_bit_size = 48,
5245 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
5246 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5247 	.field_opr1 = {
5248 	(BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff,
5249 	BNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff}
5250 	},
5251 	{
5252 	.description = "enc_o_vlan_tag",
5253 	.field_bit_size = 16,
5254 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5255 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5256 	.field_opr1 = {
5257 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff,
5258 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff,
5259 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff,
5260 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff,
5261 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff,
5262 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff,
5263 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff,
5264 	(uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff},
5265 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5266 	.field_opr2 = {
5267 	(BNXT_ULP_ENC_FIELD_O_VLAN_TCI >> 8) & 0xff,
5268 	BNXT_ULP_ENC_FIELD_O_VLAN_TCI & 0xff},
5269 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5270 	},
5271 	{
5272 	.description = "enc_o_vlan_type",
5273 	.field_bit_size = 16,
5274 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5275 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5276 	.field_opr1 = {
5277 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff,
5278 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff,
5279 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff,
5280 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff,
5281 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff,
5282 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff,
5283 	((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff,
5284 	(uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff},
5285 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5286 	.field_opr2 = {
5287 	(BNXT_ULP_ENC_FIELD_O_VLAN_TYPE >> 8) & 0xff,
5288 	BNXT_ULP_ENC_FIELD_O_VLAN_TYPE & 0xff},
5289 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5290 	},
5291 	{
5292 	.description = "enc_i_vlan_tag",
5293 	.field_bit_size = 16,
5294 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5295 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5296 	.field_opr1 = {
5297 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff,
5298 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff,
5299 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff,
5300 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff,
5301 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff,
5302 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff,
5303 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff,
5304 	(uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff},
5305 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5306 	.field_opr2 = {
5307 	(BNXT_ULP_ENC_FIELD_I_VLAN_TCI >> 8) & 0xff,
5308 	BNXT_ULP_ENC_FIELD_I_VLAN_TCI & 0xff},
5309 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5310 	},
5311 	{
5312 	.description = "enc_i_vlan_type",
5313 	.field_bit_size = 16,
5314 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5315 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5316 	.field_opr1 = {
5317 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff,
5318 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff,
5319 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff,
5320 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff,
5321 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff,
5322 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff,
5323 	((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff,
5324 	(uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff},
5325 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5326 	.field_opr2 = {
5327 	(BNXT_ULP_ENC_FIELD_I_VLAN_TYPE >> 8) & 0xff,
5328 	BNXT_ULP_ENC_FIELD_I_VLAN_TYPE & 0xff},
5329 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5330 	},
5331 	{
5332 	.description = "enc_ipv4_ihl",
5333 	.field_bit_size = 8,
5334 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5335 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5336 	.field_opr1 = {
5337 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
5338 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
5339 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
5340 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
5341 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
5342 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
5343 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
5344 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
5345 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5346 	.field_opr2 = {
5347 	(BNXT_ULP_ENC_FIELD_IPV4_IHL >> 8) & 0xff,
5348 	BNXT_ULP_ENC_FIELD_IPV4_IHL & 0xff},
5349 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5350 	},
5351 	{
5352 	.description = "enc_ipv4_tos",
5353 	.field_bit_size = 8,
5354 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5355 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5356 	.field_opr1 = {
5357 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
5358 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
5359 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
5360 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
5361 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
5362 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
5363 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
5364 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
5365 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5366 	.field_opr2 = {
5367 	(BNXT_ULP_ENC_FIELD_IPV4_TOS >> 8) & 0xff,
5368 	BNXT_ULP_ENC_FIELD_IPV4_TOS & 0xff},
5369 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5370 	},
5371 	{
5372 	.description = "enc_ipv4_pkt_id",
5373 	.field_bit_size = 16,
5374 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5375 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5376 	.field_opr1 = {
5377 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
5378 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
5379 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
5380 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
5381 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
5382 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
5383 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
5384 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
5385 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5386 	.field_opr2 = {
5387 	(BNXT_ULP_ENC_FIELD_IPV4_PKT_ID >> 8) & 0xff,
5388 	BNXT_ULP_ENC_FIELD_IPV4_PKT_ID & 0xff},
5389 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5390 	},
5391 	{
5392 	.description = "enc_ipv4_frag",
5393 	.field_bit_size = 16,
5394 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5395 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5396 	.field_opr1 = {
5397 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
5398 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
5399 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
5400 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
5401 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
5402 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
5403 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
5404 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
5405 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5406 	.field_opr2 = {
5407 	(BNXT_ULP_ENC_FIELD_IPV4_FRAG >> 8) & 0xff,
5408 	BNXT_ULP_ENC_FIELD_IPV4_FRAG & 0xff},
5409 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5410 	},
5411 	{
5412 	.description = "enc_ipv4_ttl",
5413 	.field_bit_size = 8,
5414 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5415 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5416 	.field_opr1 = {
5417 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
5418 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
5419 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
5420 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
5421 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
5422 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
5423 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
5424 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
5425 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5426 	.field_opr2 = {
5427 	(BNXT_ULP_ENC_FIELD_IPV4_TTL >> 8) & 0xff,
5428 	BNXT_ULP_ENC_FIELD_IPV4_TTL & 0xff},
5429 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5430 	},
5431 	{
5432 	.description = "enc_ipv4_proto",
5433 	.field_bit_size = 8,
5434 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5435 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5436 	.field_opr1 = {
5437 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
5438 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
5439 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
5440 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
5441 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
5442 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
5443 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
5444 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
5445 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5446 	.field_opr2 = {
5447 	(BNXT_ULP_ENC_FIELD_IPV4_PROTO >> 8) & 0xff,
5448 	BNXT_ULP_ENC_FIELD_IPV4_PROTO & 0xff},
5449 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5450 	},
5451 	{
5452 	.description = "enc_ipv4_daddr",
5453 	.field_bit_size = 32,
5454 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5455 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5456 	.field_opr1 = {
5457 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
5458 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
5459 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
5460 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
5461 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
5462 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
5463 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
5464 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
5465 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5466 	.field_opr2 = {
5467 	(BNXT_ULP_ENC_FIELD_IPV4_DADDR >> 8) & 0xff,
5468 	BNXT_ULP_ENC_FIELD_IPV4_DADDR & 0xff},
5469 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5470 	},
5471 	{
5472 	.description = "enc_ipv6_vtc",
5473 	.field_bit_size = 32,
5474 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5475 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5476 	.field_opr1 = {
5477 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
5478 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
5479 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
5480 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
5481 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
5482 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
5483 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
5484 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
5485 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5486 	.field_opr2 = {
5487 	(BNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW >> 8) & 0xff,
5488 	BNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW & 0xff},
5489 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5490 	},
5491 	{
5492 	.description = "enc_ipv6_zero",
5493 	.field_bit_size = 16,
5494 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5495 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5496 	.field_opr1 = {
5497 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
5498 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
5499 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
5500 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
5501 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
5502 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
5503 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
5504 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
5505 	.field_src2 = BNXT_ULP_FIELD_SRC_ZERO,
5506 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5507 	},
5508 	{
5509 	.description = "enc_ipv6_proto",
5510 	.field_bit_size = 8,
5511 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5512 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5513 	.field_opr1 = {
5514 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
5515 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
5516 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
5517 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
5518 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
5519 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
5520 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
5521 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
5522 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5523 	.field_opr2 = {
5524 	(BNXT_ULP_ENC_FIELD_IPV6_PROTO >> 8) & 0xff,
5525 	BNXT_ULP_ENC_FIELD_IPV6_PROTO & 0xff},
5526 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5527 	},
5528 	{
5529 	.description = "enc_ipv6_ttl",
5530 	.field_bit_size = 8,
5531 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5532 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5533 	.field_opr1 = {
5534 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
5535 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
5536 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
5537 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
5538 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
5539 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
5540 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
5541 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
5542 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5543 	.field_opr2 = {
5544 	(BNXT_ULP_ENC_FIELD_IPV6_TTL >> 8) & 0xff,
5545 	BNXT_ULP_ENC_FIELD_IPV6_TTL & 0xff},
5546 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5547 	},
5548 	{
5549 	.description = "enc_ipv6_daddr",
5550 	.field_bit_size = 128,
5551 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5552 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5553 	.field_opr1 = {
5554 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
5555 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
5556 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
5557 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
5558 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
5559 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
5560 	((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
5561 	(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
5562 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5563 	.field_opr2 = {
5564 	(BNXT_ULP_ENC_FIELD_IPV6_DADDR >> 8) & 0xff,
5565 	BNXT_ULP_ENC_FIELD_IPV6_DADDR & 0xff},
5566 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5567 	},
5568 	{
5569 	.description = "enc_udp_sport",
5570 	.field_bit_size = 16,
5571 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5572 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5573 	.field_opr1 = {
5574 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 56) & 0xff,
5575 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 48) & 0xff,
5576 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 40) & 0xff,
5577 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 32) & 0xff,
5578 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 24) & 0xff,
5579 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 16) & 0xff,
5580 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 8) & 0xff,
5581 	(uint64_t)BNXT_ULP_HDR_BIT_O_UDP & 0xff},
5582 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5583 	.field_opr2 = {
5584 	(BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff,
5585 	BNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff},
5586 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5587 	},
5588 	{
5589 	.description = "enc_udp_dport",
5590 	.field_bit_size = 16,
5591 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5592 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5593 	.field_opr1 = {
5594 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 56) & 0xff,
5595 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 48) & 0xff,
5596 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 40) & 0xff,
5597 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 32) & 0xff,
5598 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 24) & 0xff,
5599 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 16) & 0xff,
5600 	((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 8) & 0xff,
5601 	(uint64_t)BNXT_ULP_HDR_BIT_O_UDP & 0xff},
5602 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5603 	.field_opr2 = {
5604 	(BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff,
5605 	BNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff},
5606 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5607 	},
5608 	{
5609 	.description = "enc_vxlan_flags",
5610 	.field_bit_size = 8,
5611 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5612 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5613 	.field_opr1 = {
5614 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
5615 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
5616 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
5617 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
5618 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
5619 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
5620 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
5621 	(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
5622 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5623 	.field_opr2 = {
5624 	(BNXT_ULP_ENC_FIELD_VXLAN_FLAGS >> 8) & 0xff,
5625 	BNXT_ULP_ENC_FIELD_VXLAN_FLAGS & 0xff},
5626 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5627 	},
5628 	{
5629 	.description = "enc_vxlan_rsvd0",
5630 	.field_bit_size = 24,
5631 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5632 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5633 	.field_opr1 = {
5634 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
5635 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
5636 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
5637 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
5638 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
5639 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
5640 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
5641 	(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
5642 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5643 	.field_opr2 = {
5644 	(BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 >> 8) & 0xff,
5645 	BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 & 0xff},
5646 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5647 	},
5648 	{
5649 	.description = "enc_vxlan_vni",
5650 	.field_bit_size = 24,
5651 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5652 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5653 	.field_opr1 = {
5654 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
5655 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
5656 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
5657 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
5658 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
5659 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
5660 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
5661 	(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
5662 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5663 	.field_opr2 = {
5664 	(BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff,
5665 	BNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff},
5666 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5667 	},
5668 	{
5669 	.description = "enc_vxlan_rsvd1",
5670 	.field_bit_size = 8,
5671 	.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
5672 	.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
5673 	.field_opr1 = {
5674 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
5675 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
5676 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
5677 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
5678 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
5679 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
5680 	((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
5681 	(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
5682 	.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
5683 	.field_opr2 = {
5684 	(BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 >> 8) & 0xff,
5685 	BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 & 0xff},
5686 	.field_src3 = BNXT_ULP_FIELD_SRC_SKIP
5687 	}
5688 };
5689 
5690 struct bnxt_ulp_mapper_ident_info ulp_wh_plus_act_ident_list[] = {
5691 	/* act_tid: 1, , table: shared_mirror_record.rd */
5692 	{
5693 	.description = "mirror_id",
5694 	.regfile_idx = BNXT_ULP_RF_IDX_MIRROR_ID_0,
5695 	.ident_bit_size = 2,
5696 	.ident_bit_pos = 32
5697 	}
5698 };
5699