1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2014-2021 Broadcom 3 * All rights reserved. 4 */ 5 6 /* date: Fri Oct 8 11:41:10 2021 */ 7 8 #include "ulp_template_db_enum.h" 9 #include "ulp_template_db_field.h" 10 #include "ulp_template_struct.h" 11 #include "ulp_template_db_tbl.h" 12 13 /* Mapper templates for header act list */ 14 struct bnxt_ulp_mapper_tmpl_info ulp_thor_act_tmpl_list[] = { 15 /* act_tid: 1, ingress */ 16 [1] = { 17 .device_name = BNXT_ULP_DEVICE_ID_THOR, 18 .num_tbls = 5, 19 .start_tbl_idx = 0, 20 .reject_info = { 21 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, 22 .cond_start_idx = 0, 23 .cond_nums = 0 } 24 }, 25 /* act_tid: 2, ingress */ 26 [2] = { 27 .device_name = BNXT_ULP_DEVICE_ID_THOR, 28 .num_tbls = 6, 29 .start_tbl_idx = 5, 30 .reject_info = { 31 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, 32 .cond_start_idx = 3, 33 .cond_nums = 0 } 34 }, 35 /* act_tid: 3, ingress */ 36 [3] = { 37 .device_name = BNXT_ULP_DEVICE_ID_THOR, 38 .num_tbls = 4, 39 .start_tbl_idx = 11, 40 .reject_info = { 41 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, 42 .cond_start_idx = 4, 43 .cond_nums = 0 } 44 }, 45 /* act_tid: 4, egress */ 46 [4] = { 47 .device_name = BNXT_ULP_DEVICE_ID_THOR, 48 .num_tbls = 5, 49 .start_tbl_idx = 15, 50 .reject_info = { 51 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, 52 .cond_start_idx = 7, 53 .cond_nums = 0 } 54 }, 55 /* act_tid: 5, egress */ 56 [5] = { 57 .device_name = BNXT_ULP_DEVICE_ID_THOR, 58 .num_tbls = 4, 59 .start_tbl_idx = 20, 60 .reject_info = { 61 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, 62 .cond_start_idx = 12, 63 .cond_nums = 0 } 64 }, 65 /* act_tid: 6, egress */ 66 [6] = { 67 .device_name = BNXT_ULP_DEVICE_ID_THOR, 68 .num_tbls = 12, 69 .start_tbl_idx = 24, 70 .reject_info = { 71 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, 72 .cond_start_idx = 15, 73 .cond_nums = 0 } 74 } 75 }; 76 77 struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = { 78 { /* act_tid: 1, , table: shared_mirror_record.rd */ 79 .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, 80 .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, 81 .resource_sub_type = 82 BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_MIRROR, 83 .direction = TF_DIR_RX, 84 .execute_info = { 85 .cond_true_goto = 1, 86 .cond_false_goto = 1, 87 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 88 .cond_start_idx = 0, 89 .cond_nums = 1 }, 90 .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, 91 .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, 92 .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, 93 .key_start_idx = 0, 94 .blob_key_bit_size = 1, 95 .key_bit_size = 1, 96 .key_num_fields = 1, 97 .ident_start_idx = 0, 98 .ident_nums = 1 99 }, 100 { /* act_tid: 1, , table: int_flow_counter_tbl.0 */ 101 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 102 .resource_type = TF_TBL_TYPE_ACT_STATS_64, 103 .resource_sub_type = 104 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, 105 .direction = TF_DIR_RX, 106 .execute_info = { 107 .cond_true_goto = 1, 108 .cond_false_goto = 1, 109 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 110 .cond_start_idx = 1, 111 .cond_nums = 1 }, 112 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, 113 .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, 114 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 115 .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, 116 .result_start_idx = 0, 117 .result_bit_size = 64, 118 .result_num_fields = 1 119 }, 120 { /* act_tid: 1, , table: mod_record.ing_ttl */ 121 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 122 .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, 123 .resource_sub_type = 124 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 125 .direction = TF_DIR_RX, 126 .execute_info = { 127 .cond_true_goto = 1, 128 .cond_false_goto = 2, 129 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 130 .cond_start_idx = 2, 131 .cond_nums = 1 }, 132 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, 133 .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, 134 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 135 .result_start_idx = 1, 136 .result_bit_size = 0, 137 .result_num_fields = 0, 138 .encap_num_fields = 47 139 }, 140 { /* act_tid: 1, , table: int_full_act_record.0 */ 141 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 142 .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, 143 .resource_sub_type = 144 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 145 .direction = TF_DIR_RX, 146 .execute_info = { 147 .cond_true_goto = 0, 148 .cond_false_goto = 1, 149 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, 150 .cond_start_idx = 3, 151 .cond_nums = 0 }, 152 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, 153 .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, 154 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 155 .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, 156 .result_start_idx = 48, 157 .result_bit_size = 128, 158 .result_num_fields = 17 159 }, 160 { /* act_tid: 1, , table: int_compact_act_record.0 */ 161 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 162 .resource_type = TF_TBL_TYPE_COMPACT_ACT_RECORD, 163 .resource_sub_type = 164 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 165 .direction = TF_DIR_RX, 166 .execute_info = { 167 .cond_true_goto = 0, 168 .cond_false_goto = 0, 169 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, 170 .cond_start_idx = 3, 171 .cond_nums = 0 }, 172 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, 173 .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, 174 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 175 .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, 176 .result_start_idx = 65, 177 .result_bit_size = 64, 178 .result_num_fields = 13 179 }, 180 { /* act_tid: 2, , table: control.0 */ 181 .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, 182 .direction = TF_DIR_RX, 183 .execute_info = { 184 .cond_true_goto = 1, 185 .cond_false_goto = 1, 186 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, 187 .cond_start_idx = 3, 188 .cond_nums = 0 }, 189 .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, 190 .fdb_operand = BNXT_ULP_RF_IDX_RID 191 }, 192 { /* act_tid: 2, , table: mirror_tbl.alloc */ 193 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 194 .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, 195 .resource_sub_type = 196 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 197 .direction = TF_DIR_RX, 198 .execute_info = { 199 .cond_true_goto = 1, 200 .cond_false_goto = 1, 201 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, 202 .cond_start_idx = 3, 203 .cond_nums = 0 }, 204 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, 205 .tbl_operand = BNXT_ULP_RF_IDX_MIRROR_PTR_0, 206 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, 207 .fdb_operand = BNXT_ULP_RF_IDX_RID, 208 .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, 209 .result_start_idx = 78, 210 .result_bit_size = 32, 211 .result_num_fields = 5 212 }, 213 { /* act_tid: 2, , table: int_flow_counter_tbl.0 */ 214 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 215 .resource_type = TF_TBL_TYPE_ACT_STATS_64, 216 .resource_sub_type = 217 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, 218 .direction = TF_DIR_RX, 219 .execute_info = { 220 .cond_true_goto = 1, 221 .cond_false_goto = 1, 222 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 223 .cond_start_idx = 3, 224 .cond_nums = 1 }, 225 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, 226 .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, 227 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, 228 .fdb_operand = BNXT_ULP_RF_IDX_RID, 229 .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, 230 .result_start_idx = 83, 231 .result_bit_size = 64, 232 .result_num_fields = 1 233 }, 234 { /* act_tid: 2, , table: int_compact_act_record.0 */ 235 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 236 .resource_type = TF_TBL_TYPE_COMPACT_ACT_RECORD, 237 .resource_sub_type = 238 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 239 .direction = TF_DIR_RX, 240 .execute_info = { 241 .cond_true_goto = 1, 242 .cond_false_goto = 1, 243 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, 244 .cond_start_idx = 4, 245 .cond_nums = 0 }, 246 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, 247 .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, 248 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, 249 .fdb_operand = BNXT_ULP_RF_IDX_RID, 250 .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, 251 .result_start_idx = 84, 252 .result_bit_size = 64, 253 .result_num_fields = 13, 254 .encap_num_fields = 0 255 }, 256 { /* act_tid: 2, , table: mirror_tbl.wr */ 257 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 258 .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, 259 .resource_sub_type = 260 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 261 .direction = TF_DIR_RX, 262 .execute_info = { 263 .cond_true_goto = 1, 264 .cond_false_goto = 1, 265 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, 266 .cond_start_idx = 4, 267 .cond_nums = 0 }, 268 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_REGFILE, 269 .tbl_operand = BNXT_ULP_RF_IDX_MIRROR_PTR_0, 270 .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, 271 .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, 272 .result_start_idx = 97, 273 .result_bit_size = 32, 274 .result_num_fields = 5 275 }, 276 { /* act_tid: 2, , table: shared_mirror_record.wr */ 277 .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, 278 .resource_type = TF_TBL_TYPE_MIRROR_CONFIG, 279 .resource_sub_type = 280 BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_MIRROR, 281 .direction = TF_DIR_RX, 282 .execute_info = { 283 .cond_true_goto = 0, 284 .cond_false_goto = 0, 285 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, 286 .cond_start_idx = 4, 287 .cond_nums = 0 }, 288 .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, 289 .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX, 290 .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, 291 .key_start_idx = 1, 292 .blob_key_bit_size = 1, 293 .key_bit_size = 1, 294 .key_num_fields = 1, 295 .result_start_idx = 102, 296 .result_bit_size = 36, 297 .result_num_fields = 2 298 }, 299 { /* act_tid: 3, , table: int_flow_counter_tbl.0 */ 300 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 301 .resource_type = TF_TBL_TYPE_ACT_STATS_64, 302 .resource_sub_type = 303 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, 304 .direction = TF_DIR_RX, 305 .execute_info = { 306 .cond_true_goto = 1, 307 .cond_false_goto = 1, 308 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 309 .cond_start_idx = 4, 310 .cond_nums = 1 }, 311 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, 312 .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, 313 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 314 .result_start_idx = 104, 315 .result_bit_size = 64, 316 .result_num_fields = 1 317 }, 318 { /* act_tid: 3, , table: mod_record.ing_ttl */ 319 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 320 .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, 321 .resource_sub_type = 322 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 323 .direction = TF_DIR_RX, 324 .execute_info = { 325 .cond_true_goto = 2, 326 .cond_false_goto = 1, 327 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 328 .cond_start_idx = 5, 329 .cond_nums = 1 }, 330 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, 331 .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, 332 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 333 .result_start_idx = 105, 334 .result_bit_size = 0, 335 .result_num_fields = 0, 336 .encap_num_fields = 47 337 }, 338 { /* act_tid: 3, , table: mod_record.ing_no_ttl */ 339 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 340 .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, 341 .resource_sub_type = 342 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 343 .direction = TF_DIR_RX, 344 .execute_info = { 345 .cond_true_goto = 1, 346 .cond_false_goto = 1, 347 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 348 .cond_start_idx = 6, 349 .cond_nums = 1 }, 350 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, 351 .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, 352 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 353 .result_start_idx = 152, 354 .result_bit_size = 0, 355 .result_num_fields = 0, 356 .encap_num_fields = 47 357 }, 358 { /* act_tid: 3, , table: int_full_act_record.0 */ 359 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 360 .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, 361 .resource_sub_type = 362 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 363 .direction = TF_DIR_RX, 364 .execute_info = { 365 .cond_true_goto = 0, 366 .cond_false_goto = 0, 367 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, 368 .cond_start_idx = 7, 369 .cond_nums = 0 }, 370 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, 371 .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, 372 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 373 .result_start_idx = 199, 374 .result_bit_size = 128, 375 .result_num_fields = 17 376 }, 377 { /* act_tid: 4, , table: int_flow_counter_tbl.0 */ 378 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 379 .resource_type = TF_TBL_TYPE_ACT_STATS_64, 380 .resource_sub_type = 381 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, 382 .direction = TF_DIR_TX, 383 .execute_info = { 384 .cond_true_goto = 1, 385 .cond_false_goto = 1, 386 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 387 .cond_start_idx = 7, 388 .cond_nums = 1 }, 389 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, 390 .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, 391 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 392 .result_start_idx = 216, 393 .result_bit_size = 64, 394 .result_num_fields = 1 395 }, 396 { /* act_tid: 4, , table: int_vtag_encap_record.0 */ 397 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 398 .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, 399 .resource_sub_type = 400 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 401 .direction = TF_DIR_TX, 402 .execute_info = { 403 .cond_true_goto = 1, 404 .cond_false_goto = 1, 405 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 406 .cond_start_idx = 8, 407 .cond_nums = 1 }, 408 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, 409 .tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0, 410 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 411 .result_start_idx = 217, 412 .result_bit_size = 0, 413 .result_num_fields = 0, 414 .encap_num_fields = 11 415 }, 416 { /* act_tid: 4, , table: mod_record.dec_ttl_egr */ 417 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 418 .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, 419 .resource_sub_type = 420 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 421 .direction = TF_DIR_TX, 422 .execute_info = { 423 .cond_true_goto = 1, 424 .cond_false_goto = 1, 425 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 426 .cond_start_idx = 9, 427 .cond_nums = 1 }, 428 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, 429 .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, 430 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 431 .result_start_idx = 228, 432 .result_bit_size = 0, 433 .result_num_fields = 0, 434 .encap_num_fields = 47 435 }, 436 { /* act_tid: 4, , table: int_full_act_record.0 */ 437 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 438 .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, 439 .resource_sub_type = 440 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 441 .direction = TF_DIR_TX, 442 .execute_info = { 443 .cond_true_goto = 0, 444 .cond_false_goto = 1, 445 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, 446 .cond_start_idx = 10, 447 .cond_nums = 2 }, 448 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, 449 .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, 450 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 451 .result_start_idx = 275, 452 .result_bit_size = 128, 453 .result_num_fields = 17 454 }, 455 { /* act_tid: 4, , table: int_compact_act_record.0 */ 456 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 457 .resource_type = TF_TBL_TYPE_COMPACT_ACT_RECORD, 458 .resource_sub_type = 459 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 460 .direction = TF_DIR_TX, 461 .execute_info = { 462 .cond_true_goto = 0, 463 .cond_false_goto = 0, 464 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, 465 .cond_start_idx = 12, 466 .cond_nums = 0 }, 467 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, 468 .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, 469 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 470 .result_start_idx = 292, 471 .result_bit_size = 64, 472 .result_num_fields = 13 473 }, 474 { /* act_tid: 5, , table: int_flow_counter_tbl.0 */ 475 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 476 .resource_type = TF_TBL_TYPE_ACT_STATS_64, 477 .resource_sub_type = 478 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, 479 .direction = TF_DIR_TX, 480 .execute_info = { 481 .cond_true_goto = 1, 482 .cond_false_goto = 1, 483 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 484 .cond_start_idx = 12, 485 .cond_nums = 1 }, 486 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, 487 .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, 488 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 489 .result_start_idx = 305, 490 .result_bit_size = 64, 491 .result_num_fields = 1 492 }, 493 { /* act_tid: 5, , table: mod_record.ing_ttl */ 494 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 495 .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, 496 .resource_sub_type = 497 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 498 .direction = TF_DIR_TX, 499 .execute_info = { 500 .cond_true_goto = 2, 501 .cond_false_goto = 1, 502 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 503 .cond_start_idx = 13, 504 .cond_nums = 1 }, 505 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, 506 .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, 507 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 508 .result_start_idx = 306, 509 .result_bit_size = 0, 510 .result_num_fields = 0, 511 .encap_num_fields = 47 512 }, 513 { /* act_tid: 5, , table: mod_record.ing_no_ttl */ 514 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 515 .resource_type = TF_TBL_TYPE_ACT_MODIFY_64B, 516 .resource_sub_type = 517 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 518 .direction = TF_DIR_TX, 519 .execute_info = { 520 .cond_true_goto = 1, 521 .cond_false_goto = 1, 522 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 523 .cond_start_idx = 14, 524 .cond_nums = 1 }, 525 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, 526 .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR, 527 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 528 .result_start_idx = 353, 529 .result_bit_size = 0, 530 .result_num_fields = 0, 531 .encap_num_fields = 47 532 }, 533 { /* act_tid: 5, , table: int_full_act_record.0 */ 534 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 535 .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, 536 .resource_sub_type = 537 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 538 .direction = TF_DIR_TX, 539 .execute_info = { 540 .cond_true_goto = 0, 541 .cond_false_goto = 0, 542 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, 543 .cond_start_idx = 15, 544 .cond_nums = 0 }, 545 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, 546 .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, 547 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 548 .result_start_idx = 400, 549 .result_bit_size = 128, 550 .result_num_fields = 17 551 }, 552 { /* act_tid: 6, , table: int_flow_counter_tbl.0 */ 553 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 554 .resource_type = TF_TBL_TYPE_ACT_STATS_64, 555 .resource_sub_type = 556 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, 557 .direction = TF_DIR_TX, 558 .execute_info = { 559 .cond_true_goto = 1, 560 .cond_false_goto = 1, 561 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 562 .cond_start_idx = 15, 563 .cond_nums = 1 }, 564 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, 565 .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, 566 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 567 .result_start_idx = 417, 568 .result_bit_size = 64, 569 .result_num_fields = 1 570 }, 571 { /* act_tid: 6, , table: source_property_cache.rd */ 572 .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, 573 .resource_sub_type = 574 BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SOURCE_PROPERTY_CACHE, 575 .direction = TF_DIR_TX, 576 .execute_info = { 577 .cond_true_goto = 1, 578 .cond_false_goto = 1, 579 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 580 .cond_start_idx = 16, 581 .cond_nums = 1 }, 582 .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, 583 .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, 584 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 585 .key_start_idx = 2, 586 .blob_key_bit_size = 80, 587 .key_bit_size = 80, 588 .key_num_fields = 2, 589 .ident_start_idx = 1, 590 .ident_nums = 1 591 }, 592 { /* act_tid: 6, , table: control.0 */ 593 .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, 594 .direction = TF_DIR_TX, 595 .execute_info = { 596 .cond_true_goto = 1, 597 .cond_false_goto = 3, 598 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 599 .cond_start_idx = 17, 600 .cond_nums = 1 }, 601 .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, 602 .fdb_operand = BNXT_ULP_RF_IDX_RID 603 }, 604 { /* act_tid: 6, , table: sp_smac_ipv4.0 */ 605 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 606 .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, 607 .resource_sub_type = 608 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 609 .direction = TF_DIR_TX, 610 .execute_info = { 611 .cond_true_goto = 1, 612 .cond_false_goto = 1, 613 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 614 .cond_start_idx = 18, 615 .cond_nums = 1 }, 616 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, 617 .tbl_operand = BNXT_ULP_RF_IDX_MAIN_SP_PTR, 618 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, 619 .fdb_operand = BNXT_ULP_RF_IDX_RID, 620 .record_size = 16, 621 .result_start_idx = 418, 622 .result_bit_size = 0, 623 .result_num_fields = 0, 624 .encap_num_fields = 3 625 }, 626 { /* act_tid: 6, , table: source_property_cache.wr */ 627 .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, 628 .resource_sub_type = 629 BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SOURCE_PROPERTY_CACHE, 630 .direction = TF_DIR_TX, 631 .execute_info = { 632 .cond_true_goto = 1, 633 .cond_false_goto = 1, 634 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, 635 .cond_start_idx = 19, 636 .cond_nums = 0 }, 637 .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, 638 .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, 639 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 640 .key_start_idx = 4, 641 .blob_key_bit_size = 80, 642 .key_bit_size = 80, 643 .key_num_fields = 2, 644 .result_start_idx = 421, 645 .result_bit_size = 48, 646 .result_num_fields = 2 647 }, 648 { /* act_tid: 6, , table: sp_smac_ipv6.0 */ 649 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 650 .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, 651 .resource_sub_type = 652 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 653 .direction = TF_DIR_TX, 654 .execute_info = { 655 .cond_true_goto = 1, 656 .cond_false_goto = 1, 657 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 658 .cond_start_idx = 19, 659 .cond_nums = 1 }, 660 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, 661 .tbl_operand = BNXT_ULP_RF_IDX_MAIN_SP_PTR, 662 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 663 .record_size = 32, 664 .result_start_idx = 423, 665 .result_bit_size = 0, 666 .result_num_fields = 0, 667 .encap_num_fields = 3 668 }, 669 { /* act_tid: 6, , table: vxlan_encap_rec_cache.rd */ 670 .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, 671 .resource_sub_type = 672 BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_VXLAN_ENCAP_REC_CACHE, 673 .direction = TF_DIR_TX, 674 .execute_info = { 675 .cond_true_goto = 1, 676 .cond_false_goto = 1, 677 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 678 .cond_start_idx = 20, 679 .cond_nums = 2 }, 680 .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, 681 .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, 682 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 683 .key_start_idx = 6, 684 .blob_key_bit_size = 136, 685 .key_bit_size = 136, 686 .key_num_fields = 5, 687 .ident_start_idx = 2, 688 .ident_nums = 1 689 }, 690 { /* act_tid: 6, , table: control.0 */ 691 .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE, 692 .direction = TF_DIR_TX, 693 .execute_info = { 694 .cond_true_goto = 1, 695 .cond_false_goto = 3, 696 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 697 .cond_start_idx = 22, 698 .cond_nums = 1 }, 699 .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, 700 .fdb_operand = BNXT_ULP_RF_IDX_RID 701 }, 702 { /* act_tid: 6, , table: int_tun_encap_record.ipv4_vxlan */ 703 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 704 .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, 705 .resource_sub_type = 706 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 707 .direction = TF_DIR_TX, 708 .execute_info = { 709 .cond_true_goto = 1, 710 .cond_false_goto = 1, 711 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 712 .cond_start_idx = 23, 713 .cond_nums = 2 }, 714 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, 715 .tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0, 716 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE, 717 .fdb_operand = BNXT_ULP_RF_IDX_RID, 718 .result_start_idx = 426, 719 .result_bit_size = 0, 720 .result_num_fields = 0, 721 .encap_num_fields = 30 722 }, 723 { /* act_tid: 6, , table: vxlan_encap_rec_cache.wr */ 724 .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, 725 .resource_sub_type = 726 BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_VXLAN_ENCAP_REC_CACHE, 727 .direction = TF_DIR_TX, 728 .execute_info = { 729 .cond_true_goto = 1, 730 .cond_false_goto = 1, 731 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, 732 .cond_start_idx = 25, 733 .cond_nums = 0 }, 734 .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, 735 .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH, 736 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 737 .key_start_idx = 11, 738 .blob_key_bit_size = 136, 739 .key_bit_size = 136, 740 .key_num_fields = 5, 741 .result_start_idx = 456, 742 .result_bit_size = 48, 743 .result_num_fields = 2 744 }, 745 { /* act_tid: 6, , table: int_tun_encap_record.ipv6_vxlan */ 746 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 747 .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, 748 .resource_sub_type = 749 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 750 .direction = TF_DIR_TX, 751 .execute_info = { 752 .cond_true_goto = 1, 753 .cond_false_goto = 1, 754 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, 755 .cond_start_idx = 25, 756 .cond_nums = 2 }, 757 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, 758 .tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0, 759 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 760 .result_start_idx = 458, 761 .result_bit_size = 0, 762 .result_num_fields = 0, 763 .encap_num_fields = 30 764 }, 765 { /* act_tid: 6, , table: int_full_act_record.0 */ 766 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 767 .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, 768 .resource_sub_type = 769 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, 770 .direction = TF_DIR_TX, 771 .execute_info = { 772 .cond_true_goto = 0, 773 .cond_false_goto = 0, 774 .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, 775 .cond_start_idx = 27, 776 .cond_nums = 0 }, 777 .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, 778 .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, 779 .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, 780 .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, 781 .result_start_idx = 488, 782 .result_bit_size = 128, 783 .result_num_fields = 17 784 } 785 }; 786 787 struct bnxt_ulp_mapper_cond_info ulp_thor_act_cond_list[] = { 788 /* cond_execute: act_tid: 1, shared_mirror_record.rd */ 789 { 790 .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, 791 .cond_operand = BNXT_ULP_ACT_BIT_SHARED_SAMPLE 792 }, 793 /* cond_execute: act_tid: 1, int_flow_counter_tbl.0 */ 794 { 795 .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, 796 .cond_operand = BNXT_ULP_ACT_BIT_COUNT 797 }, 798 /* cond_execute: act_tid: 1, mod_record.ing_ttl */ 799 { 800 .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, 801 .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL 802 }, 803 /* cond_execute: act_tid: 2, int_flow_counter_tbl.0 */ 804 { 805 .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, 806 .cond_operand = BNXT_ULP_ACT_BIT_COUNT 807 }, 808 /* cond_execute: act_tid: 3, int_flow_counter_tbl.0 */ 809 { 810 .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, 811 .cond_operand = BNXT_ULP_ACT_BIT_COUNT 812 }, 813 /* cond_execute: act_tid: 3, mod_record.ing_ttl */ 814 { 815 .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, 816 .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL 817 }, 818 /* cond_execute: act_tid: 3, mod_record.ing_no_ttl */ 819 { 820 .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_NOT_SET, 821 .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL 822 }, 823 /* cond_execute: act_tid: 4, int_flow_counter_tbl.0 */ 824 { 825 .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, 826 .cond_operand = BNXT_ULP_ACT_BIT_COUNT 827 }, 828 /* cond_execute: act_tid: 4, int_vtag_encap_record.0 */ 829 { 830 .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, 831 .cond_operand = BNXT_ULP_ACT_BIT_PUSH_VLAN 832 }, 833 /* cond_execute: act_tid: 4, mod_record.dec_ttl_egr */ 834 { 835 .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, 836 .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL 837 }, 838 /* cond_execute: act_tid: 4, int_full_act_record.0 */ 839 { 840 .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, 841 .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL 842 }, 843 { 844 .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, 845 .cond_operand = BNXT_ULP_ACT_BIT_PUSH_VLAN 846 }, 847 /* cond_execute: act_tid: 5, int_flow_counter_tbl.0 */ 848 { 849 .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, 850 .cond_operand = BNXT_ULP_ACT_BIT_COUNT 851 }, 852 /* cond_execute: act_tid: 5, mod_record.ing_ttl */ 853 { 854 .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, 855 .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL 856 }, 857 /* cond_execute: act_tid: 5, mod_record.ing_no_ttl */ 858 { 859 .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_NOT_SET, 860 .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL 861 }, 862 /* cond_execute: act_tid: 6, int_flow_counter_tbl.0 */ 863 { 864 .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET, 865 .cond_operand = BNXT_ULP_ACT_BIT_COUNT 866 }, 867 /* cond_execute: act_tid: 6, source_property_cache.rd */ 868 { 869 .cond_opcode = BNXT_ULP_COND_OPC_CF_IS_SET, 870 .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG 871 }, 872 /* cond_execute: act_tid: 6, control.0 */ 873 { 874 .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, 875 .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS 876 }, 877 /* cond_execute: act_tid: 6, sp_smac_ipv4.0 */ 878 { 879 .cond_opcode = BNXT_ULP_COND_OPC_CF_IS_SET, 880 .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG 881 }, 882 /* cond_execute: act_tid: 6, sp_smac_ipv6.0 */ 883 { 884 .cond_opcode = BNXT_ULP_COND_OPC_CF_IS_SET, 885 .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG 886 }, 887 /* cond_execute: act_tid: 6, vxlan_encap_rec_cache.rd */ 888 { 889 .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET, 890 .cond_operand = BNXT_ULP_HDR_BIT_O_IPV4 891 }, 892 { 893 .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET, 894 .cond_operand = BNXT_ULP_HDR_BIT_T_VXLAN 895 }, 896 /* cond_execute: act_tid: 6, control.0 */ 897 { 898 .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET, 899 .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS 900 }, 901 /* cond_execute: act_tid: 6, int_tun_encap_record.ipv4_vxlan */ 902 { 903 .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET, 904 .cond_operand = BNXT_ULP_HDR_BIT_O_IPV4 905 }, 906 { 907 .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET, 908 .cond_operand = BNXT_ULP_HDR_BIT_T_VXLAN 909 }, 910 /* cond_execute: act_tid: 6, int_tun_encap_record.ipv6_vxlan */ 911 { 912 .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET, 913 .cond_operand = BNXT_ULP_HDR_BIT_O_IPV6 914 }, 915 { 916 .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET, 917 .cond_operand = BNXT_ULP_HDR_BIT_T_VXLAN 918 } 919 }; 920 921 struct bnxt_ulp_mapper_key_info ulp_thor_act_key_info_list[] = { 922 /* act_tid: 1, , table: shared_mirror_record.rd */ 923 { 924 .field_info_mask = { 925 .description = "shared_index", 926 .field_bit_size = 1, 927 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 928 .field_src1 = BNXT_ULP_FIELD_SRC_ONES, 929 .field_opr1 = { 930 0xff} 931 }, 932 .field_info_spec = { 933 .description = "shared_index", 934 .field_bit_size = 1, 935 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 936 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, 937 .field_opr1 = { 938 (BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE >> 8) & 0xff, 939 BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE & 0xff} 940 } 941 }, 942 /* act_tid: 2, , table: shared_mirror_record.wr */ 943 { 944 .field_info_mask = { 945 .description = "shared_index", 946 .field_bit_size = 1, 947 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 948 .field_src1 = BNXT_ULP_FIELD_SRC_ONES, 949 .field_opr1 = { 950 0xff} 951 }, 952 .field_info_spec = { 953 .description = "shared_index", 954 .field_bit_size = 1, 955 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 956 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 957 .field_opr1 = { 958 (BNXT_ULP_RF_IDX_MIRROR_PTR_0 >> 8) & 0xff, 959 BNXT_ULP_RF_IDX_MIRROR_PTR_0 & 0xff} 960 } 961 }, 962 /* act_tid: 6, , table: source_property_cache.rd */ 963 { 964 .field_info_mask = { 965 .description = "smac", 966 .field_bit_size = 48, 967 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 968 .field_src1 = BNXT_ULP_FIELD_SRC_ONES, 969 .field_opr1 = { 970 0xff, 971 0xff, 972 0xff, 973 0xff, 974 0xff, 975 0xff} 976 }, 977 .field_info_spec = { 978 .description = "smac", 979 .field_bit_size = 48, 980 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 981 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 982 .field_opr1 = { 983 (BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff, 984 BNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff} 985 } 986 }, 987 { 988 .field_info_mask = { 989 .description = "ipv4_src_addr", 990 .field_bit_size = 32, 991 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 992 .field_src1 = BNXT_ULP_FIELD_SRC_ONES, 993 .field_opr1 = { 994 0xff, 995 0xff, 996 0xff, 997 0xff} 998 }, 999 .field_info_spec = { 1000 .description = "ipv4_src_addr", 1001 .field_bit_size = 32, 1002 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1003 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 1004 .field_opr1 = { 1005 (BNXT_ULP_ENC_FIELD_IPV4_SADDR >> 8) & 0xff, 1006 BNXT_ULP_ENC_FIELD_IPV4_SADDR & 0xff} 1007 } 1008 }, 1009 /* act_tid: 6, , table: source_property_cache.wr */ 1010 { 1011 .field_info_mask = { 1012 .description = "smac", 1013 .field_bit_size = 48, 1014 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1015 .field_src1 = BNXT_ULP_FIELD_SRC_ONES, 1016 .field_opr1 = { 1017 0xff, 1018 0xff, 1019 0xff, 1020 0xff, 1021 0xff, 1022 0xff} 1023 }, 1024 .field_info_spec = { 1025 .description = "smac", 1026 .field_bit_size = 48, 1027 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1028 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 1029 .field_opr1 = { 1030 (BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff, 1031 BNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff} 1032 } 1033 }, 1034 { 1035 .field_info_mask = { 1036 .description = "ipv4_src_addr", 1037 .field_bit_size = 32, 1038 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1039 .field_src1 = BNXT_ULP_FIELD_SRC_ONES, 1040 .field_opr1 = { 1041 0xff, 1042 0xff, 1043 0xff, 1044 0xff} 1045 }, 1046 .field_info_spec = { 1047 .description = "ipv4_src_addr", 1048 .field_bit_size = 32, 1049 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1050 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 1051 .field_opr1 = { 1052 (BNXT_ULP_ENC_FIELD_IPV4_SADDR >> 8) & 0xff, 1053 BNXT_ULP_ENC_FIELD_IPV4_SADDR & 0xff} 1054 } 1055 }, 1056 /* act_tid: 6, , table: vxlan_encap_rec_cache.rd */ 1057 { 1058 .field_info_mask = { 1059 .description = "dmac", 1060 .field_bit_size = 48, 1061 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1062 .field_src1 = BNXT_ULP_FIELD_SRC_ONES, 1063 .field_opr1 = { 1064 0xff, 1065 0xff, 1066 0xff, 1067 0xff, 1068 0xff, 1069 0xff} 1070 }, 1071 .field_info_spec = { 1072 .description = "dmac", 1073 .field_bit_size = 48, 1074 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1075 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 1076 .field_opr1 = { 1077 (BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff, 1078 BNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff} 1079 } 1080 }, 1081 { 1082 .field_info_mask = { 1083 .description = "ipv4_dst_addr", 1084 .field_bit_size = 32, 1085 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1086 .field_src1 = BNXT_ULP_FIELD_SRC_ONES, 1087 .field_opr1 = { 1088 0xff, 1089 0xff, 1090 0xff, 1091 0xff} 1092 }, 1093 .field_info_spec = { 1094 .description = "ipv4_dst_addr", 1095 .field_bit_size = 32, 1096 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1097 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 1098 .field_opr1 = { 1099 (BNXT_ULP_ENC_FIELD_IPV4_DADDR >> 8) & 0xff, 1100 BNXT_ULP_ENC_FIELD_IPV4_DADDR & 0xff} 1101 } 1102 }, 1103 { 1104 .field_info_mask = { 1105 .description = "udp_sport", 1106 .field_bit_size = 16, 1107 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1108 .field_src1 = BNXT_ULP_FIELD_SRC_ONES, 1109 .field_opr1 = { 1110 0xff, 1111 0xff} 1112 }, 1113 .field_info_spec = { 1114 .description = "udp_sport", 1115 .field_bit_size = 16, 1116 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1117 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 1118 .field_opr1 = { 1119 (BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff, 1120 BNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff} 1121 } 1122 }, 1123 { 1124 .field_info_mask = { 1125 .description = "udp_dport", 1126 .field_bit_size = 16, 1127 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1128 .field_src1 = BNXT_ULP_FIELD_SRC_ONES, 1129 .field_opr1 = { 1130 0xff, 1131 0xff} 1132 }, 1133 .field_info_spec = { 1134 .description = "udp_dport", 1135 .field_bit_size = 16, 1136 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1137 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 1138 .field_opr1 = { 1139 (BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff, 1140 BNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff} 1141 } 1142 }, 1143 { 1144 .field_info_mask = { 1145 .description = "vni", 1146 .field_bit_size = 24, 1147 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1148 .field_src1 = BNXT_ULP_FIELD_SRC_ONES, 1149 .field_opr1 = { 1150 0xff, 1151 0xff, 1152 0xff} 1153 }, 1154 .field_info_spec = { 1155 .description = "vni", 1156 .field_bit_size = 24, 1157 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1158 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 1159 .field_opr1 = { 1160 (BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff, 1161 BNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff} 1162 } 1163 }, 1164 /* act_tid: 6, , table: vxlan_encap_rec_cache.wr */ 1165 { 1166 .field_info_mask = { 1167 .description = "dmac", 1168 .field_bit_size = 48, 1169 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1170 .field_src1 = BNXT_ULP_FIELD_SRC_ONES, 1171 .field_opr1 = { 1172 0xff, 1173 0xff, 1174 0xff, 1175 0xff, 1176 0xff, 1177 0xff} 1178 }, 1179 .field_info_spec = { 1180 .description = "dmac", 1181 .field_bit_size = 48, 1182 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1183 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 1184 .field_opr1 = { 1185 (BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff, 1186 BNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff} 1187 } 1188 }, 1189 { 1190 .field_info_mask = { 1191 .description = "ipv4_dst_addr", 1192 .field_bit_size = 32, 1193 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1194 .field_src1 = BNXT_ULP_FIELD_SRC_ONES, 1195 .field_opr1 = { 1196 0xff, 1197 0xff, 1198 0xff, 1199 0xff} 1200 }, 1201 .field_info_spec = { 1202 .description = "ipv4_dst_addr", 1203 .field_bit_size = 32, 1204 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1205 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 1206 .field_opr1 = { 1207 (BNXT_ULP_ENC_FIELD_IPV4_DADDR >> 8) & 0xff, 1208 BNXT_ULP_ENC_FIELD_IPV4_DADDR & 0xff} 1209 } 1210 }, 1211 { 1212 .field_info_mask = { 1213 .description = "udp_sport", 1214 .field_bit_size = 16, 1215 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1216 .field_src1 = BNXT_ULP_FIELD_SRC_ONES, 1217 .field_opr1 = { 1218 0xff, 1219 0xff} 1220 }, 1221 .field_info_spec = { 1222 .description = "udp_sport", 1223 .field_bit_size = 16, 1224 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1225 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 1226 .field_opr1 = { 1227 (BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff, 1228 BNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff} 1229 } 1230 }, 1231 { 1232 .field_info_mask = { 1233 .description = "udp_dport", 1234 .field_bit_size = 16, 1235 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1236 .field_src1 = BNXT_ULP_FIELD_SRC_ONES, 1237 .field_opr1 = { 1238 0xff, 1239 0xff} 1240 }, 1241 .field_info_spec = { 1242 .description = "udp_dport", 1243 .field_bit_size = 16, 1244 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1245 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 1246 .field_opr1 = { 1247 (BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff, 1248 BNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff} 1249 } 1250 }, 1251 { 1252 .field_info_mask = { 1253 .description = "vni", 1254 .field_bit_size = 24, 1255 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1256 .field_src1 = BNXT_ULP_FIELD_SRC_ONES, 1257 .field_opr1 = { 1258 0xff, 1259 0xff, 1260 0xff} 1261 }, 1262 .field_info_spec = { 1263 .description = "vni", 1264 .field_bit_size = 24, 1265 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1266 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 1267 .field_opr1 = { 1268 (BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff, 1269 BNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff} 1270 } 1271 } 1272 }; 1273 1274 struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = { 1275 /* act_tid: 1, , table: int_flow_counter_tbl.0 */ 1276 { 1277 .description = "count", 1278 .field_bit_size = 64, 1279 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1280 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1281 }, 1282 /* act_tid: 1, , table: mod_record.ing_ttl */ 1283 { 1284 .description = "metadata_en", 1285 .field_bit_size = 1, 1286 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1287 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1288 }, 1289 { 1290 .description = "rem_ovlan", 1291 .field_bit_size = 1, 1292 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1293 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1294 }, 1295 { 1296 .description = "rem_ivlan", 1297 .field_bit_size = 1, 1298 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1299 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1300 }, 1301 { 1302 .description = "rep_add_ivlan", 1303 .field_bit_size = 1, 1304 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1305 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1306 }, 1307 { 1308 .description = "rep_add_ovlan", 1309 .field_bit_size = 1, 1310 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1311 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1312 }, 1313 { 1314 .description = "ttl_update", 1315 .field_bit_size = 1, 1316 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1317 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 1318 .field_opr1 = { 1319 1} 1320 }, 1321 { 1322 .description = "tun_md_en", 1323 .field_bit_size = 1, 1324 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1325 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1326 }, 1327 { 1328 .description = "reserved_en", 1329 .field_bit_size = 1, 1330 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1331 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1332 }, 1333 { 1334 .description = "l2_dmac_en", 1335 .field_bit_size = 1, 1336 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1337 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1338 }, 1339 { 1340 .description = "l2_smac_en", 1341 .field_bit_size = 1, 1342 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1343 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1344 }, 1345 { 1346 .description = "l3_sip_ipv6_en", 1347 .field_bit_size = 1, 1348 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1349 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1350 }, 1351 { 1352 .description = "l3_dip_ipv6_en", 1353 .field_bit_size = 1, 1354 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1355 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1356 }, 1357 { 1358 .description = "l3_sip_ipv4_en", 1359 .field_bit_size = 1, 1360 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1361 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1362 }, 1363 { 1364 .description = "l3_dip_ipv4_en", 1365 .field_bit_size = 1, 1366 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1367 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1368 }, 1369 { 1370 .description = "l4_sport_en", 1371 .field_bit_size = 1, 1372 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1373 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1374 }, 1375 { 1376 .description = "l4_dport_en", 1377 .field_bit_size = 1, 1378 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1379 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1380 }, 1381 { 1382 .description = "metadata_data", 1383 .field_bit_size = 16, 1384 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1385 }, 1386 { 1387 .description = "metadata_rsvd", 1388 .field_bit_size = 10, 1389 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1390 }, 1391 { 1392 .description = "metadata_op", 1393 .field_bit_size = 2, 1394 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1395 }, 1396 { 1397 .description = "metadata_prof", 1398 .field_bit_size = 4, 1399 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1400 }, 1401 { 1402 .description = "ivlan_tpid", 1403 .field_bit_size = 16, 1404 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1405 }, 1406 { 1407 .description = "ivlan_pri", 1408 .field_bit_size = 3, 1409 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1410 }, 1411 { 1412 .description = "ivlan_de", 1413 .field_bit_size = 1, 1414 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1415 }, 1416 { 1417 .description = "ivlan_vid", 1418 .field_bit_size = 12, 1419 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1420 }, 1421 { 1422 .description = "ovlan_tpid", 1423 .field_bit_size = 16, 1424 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1425 }, 1426 { 1427 .description = "ovlan_pri", 1428 .field_bit_size = 3, 1429 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1430 }, 1431 { 1432 .description = "ovlan_de", 1433 .field_bit_size = 1, 1434 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1435 }, 1436 { 1437 .description = "ovlan_vid", 1438 .field_bit_size = 12, 1439 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1440 }, 1441 { 1442 .description = "alt_pfid", 1443 .field_bit_size = 4, 1444 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1445 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1446 }, 1447 { 1448 .description = "alt_vid", 1449 .field_bit_size = 12, 1450 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1451 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1452 }, 1453 { 1454 .description = "ttl_rsvd", 1455 .field_bit_size = 12, 1456 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1457 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1458 }, 1459 { 1460 .description = "ttl_tl3_dec", 1461 .field_bit_size = 1, 1462 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1463 .field_src1 = BNXT_ULP_FIELD_SRC_CF, 1464 .field_opr1 = { 1465 (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, 1466 BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff} 1467 }, 1468 { 1469 .description = "ttl_il3_dec", 1470 .field_bit_size = 1, 1471 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1472 .field_src1 = BNXT_ULP_FIELD_SRC_CF, 1473 .field_opr1 = { 1474 (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, 1475 BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff} 1476 }, 1477 { 1478 .description = "ttl_tl3_rdir", 1479 .field_bit_size = 1, 1480 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1481 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1482 }, 1483 { 1484 .description = "ttl_il3_rdir", 1485 .field_bit_size = 1, 1486 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1487 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1488 }, 1489 { 1490 .description = "tun_new_prot", 1491 .field_bit_size = 16, 1492 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1493 }, 1494 { 1495 .description = "tun_ex_prot", 1496 .field_bit_size = 16, 1497 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1498 }, 1499 { 1500 .description = "tun_mv", 1501 .field_bit_size = 16, 1502 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1503 }, 1504 { 1505 .description = "reserved", 1506 .field_bit_size = 0, 1507 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1508 }, 1509 { 1510 .description = "l2_dmac", 1511 .field_bit_size = 48, 1512 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1513 }, 1514 { 1515 .description = "l2_smac", 1516 .field_bit_size = 48, 1517 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1518 }, 1519 { 1520 .description = "l3_sip_ipv6", 1521 .field_bit_size = 128, 1522 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1523 }, 1524 { 1525 .description = "l3_dip_ipv6", 1526 .field_bit_size = 128, 1527 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1528 }, 1529 { 1530 .description = "l3_sip_ipv4", 1531 .field_bit_size = 32, 1532 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1533 }, 1534 { 1535 .description = "l3_dip_ipv4", 1536 .field_bit_size = 32, 1537 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1538 }, 1539 { 1540 .description = "l4_sport", 1541 .field_bit_size = 16, 1542 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1543 }, 1544 { 1545 .description = "l4_dport", 1546 .field_bit_size = 16, 1547 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 1548 }, 1549 /* act_tid: 1, , table: int_full_act_record.0 */ 1550 { 1551 .description = "sp_rec_ptr", 1552 .field_bit_size = 16, 1553 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1554 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1555 }, 1556 { 1557 .description = "encap_ptr", 1558 .field_bit_size = 16, 1559 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1560 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1561 }, 1562 { 1563 .description = "mod_rec_ptr", 1564 .field_bit_size = 16, 1565 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 1566 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 1567 .field_opr1 = { 1568 ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 56) & 0xff, 1569 ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 48) & 0xff, 1570 ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 40) & 0xff, 1571 ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 32) & 0xff, 1572 ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 24) & 0xff, 1573 ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 16) & 0xff, 1574 ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 8) & 0xff, 1575 (uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL & 0xff}, 1576 .field_src2 = BNXT_ULP_FIELD_SRC_RF, 1577 .field_opr2 = { 1578 (BNXT_ULP_RF_IDX_MODIFY_PTR >> 8) & 0xff, 1579 BNXT_ULP_RF_IDX_MODIFY_PTR & 0xff}, 1580 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 1581 }, 1582 { 1583 .description = "rsvd1", 1584 .field_bit_size = 16, 1585 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1586 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1587 }, 1588 { 1589 .description = "rsvd0", 1590 .field_bit_size = 8, 1591 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1592 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1593 }, 1594 { 1595 .description = "decap_func", 1596 .field_bit_size = 5, 1597 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 1598 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 1599 .field_opr1 = { 1600 ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 56) & 0xff, 1601 ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 48) & 0xff, 1602 ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 40) & 0xff, 1603 ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 32) & 0xff, 1604 ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 24) & 0xff, 1605 ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 16) & 0xff, 1606 ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 8) & 0xff, 1607 (uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP & 0xff}, 1608 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 1609 .field_opr2 = { 1610 ULP_THOR_SYM_DECAP_FUNC_THRU_TUN}, 1611 .field_src3 = BNXT_ULP_FIELD_SRC_CONST, 1612 .field_opr3 = { 1613 ULP_THOR_SYM_DECAP_FUNC_NONE} 1614 }, 1615 { 1616 .description = "meter", 1617 .field_bit_size = 10, 1618 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1619 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1620 }, 1621 { 1622 .description = "stats_op", 1623 .field_bit_size = 1, 1624 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1625 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 1626 .field_opr1 = { 1627 1} 1628 }, 1629 { 1630 .description = "stats_ptr", 1631 .field_bit_size = 16, 1632 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1633 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 1634 .field_opr1 = { 1635 (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, 1636 BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} 1637 }, 1638 { 1639 .description = "vnic_or_vport", 1640 .field_bit_size = 11, 1641 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1642 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, 1643 .field_opr1 = { 1644 (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, 1645 BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff} 1646 }, 1647 { 1648 .description = "use_default", 1649 .field_bit_size = 1, 1650 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1651 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1652 }, 1653 { 1654 .description = "mirror", 1655 .field_bit_size = 4, 1656 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 1657 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 1658 .field_opr1 = { 1659 ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 56) & 0xff, 1660 ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 48) & 0xff, 1661 ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 40) & 0xff, 1662 ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 32) & 0xff, 1663 ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 24) & 0xff, 1664 ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 16) & 0xff, 1665 ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 8) & 0xff, 1666 (uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE & 0xff}, 1667 .field_src2 = BNXT_ULP_FIELD_SRC_RF, 1668 .field_opr2 = { 1669 (BNXT_ULP_RF_IDX_MIRROR_ID_0 >> 8) & 0xff, 1670 BNXT_ULP_RF_IDX_MIRROR_ID_0 & 0xff}, 1671 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 1672 }, 1673 { 1674 .description = "cond_copy", 1675 .field_bit_size = 1, 1676 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1677 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1678 }, 1679 { 1680 .description = "vlan_del_rpt", 1681 .field_bit_size = 2, 1682 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 1683 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 1684 .field_opr1 = { 1685 ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 56) & 0xff, 1686 ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 48) & 0xff, 1687 ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 40) & 0xff, 1688 ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 32) & 0xff, 1689 ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 24) & 0xff, 1690 ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 16) & 0xff, 1691 ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 8) & 0xff, 1692 (uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN & 0xff}, 1693 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 1694 .field_opr2 = { 1695 ULP_THOR_SYM_VLAN_DEL_RPT_STRIP_OUTER}, 1696 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 1697 }, 1698 { 1699 .description = "drop", 1700 .field_bit_size = 1, 1701 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1702 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 1703 .field_opr1 = { 1704 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 56) & 0xff, 1705 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 48) & 0xff, 1706 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 40) & 0xff, 1707 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 32) & 0xff, 1708 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 24) & 0xff, 1709 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 16) & 0xff, 1710 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 8) & 0xff, 1711 (uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff} 1712 }, 1713 { 1714 .description = "hit", 1715 .field_bit_size = 1, 1716 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1717 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1718 }, 1719 { 1720 .description = "type", 1721 .field_bit_size = 3, 1722 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1723 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 1724 .field_opr1 = { 1725 1} 1726 }, 1727 /* act_tid: 1, , table: int_compact_act_record.0 */ 1728 { 1729 .description = "rsvd0", 1730 .field_bit_size = 8, 1731 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1732 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1733 }, 1734 { 1735 .description = "decap_func", 1736 .field_bit_size = 5, 1737 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 1738 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 1739 .field_opr1 = { 1740 ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 56) & 0xff, 1741 ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 48) & 0xff, 1742 ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 40) & 0xff, 1743 ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 32) & 0xff, 1744 ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 24) & 0xff, 1745 ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 16) & 0xff, 1746 ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 8) & 0xff, 1747 (uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP & 0xff}, 1748 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 1749 .field_opr2 = { 1750 ULP_THOR_SYM_DECAP_FUNC_THRU_TUN}, 1751 .field_src3 = BNXT_ULP_FIELD_SRC_CONST, 1752 .field_opr3 = { 1753 ULP_THOR_SYM_DECAP_FUNC_NONE} 1754 }, 1755 { 1756 .description = "meter", 1757 .field_bit_size = 10, 1758 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1759 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1760 }, 1761 { 1762 .description = "stats_op", 1763 .field_bit_size = 1, 1764 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1765 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 1766 .field_opr1 = { 1767 1} 1768 }, 1769 { 1770 .description = "stats_ptr", 1771 .field_bit_size = 16, 1772 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1773 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 1774 .field_opr1 = { 1775 (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, 1776 BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} 1777 }, 1778 { 1779 .description = "vnic_or_vport", 1780 .field_bit_size = 11, 1781 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1782 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, 1783 .field_opr1 = { 1784 (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, 1785 BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff} 1786 }, 1787 { 1788 .description = "use_default", 1789 .field_bit_size = 1, 1790 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1791 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1792 }, 1793 { 1794 .description = "mirror", 1795 .field_bit_size = 4, 1796 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 1797 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 1798 .field_opr1 = { 1799 ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 56) & 0xff, 1800 ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 48) & 0xff, 1801 ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 40) & 0xff, 1802 ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 32) & 0xff, 1803 ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 24) & 0xff, 1804 ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 16) & 0xff, 1805 ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 8) & 0xff, 1806 (uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE & 0xff}, 1807 .field_src2 = BNXT_ULP_FIELD_SRC_RF, 1808 .field_opr2 = { 1809 (BNXT_ULP_RF_IDX_MIRROR_ID_0 >> 8) & 0xff, 1810 BNXT_ULP_RF_IDX_MIRROR_ID_0 & 0xff}, 1811 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 1812 }, 1813 { 1814 .description = "cond_copy", 1815 .field_bit_size = 1, 1816 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1817 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1818 }, 1819 { 1820 .description = "vlan_del_rpt", 1821 .field_bit_size = 2, 1822 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 1823 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 1824 .field_opr1 = { 1825 ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 56) & 0xff, 1826 ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 48) & 0xff, 1827 ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 40) & 0xff, 1828 ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 32) & 0xff, 1829 ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 24) & 0xff, 1830 ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 16) & 0xff, 1831 ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 8) & 0xff, 1832 (uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN & 0xff}, 1833 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 1834 .field_opr2 = { 1835 ULP_THOR_SYM_VLAN_DEL_RPT_STRIP_OUTER}, 1836 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 1837 }, 1838 { 1839 .description = "drop", 1840 .field_bit_size = 1, 1841 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1842 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 1843 .field_opr1 = { 1844 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 56) & 0xff, 1845 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 48) & 0xff, 1846 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 40) & 0xff, 1847 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 32) & 0xff, 1848 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 24) & 0xff, 1849 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 16) & 0xff, 1850 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 8) & 0xff, 1851 (uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff} 1852 }, 1853 { 1854 .description = "hit", 1855 .field_bit_size = 1, 1856 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1857 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1858 }, 1859 { 1860 .description = "type", 1861 .field_bit_size = 3, 1862 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1863 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1864 }, 1865 /* act_tid: 2, , table: mirror_tbl.alloc */ 1866 { 1867 .description = "act_rec_ptr", 1868 .field_bit_size = 16, 1869 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1870 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1871 }, 1872 { 1873 .description = "reserved", 1874 .field_bit_size = 13, 1875 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1876 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1877 }, 1878 { 1879 .description = "ignore_drop", 1880 .field_bit_size = 1, 1881 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1882 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1883 }, 1884 { 1885 .description = "copy_ing_or_egr", 1886 .field_bit_size = 1, 1887 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1888 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1889 }, 1890 { 1891 .description = "enable", 1892 .field_bit_size = 1, 1893 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1894 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 1895 .field_opr1 = { 1896 1} 1897 }, 1898 /* act_tid: 2, , table: int_flow_counter_tbl.0 */ 1899 { 1900 .description = "count", 1901 .field_bit_size = 64, 1902 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1903 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1904 }, 1905 /* act_tid: 2, , table: int_compact_act_record.0 */ 1906 { 1907 .description = "rsvd0", 1908 .field_bit_size = 8, 1909 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1910 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1911 }, 1912 { 1913 .description = "decap_func", 1914 .field_bit_size = 5, 1915 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1916 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1917 }, 1918 { 1919 .description = "meter", 1920 .field_bit_size = 10, 1921 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1922 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1923 }, 1924 { 1925 .description = "stats_op", 1926 .field_bit_size = 1, 1927 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1928 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 1929 .field_opr1 = { 1930 1} 1931 }, 1932 { 1933 .description = "stats_ptr", 1934 .field_bit_size = 16, 1935 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1936 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 1937 .field_opr1 = { 1938 (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, 1939 BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} 1940 }, 1941 { 1942 .description = "vnic_or_vport", 1943 .field_bit_size = 11, 1944 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1945 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, 1946 .field_opr1 = { 1947 (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, 1948 BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff} 1949 }, 1950 { 1951 .description = "use_default", 1952 .field_bit_size = 1, 1953 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1954 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1955 }, 1956 { 1957 .description = "mirror", 1958 .field_bit_size = 4, 1959 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1960 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 1961 .field_opr1 = { 1962 (BNXT_ULP_RF_IDX_MIRROR_PTR_0 >> 8) & 0xff, 1963 BNXT_ULP_RF_IDX_MIRROR_PTR_0 & 0xff} 1964 }, 1965 { 1966 .description = "cond_copy", 1967 .field_bit_size = 1, 1968 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1969 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1970 }, 1971 { 1972 .description = "vlan_del_rpt", 1973 .field_bit_size = 2, 1974 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1975 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1976 }, 1977 { 1978 .description = "drop", 1979 .field_bit_size = 1, 1980 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1981 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1982 }, 1983 { 1984 .description = "hit", 1985 .field_bit_size = 1, 1986 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1987 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1988 }, 1989 { 1990 .description = "type", 1991 .field_bit_size = 3, 1992 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 1993 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 1994 }, 1995 /* act_tid: 2, , table: mirror_tbl.wr */ 1996 { 1997 .description = "act_rec_ptr", 1998 .field_bit_size = 16, 1999 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2000 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 2001 .field_opr1 = { 2002 (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, 2003 BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff} 2004 }, 2005 { 2006 .description = "reserved", 2007 .field_bit_size = 13, 2008 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2009 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2010 }, 2011 { 2012 .description = "ignore_drop", 2013 .field_bit_size = 1, 2014 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2015 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 2016 .field_opr1 = { 2017 1} 2018 }, 2019 { 2020 .description = "copy_ing_or_egr", 2021 .field_bit_size = 1, 2022 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2023 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 2024 .field_opr1 = { 2025 1} 2026 }, 2027 { 2028 .description = "enable", 2029 .field_bit_size = 1, 2030 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2031 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 2032 .field_opr1 = { 2033 1} 2034 }, 2035 /* act_tid: 2, , table: shared_mirror_record.wr */ 2036 { 2037 .description = "rid", 2038 .field_bit_size = 32, 2039 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2040 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 2041 .field_opr1 = { 2042 (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, 2043 BNXT_ULP_RF_IDX_RID & 0xff} 2044 }, 2045 { 2046 .description = "mirror_id", 2047 .field_bit_size = 4, 2048 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2049 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 2050 .field_opr1 = { 2051 (BNXT_ULP_RF_IDX_MIRROR_PTR_0 >> 8) & 0xff, 2052 BNXT_ULP_RF_IDX_MIRROR_PTR_0 & 0xff} 2053 }, 2054 /* act_tid: 3, , table: int_flow_counter_tbl.0 */ 2055 { 2056 .description = "count", 2057 .field_bit_size = 64, 2058 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2059 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2060 }, 2061 /* act_tid: 3, , table: mod_record.ing_ttl */ 2062 { 2063 .description = "metadata_en", 2064 .field_bit_size = 1, 2065 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2066 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2067 }, 2068 { 2069 .description = "rem_ovlan", 2070 .field_bit_size = 1, 2071 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2072 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2073 }, 2074 { 2075 .description = "rem_ivlan", 2076 .field_bit_size = 1, 2077 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2078 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2079 }, 2080 { 2081 .description = "rep_add_ivlan", 2082 .field_bit_size = 1, 2083 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2084 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2085 }, 2086 { 2087 .description = "rep_add_ovlan", 2088 .field_bit_size = 1, 2089 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2090 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2091 }, 2092 { 2093 .description = "ttl_update", 2094 .field_bit_size = 1, 2095 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2096 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 2097 .field_opr1 = { 2098 1} 2099 }, 2100 { 2101 .description = "tun_md_en", 2102 .field_bit_size = 1, 2103 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2104 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2105 }, 2106 { 2107 .description = "reserved_en", 2108 .field_bit_size = 1, 2109 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2110 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2111 }, 2112 { 2113 .description = "l2_dmac_en", 2114 .field_bit_size = 1, 2115 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2116 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2117 }, 2118 { 2119 .description = "l2_smac_en", 2120 .field_bit_size = 1, 2121 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2122 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2123 }, 2124 { 2125 .description = "l3_sip_ipv6_en", 2126 .field_bit_size = 1, 2127 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2128 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2129 }, 2130 { 2131 .description = "l3_dip_ipv6_en", 2132 .field_bit_size = 1, 2133 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2134 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2135 }, 2136 { 2137 .description = "l3_sip_ipv4_en", 2138 .field_bit_size = 1, 2139 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 2140 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 2141 .field_opr1 = { 2142 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 56) & 0xff, 2143 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 48) & 0xff, 2144 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 40) & 0xff, 2145 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 32) & 0xff, 2146 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 24) & 0xff, 2147 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 16) & 0xff, 2148 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 8) & 0xff, 2149 (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC & 0xff}, 2150 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 2151 .field_opr2 = { 2152 1}, 2153 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 2154 }, 2155 { 2156 .description = "l3_dip_ipv4_en", 2157 .field_bit_size = 1, 2158 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 2159 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 2160 .field_opr1 = { 2161 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 56) & 0xff, 2162 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 48) & 0xff, 2163 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 40) & 0xff, 2164 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 32) & 0xff, 2165 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 24) & 0xff, 2166 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 16) & 0xff, 2167 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 8) & 0xff, 2168 (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST & 0xff}, 2169 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 2170 .field_opr2 = { 2171 1}, 2172 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 2173 }, 2174 { 2175 .description = "l4_sport_en", 2176 .field_bit_size = 1, 2177 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 2178 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 2179 .field_opr1 = { 2180 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, 2181 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff, 2182 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff, 2183 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff, 2184 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff, 2185 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff, 2186 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff, 2187 (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff}, 2188 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 2189 .field_opr2 = { 2190 1}, 2191 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 2192 }, 2193 { 2194 .description = "l4_dport_en", 2195 .field_bit_size = 1, 2196 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 2197 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 2198 .field_opr1 = { 2199 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, 2200 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff, 2201 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff, 2202 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff, 2203 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff, 2204 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff, 2205 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff, 2206 (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff}, 2207 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 2208 .field_opr2 = { 2209 1}, 2210 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 2211 }, 2212 { 2213 .description = "metadata_data", 2214 .field_bit_size = 16, 2215 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2216 }, 2217 { 2218 .description = "metadata_rsvd", 2219 .field_bit_size = 10, 2220 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2221 }, 2222 { 2223 .description = "metadata_op", 2224 .field_bit_size = 2, 2225 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2226 }, 2227 { 2228 .description = "metadata_prof", 2229 .field_bit_size = 4, 2230 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2231 }, 2232 { 2233 .description = "ivlan_tpid", 2234 .field_bit_size = 16, 2235 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2236 }, 2237 { 2238 .description = "ivlan_pri", 2239 .field_bit_size = 3, 2240 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2241 }, 2242 { 2243 .description = "ivlan_de", 2244 .field_bit_size = 1, 2245 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2246 }, 2247 { 2248 .description = "ivlan_vid", 2249 .field_bit_size = 12, 2250 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2251 }, 2252 { 2253 .description = "ovlan_tpid", 2254 .field_bit_size = 16, 2255 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2256 }, 2257 { 2258 .description = "ovlan_pri", 2259 .field_bit_size = 3, 2260 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2261 }, 2262 { 2263 .description = "ovlan_de", 2264 .field_bit_size = 1, 2265 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2266 }, 2267 { 2268 .description = "ovlan_vid", 2269 .field_bit_size = 12, 2270 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2271 }, 2272 { 2273 .description = "alt_pfid", 2274 .field_bit_size = 4, 2275 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2276 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2277 }, 2278 { 2279 .description = "alt_vid", 2280 .field_bit_size = 12, 2281 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2282 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2283 }, 2284 { 2285 .description = "ttl_rsvd", 2286 .field_bit_size = 12, 2287 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2288 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2289 }, 2290 { 2291 .description = "ttl_tl3_dec", 2292 .field_bit_size = 1, 2293 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2294 .field_src1 = BNXT_ULP_FIELD_SRC_CF, 2295 .field_opr1 = { 2296 (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, 2297 BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff} 2298 }, 2299 { 2300 .description = "ttl_il3_dec", 2301 .field_bit_size = 1, 2302 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2303 .field_src1 = BNXT_ULP_FIELD_SRC_CF, 2304 .field_opr1 = { 2305 (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, 2306 BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff} 2307 }, 2308 { 2309 .description = "ttl_tl3_rdir", 2310 .field_bit_size = 1, 2311 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2312 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2313 }, 2314 { 2315 .description = "ttl_il3_rdir", 2316 .field_bit_size = 1, 2317 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2318 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2319 }, 2320 { 2321 .description = "tun_new_prot", 2322 .field_bit_size = 16, 2323 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2324 }, 2325 { 2326 .description = "tun_ex_prot", 2327 .field_bit_size = 16, 2328 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2329 }, 2330 { 2331 .description = "tun_mv", 2332 .field_bit_size = 16, 2333 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2334 }, 2335 { 2336 .description = "reserved", 2337 .field_bit_size = 0, 2338 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2339 }, 2340 { 2341 .description = "l2_dmac", 2342 .field_bit_size = 48, 2343 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2344 }, 2345 { 2346 .description = "l2_smac", 2347 .field_bit_size = 48, 2348 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2349 }, 2350 { 2351 .description = "l3_sip_ipv6", 2352 .field_bit_size = 128, 2353 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2354 }, 2355 { 2356 .description = "l3_dip_ipv6", 2357 .field_bit_size = 128, 2358 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2359 }, 2360 { 2361 .description = "l3_sip_ipv4", 2362 .field_bit_size = 32, 2363 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 2364 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 2365 .field_opr1 = { 2366 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 56) & 0xff, 2367 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 48) & 0xff, 2368 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 40) & 0xff, 2369 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 32) & 0xff, 2370 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 24) & 0xff, 2371 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 16) & 0xff, 2372 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 8) & 0xff, 2373 (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC & 0xff}, 2374 .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, 2375 .field_opr2 = { 2376 (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC >> 8) & 0xff, 2377 BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC & 0xff}, 2378 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 2379 }, 2380 { 2381 .description = "l3_dip_ipv4", 2382 .field_bit_size = 32, 2383 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 2384 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 2385 .field_opr1 = { 2386 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 56) & 0xff, 2387 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 48) & 0xff, 2388 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 40) & 0xff, 2389 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 32) & 0xff, 2390 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 24) & 0xff, 2391 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 16) & 0xff, 2392 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 8) & 0xff, 2393 (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST & 0xff}, 2394 .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, 2395 .field_opr2 = { 2396 (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST >> 8) & 0xff, 2397 BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST & 0xff}, 2398 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 2399 }, 2400 { 2401 .description = "l4_sport", 2402 .field_bit_size = 16, 2403 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 2404 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 2405 .field_opr1 = { 2406 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, 2407 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff, 2408 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff, 2409 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff, 2410 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff, 2411 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff, 2412 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff, 2413 (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff}, 2414 .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, 2415 .field_opr2 = { 2416 (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, 2417 BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff}, 2418 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 2419 }, 2420 { 2421 .description = "l4_dport", 2422 .field_bit_size = 16, 2423 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 2424 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 2425 .field_opr1 = { 2426 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, 2427 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff, 2428 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff, 2429 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff, 2430 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff, 2431 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff, 2432 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff, 2433 (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff}, 2434 .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, 2435 .field_opr2 = { 2436 (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, 2437 BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff}, 2438 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 2439 }, 2440 /* act_tid: 3, , table: mod_record.ing_no_ttl */ 2441 { 2442 .description = "metadata_en", 2443 .field_bit_size = 1, 2444 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2445 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2446 }, 2447 { 2448 .description = "rem_ovlan", 2449 .field_bit_size = 1, 2450 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2451 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2452 }, 2453 { 2454 .description = "rem_ivlan", 2455 .field_bit_size = 1, 2456 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2457 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2458 }, 2459 { 2460 .description = "rep_add_ivlan", 2461 .field_bit_size = 1, 2462 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2463 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2464 }, 2465 { 2466 .description = "rep_add_ovlan", 2467 .field_bit_size = 1, 2468 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2469 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2470 }, 2471 { 2472 .description = "ttl_update", 2473 .field_bit_size = 1, 2474 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2475 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2476 }, 2477 { 2478 .description = "tun_md_en", 2479 .field_bit_size = 1, 2480 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2481 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2482 }, 2483 { 2484 .description = "reserved_en", 2485 .field_bit_size = 1, 2486 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2487 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2488 }, 2489 { 2490 .description = "l2_dmac_en", 2491 .field_bit_size = 1, 2492 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2493 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2494 }, 2495 { 2496 .description = "l2_smac_en", 2497 .field_bit_size = 1, 2498 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2499 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2500 }, 2501 { 2502 .description = "l3_sip_ipv6_en", 2503 .field_bit_size = 1, 2504 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2505 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2506 }, 2507 { 2508 .description = "l3_dip_ipv6_en", 2509 .field_bit_size = 1, 2510 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2511 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2512 }, 2513 { 2514 .description = "l3_sip_ipv4_en", 2515 .field_bit_size = 1, 2516 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 2517 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 2518 .field_opr1 = { 2519 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 56) & 0xff, 2520 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 48) & 0xff, 2521 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 40) & 0xff, 2522 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 32) & 0xff, 2523 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 24) & 0xff, 2524 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 16) & 0xff, 2525 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 8) & 0xff, 2526 (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC & 0xff}, 2527 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 2528 .field_opr2 = { 2529 1}, 2530 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 2531 }, 2532 { 2533 .description = "l3_dip_ipv4_en", 2534 .field_bit_size = 1, 2535 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 2536 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 2537 .field_opr1 = { 2538 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 56) & 0xff, 2539 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 48) & 0xff, 2540 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 40) & 0xff, 2541 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 32) & 0xff, 2542 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 24) & 0xff, 2543 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 16) & 0xff, 2544 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 8) & 0xff, 2545 (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST & 0xff}, 2546 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 2547 .field_opr2 = { 2548 1}, 2549 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 2550 }, 2551 { 2552 .description = "l4_sport_en", 2553 .field_bit_size = 1, 2554 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 2555 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 2556 .field_opr1 = { 2557 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, 2558 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff, 2559 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff, 2560 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff, 2561 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff, 2562 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff, 2563 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff, 2564 (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff}, 2565 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 2566 .field_opr2 = { 2567 1}, 2568 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 2569 }, 2570 { 2571 .description = "l4_dport_en", 2572 .field_bit_size = 1, 2573 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 2574 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 2575 .field_opr1 = { 2576 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, 2577 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff, 2578 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff, 2579 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff, 2580 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff, 2581 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff, 2582 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff, 2583 (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff}, 2584 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 2585 .field_opr2 = { 2586 1}, 2587 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 2588 }, 2589 { 2590 .description = "metadata_data", 2591 .field_bit_size = 16, 2592 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2593 }, 2594 { 2595 .description = "metadata_rsvd", 2596 .field_bit_size = 10, 2597 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2598 }, 2599 { 2600 .description = "metadata_op", 2601 .field_bit_size = 2, 2602 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2603 }, 2604 { 2605 .description = "metadata_prof", 2606 .field_bit_size = 4, 2607 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2608 }, 2609 { 2610 .description = "ivlan_tpid", 2611 .field_bit_size = 16, 2612 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2613 }, 2614 { 2615 .description = "ivlan_pri", 2616 .field_bit_size = 3, 2617 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2618 }, 2619 { 2620 .description = "ivlan_de", 2621 .field_bit_size = 1, 2622 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2623 }, 2624 { 2625 .description = "ivlan_vid", 2626 .field_bit_size = 12, 2627 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2628 }, 2629 { 2630 .description = "ovlan_tpid", 2631 .field_bit_size = 16, 2632 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2633 }, 2634 { 2635 .description = "ovlan_pri", 2636 .field_bit_size = 3, 2637 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2638 }, 2639 { 2640 .description = "ovlan_de", 2641 .field_bit_size = 1, 2642 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2643 }, 2644 { 2645 .description = "ovlan_vid", 2646 .field_bit_size = 12, 2647 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2648 }, 2649 { 2650 .description = "alt_pfid", 2651 .field_bit_size = 4, 2652 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2653 }, 2654 { 2655 .description = "alt_vid", 2656 .field_bit_size = 12, 2657 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2658 }, 2659 { 2660 .description = "ttl_rsvd", 2661 .field_bit_size = 12, 2662 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2663 }, 2664 { 2665 .description = "ttl_tl3_dec", 2666 .field_bit_size = 1, 2667 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2668 }, 2669 { 2670 .description = "ttl_il3_dec", 2671 .field_bit_size = 1, 2672 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2673 }, 2674 { 2675 .description = "ttl_tl3_rdir", 2676 .field_bit_size = 1, 2677 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2678 }, 2679 { 2680 .description = "ttl_il3_rdir", 2681 .field_bit_size = 1, 2682 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2683 }, 2684 { 2685 .description = "tun_new_prot", 2686 .field_bit_size = 16, 2687 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2688 }, 2689 { 2690 .description = "tun_ex_prot", 2691 .field_bit_size = 16, 2692 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2693 }, 2694 { 2695 .description = "tun_mv", 2696 .field_bit_size = 16, 2697 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2698 }, 2699 { 2700 .description = "reserved", 2701 .field_bit_size = 0, 2702 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2703 }, 2704 { 2705 .description = "l2_dmac", 2706 .field_bit_size = 48, 2707 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2708 }, 2709 { 2710 .description = "l2_smac", 2711 .field_bit_size = 48, 2712 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2713 }, 2714 { 2715 .description = "l3_sip_ipv6", 2716 .field_bit_size = 128, 2717 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2718 }, 2719 { 2720 .description = "l3_dip_ipv6", 2721 .field_bit_size = 128, 2722 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 2723 }, 2724 { 2725 .description = "l3_sip_ipv4", 2726 .field_bit_size = 32, 2727 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 2728 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 2729 .field_opr1 = { 2730 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 56) & 0xff, 2731 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 48) & 0xff, 2732 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 40) & 0xff, 2733 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 32) & 0xff, 2734 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 24) & 0xff, 2735 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 16) & 0xff, 2736 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 8) & 0xff, 2737 (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC & 0xff}, 2738 .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, 2739 .field_opr2 = { 2740 (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC >> 8) & 0xff, 2741 BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC & 0xff}, 2742 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 2743 }, 2744 { 2745 .description = "l3_dip_ipv4", 2746 .field_bit_size = 32, 2747 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 2748 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 2749 .field_opr1 = { 2750 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 56) & 0xff, 2751 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 48) & 0xff, 2752 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 40) & 0xff, 2753 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 32) & 0xff, 2754 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 24) & 0xff, 2755 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 16) & 0xff, 2756 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 8) & 0xff, 2757 (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST & 0xff}, 2758 .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, 2759 .field_opr2 = { 2760 (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST >> 8) & 0xff, 2761 BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST & 0xff}, 2762 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 2763 }, 2764 { 2765 .description = "l4_sport", 2766 .field_bit_size = 16, 2767 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 2768 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 2769 .field_opr1 = { 2770 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, 2771 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff, 2772 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff, 2773 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff, 2774 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff, 2775 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff, 2776 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff, 2777 (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff}, 2778 .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, 2779 .field_opr2 = { 2780 (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, 2781 BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff}, 2782 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 2783 }, 2784 { 2785 .description = "l4_dport", 2786 .field_bit_size = 16, 2787 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 2788 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 2789 .field_opr1 = { 2790 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, 2791 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff, 2792 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff, 2793 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff, 2794 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff, 2795 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff, 2796 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff, 2797 (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff}, 2798 .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, 2799 .field_opr2 = { 2800 (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, 2801 BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff}, 2802 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 2803 }, 2804 /* act_tid: 3, , table: int_full_act_record.0 */ 2805 { 2806 .description = "sp_rec_ptr", 2807 .field_bit_size = 16, 2808 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2809 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2810 }, 2811 { 2812 .description = "encap_ptr", 2813 .field_bit_size = 16, 2814 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2815 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2816 }, 2817 { 2818 .description = "mod_rec_ptr", 2819 .field_bit_size = 16, 2820 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2821 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 2822 .field_opr1 = { 2823 (BNXT_ULP_RF_IDX_MODIFY_PTR >> 8) & 0xff, 2824 BNXT_ULP_RF_IDX_MODIFY_PTR & 0xff} 2825 }, 2826 { 2827 .description = "rsvd1", 2828 .field_bit_size = 16, 2829 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2830 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2831 }, 2832 { 2833 .description = "rsvd0", 2834 .field_bit_size = 8, 2835 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2836 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2837 }, 2838 { 2839 .description = "decap_func", 2840 .field_bit_size = 5, 2841 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2842 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2843 }, 2844 { 2845 .description = "meter", 2846 .field_bit_size = 10, 2847 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2848 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2849 }, 2850 { 2851 .description = "stats_op", 2852 .field_bit_size = 1, 2853 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2854 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 2855 .field_opr1 = { 2856 1} 2857 }, 2858 { 2859 .description = "stats_ptr", 2860 .field_bit_size = 16, 2861 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2862 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 2863 .field_opr1 = { 2864 (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, 2865 BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} 2866 }, 2867 { 2868 .description = "vnic_or_vport", 2869 .field_bit_size = 11, 2870 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2871 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, 2872 .field_opr1 = { 2873 (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, 2874 BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff} 2875 }, 2876 { 2877 .description = "use_default", 2878 .field_bit_size = 1, 2879 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2880 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2881 }, 2882 { 2883 .description = "mirror", 2884 .field_bit_size = 4, 2885 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2886 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2887 }, 2888 { 2889 .description = "cond_copy", 2890 .field_bit_size = 1, 2891 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2892 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2893 }, 2894 { 2895 .description = "vlan_del_rpt", 2896 .field_bit_size = 2, 2897 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2898 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2899 }, 2900 { 2901 .description = "drop", 2902 .field_bit_size = 1, 2903 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2904 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2905 }, 2906 { 2907 .description = "hit", 2908 .field_bit_size = 1, 2909 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2910 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2911 }, 2912 { 2913 .description = "type", 2914 .field_bit_size = 3, 2915 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2916 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 2917 .field_opr1 = { 2918 1} 2919 }, 2920 /* act_tid: 4, , table: int_flow_counter_tbl.0 */ 2921 { 2922 .description = "count", 2923 .field_bit_size = 64, 2924 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2925 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2926 }, 2927 /* act_tid: 4, , table: int_vtag_encap_record.0 */ 2928 { 2929 .description = "ecv_valid", 2930 .field_bit_size = 1, 2931 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2932 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 2933 .field_opr1 = { 2934 1} 2935 }, 2936 { 2937 .description = "ecv_custom_en", 2938 .field_bit_size = 1, 2939 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2940 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2941 }, 2942 { 2943 .description = "ecv_vtag_type", 2944 .field_bit_size = 4, 2945 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2946 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 2947 .field_opr1 = { 2948 ULP_THOR_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI} 2949 }, 2950 { 2951 .description = "ecv_l2_en", 2952 .field_bit_size = 1, 2953 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2954 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2955 }, 2956 { 2957 .description = "ecv_l3_type", 2958 .field_bit_size = 3, 2959 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2960 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2961 }, 2962 { 2963 .description = "ecv_l4_type", 2964 .field_bit_size = 3, 2965 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2966 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2967 }, 2968 { 2969 .description = "ecv_tun_type", 2970 .field_bit_size = 3, 2971 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2972 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2973 }, 2974 { 2975 .description = "vtag_tpid", 2976 .field_bit_size = 16, 2977 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2978 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, 2979 .field_opr1 = { 2980 (BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN >> 8) & 0xff, 2981 BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff} 2982 }, 2983 { 2984 .description = "vtag_pcp", 2985 .field_bit_size = 3, 2986 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2987 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, 2988 .field_opr1 = { 2989 (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff, 2990 BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff} 2991 }, 2992 { 2993 .description = "vtag_de", 2994 .field_bit_size = 1, 2995 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 2996 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 2997 }, 2998 { 2999 .description = "vtag_vid", 3000 .field_bit_size = 12, 3001 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3002 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, 3003 .field_opr1 = { 3004 (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff, 3005 BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff} 3006 }, 3007 /* act_tid: 4, , table: mod_record.dec_ttl_egr */ 3008 { 3009 .description = "metadata_en", 3010 .field_bit_size = 1, 3011 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3012 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3013 }, 3014 { 3015 .description = "rem_ovlan", 3016 .field_bit_size = 1, 3017 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3018 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3019 }, 3020 { 3021 .description = "rem_ivlan", 3022 .field_bit_size = 1, 3023 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3024 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3025 }, 3026 { 3027 .description = "rep_add_ivlan", 3028 .field_bit_size = 1, 3029 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3030 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3031 }, 3032 { 3033 .description = "rep_add_ovlan", 3034 .field_bit_size = 1, 3035 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3036 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3037 }, 3038 { 3039 .description = "ttl_update", 3040 .field_bit_size = 1, 3041 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3042 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 3043 .field_opr1 = { 3044 1} 3045 }, 3046 { 3047 .description = "tun_md_en", 3048 .field_bit_size = 1, 3049 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3050 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3051 }, 3052 { 3053 .description = "reserved_en", 3054 .field_bit_size = 1, 3055 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3056 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3057 }, 3058 { 3059 .description = "l2_dmac_en", 3060 .field_bit_size = 1, 3061 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3062 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3063 }, 3064 { 3065 .description = "l2_smac_en", 3066 .field_bit_size = 1, 3067 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3068 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3069 }, 3070 { 3071 .description = "l3_sip_ipv6_en", 3072 .field_bit_size = 1, 3073 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3074 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3075 }, 3076 { 3077 .description = "l3_dip_ipv6_en", 3078 .field_bit_size = 1, 3079 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3080 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3081 }, 3082 { 3083 .description = "l3_sip_ipv4_en", 3084 .field_bit_size = 1, 3085 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3086 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3087 }, 3088 { 3089 .description = "l3_dip_ipv4_en", 3090 .field_bit_size = 1, 3091 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3092 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3093 }, 3094 { 3095 .description = "l4_sport_en", 3096 .field_bit_size = 1, 3097 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3098 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3099 }, 3100 { 3101 .description = "l4_dport_en", 3102 .field_bit_size = 1, 3103 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3104 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3105 }, 3106 { 3107 .description = "metadata_data", 3108 .field_bit_size = 16, 3109 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3110 }, 3111 { 3112 .description = "metadata_rsvd", 3113 .field_bit_size = 10, 3114 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3115 }, 3116 { 3117 .description = "metadata_op", 3118 .field_bit_size = 2, 3119 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3120 }, 3121 { 3122 .description = "metadata_prof", 3123 .field_bit_size = 4, 3124 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3125 }, 3126 { 3127 .description = "ivlan_tpid", 3128 .field_bit_size = 16, 3129 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3130 }, 3131 { 3132 .description = "ivlan_pri", 3133 .field_bit_size = 3, 3134 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3135 }, 3136 { 3137 .description = "ivlan_de", 3138 .field_bit_size = 1, 3139 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3140 }, 3141 { 3142 .description = "ivlan_vid", 3143 .field_bit_size = 12, 3144 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3145 }, 3146 { 3147 .description = "ovlan_tpid", 3148 .field_bit_size = 16, 3149 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3150 }, 3151 { 3152 .description = "ovlan_pri", 3153 .field_bit_size = 3, 3154 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3155 }, 3156 { 3157 .description = "ovlan_de", 3158 .field_bit_size = 1, 3159 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3160 }, 3161 { 3162 .description = "ovlan_vid", 3163 .field_bit_size = 12, 3164 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3165 }, 3166 { 3167 .description = "alt_pfid", 3168 .field_bit_size = 4, 3169 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3170 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3171 }, 3172 { 3173 .description = "alt_vid", 3174 .field_bit_size = 12, 3175 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3176 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3177 }, 3178 { 3179 .description = "ttl_rsvd", 3180 .field_bit_size = 12, 3181 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3182 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3183 }, 3184 { 3185 .description = "ttl_tl3_dec", 3186 .field_bit_size = 1, 3187 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3188 .field_src1 = BNXT_ULP_FIELD_SRC_CF, 3189 .field_opr1 = { 3190 (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, 3191 BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff} 3192 }, 3193 { 3194 .description = "ttl_il3_dec", 3195 .field_bit_size = 1, 3196 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3197 .field_src1 = BNXT_ULP_FIELD_SRC_CF, 3198 .field_opr1 = { 3199 (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, 3200 BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff} 3201 }, 3202 { 3203 .description = "ttl_tl3_rdir", 3204 .field_bit_size = 1, 3205 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3206 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3207 }, 3208 { 3209 .description = "ttl_il3_rdir", 3210 .field_bit_size = 1, 3211 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3212 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3213 }, 3214 { 3215 .description = "tun_new_prot", 3216 .field_bit_size = 16, 3217 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3218 }, 3219 { 3220 .description = "tun_ex_prot", 3221 .field_bit_size = 16, 3222 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3223 }, 3224 { 3225 .description = "tun_mv", 3226 .field_bit_size = 16, 3227 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3228 }, 3229 { 3230 .description = "reserved", 3231 .field_bit_size = 0, 3232 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3233 }, 3234 { 3235 .description = "l2_dmac", 3236 .field_bit_size = 48, 3237 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3238 }, 3239 { 3240 .description = "l2_smac", 3241 .field_bit_size = 48, 3242 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3243 }, 3244 { 3245 .description = "l3_sip_ipv6", 3246 .field_bit_size = 128, 3247 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3248 }, 3249 { 3250 .description = "l3_dip_ipv6", 3251 .field_bit_size = 128, 3252 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3253 }, 3254 { 3255 .description = "l3_sip_ipv4", 3256 .field_bit_size = 32, 3257 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3258 }, 3259 { 3260 .description = "l3_dip_ipv4", 3261 .field_bit_size = 32, 3262 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3263 }, 3264 { 3265 .description = "l4_sport", 3266 .field_bit_size = 16, 3267 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3268 }, 3269 { 3270 .description = "l4_dport", 3271 .field_bit_size = 16, 3272 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3273 }, 3274 /* act_tid: 4, , table: int_full_act_record.0 */ 3275 { 3276 .description = "sp_rec_ptr", 3277 .field_bit_size = 16, 3278 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3279 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3280 }, 3281 { 3282 .description = "encap_ptr", 3283 .field_bit_size = 16, 3284 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3285 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 3286 .field_opr1 = { 3287 (BNXT_ULP_RF_IDX_ENCAP_PTR_0 >> 8) & 0xff, 3288 BNXT_ULP_RF_IDX_ENCAP_PTR_0 & 0xff} 3289 }, 3290 { 3291 .description = "mod_rec_ptr", 3292 .field_bit_size = 16, 3293 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3294 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 3295 .field_opr1 = { 3296 (BNXT_ULP_RF_IDX_MODIFY_PTR >> 8) & 0xff, 3297 BNXT_ULP_RF_IDX_MODIFY_PTR & 0xff} 3298 }, 3299 { 3300 .description = "rsvd1", 3301 .field_bit_size = 16, 3302 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3303 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3304 }, 3305 { 3306 .description = "rsvd0", 3307 .field_bit_size = 8, 3308 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3309 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3310 }, 3311 { 3312 .description = "decap_func", 3313 .field_bit_size = 5, 3314 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3315 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3316 }, 3317 { 3318 .description = "meter", 3319 .field_bit_size = 10, 3320 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3321 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3322 }, 3323 { 3324 .description = "stats_op", 3325 .field_bit_size = 1, 3326 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3327 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 3328 .field_opr1 = { 3329 1} 3330 }, 3331 { 3332 .description = "stats_ptr", 3333 .field_bit_size = 16, 3334 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3335 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 3336 .field_opr1 = { 3337 (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, 3338 BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} 3339 }, 3340 { 3341 .description = "vnic_or_vport", 3342 .field_bit_size = 11, 3343 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3344 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, 3345 .field_opr1 = { 3346 (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, 3347 BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff} 3348 }, 3349 { 3350 .description = "use_default", 3351 .field_bit_size = 1, 3352 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3353 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3354 }, 3355 { 3356 .description = "mirror", 3357 .field_bit_size = 4, 3358 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3359 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3360 }, 3361 { 3362 .description = "cond_copy", 3363 .field_bit_size = 1, 3364 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3365 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3366 }, 3367 { 3368 .description = "vlan_del_rpt", 3369 .field_bit_size = 2, 3370 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3371 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3372 }, 3373 { 3374 .description = "drop", 3375 .field_bit_size = 1, 3376 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3377 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 3378 .field_opr1 = { 3379 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 56) & 0xff, 3380 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 48) & 0xff, 3381 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 40) & 0xff, 3382 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 32) & 0xff, 3383 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 24) & 0xff, 3384 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 16) & 0xff, 3385 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 8) & 0xff, 3386 (uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff} 3387 }, 3388 { 3389 .description = "hit", 3390 .field_bit_size = 1, 3391 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3392 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3393 }, 3394 { 3395 .description = "type", 3396 .field_bit_size = 3, 3397 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3398 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 3399 .field_opr1 = { 3400 1} 3401 }, 3402 /* act_tid: 4, , table: int_compact_act_record.0 */ 3403 { 3404 .description = "rsvd0", 3405 .field_bit_size = 8, 3406 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3407 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3408 }, 3409 { 3410 .description = "decap_func", 3411 .field_bit_size = 5, 3412 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3413 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3414 }, 3415 { 3416 .description = "meter", 3417 .field_bit_size = 10, 3418 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3419 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3420 }, 3421 { 3422 .description = "stats_op", 3423 .field_bit_size = 1, 3424 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3425 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 3426 .field_opr1 = { 3427 1} 3428 }, 3429 { 3430 .description = "stats_ptr", 3431 .field_bit_size = 16, 3432 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3433 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 3434 .field_opr1 = { 3435 (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, 3436 BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} 3437 }, 3438 { 3439 .description = "vnic_or_vport", 3440 .field_bit_size = 11, 3441 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3442 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, 3443 .field_opr1 = { 3444 (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, 3445 BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff} 3446 }, 3447 { 3448 .description = "use_default", 3449 .field_bit_size = 1, 3450 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3451 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3452 }, 3453 { 3454 .description = "mirror", 3455 .field_bit_size = 4, 3456 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3457 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3458 }, 3459 { 3460 .description = "cond_copy", 3461 .field_bit_size = 1, 3462 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3463 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3464 }, 3465 { 3466 .description = "vlan_del_rpt", 3467 .field_bit_size = 2, 3468 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3469 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3470 }, 3471 { 3472 .description = "drop", 3473 .field_bit_size = 1, 3474 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3475 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 3476 .field_opr1 = { 3477 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 56) & 0xff, 3478 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 48) & 0xff, 3479 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 40) & 0xff, 3480 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 32) & 0xff, 3481 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 24) & 0xff, 3482 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 16) & 0xff, 3483 ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 8) & 0xff, 3484 (uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff} 3485 }, 3486 { 3487 .description = "hit", 3488 .field_bit_size = 1, 3489 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3490 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3491 }, 3492 { 3493 .description = "type", 3494 .field_bit_size = 3, 3495 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3496 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3497 }, 3498 /* act_tid: 5, , table: int_flow_counter_tbl.0 */ 3499 { 3500 .description = "count", 3501 .field_bit_size = 64, 3502 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3503 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3504 }, 3505 /* act_tid: 5, , table: mod_record.ing_ttl */ 3506 { 3507 .description = "metadata_en", 3508 .field_bit_size = 1, 3509 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3510 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3511 }, 3512 { 3513 .description = "rem_ovlan", 3514 .field_bit_size = 1, 3515 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3516 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3517 }, 3518 { 3519 .description = "rem_ivlan", 3520 .field_bit_size = 1, 3521 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3522 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3523 }, 3524 { 3525 .description = "rep_add_ivlan", 3526 .field_bit_size = 1, 3527 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3528 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3529 }, 3530 { 3531 .description = "rep_add_ovlan", 3532 .field_bit_size = 1, 3533 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3534 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3535 }, 3536 { 3537 .description = "ttl_update", 3538 .field_bit_size = 1, 3539 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3540 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 3541 .field_opr1 = { 3542 1} 3543 }, 3544 { 3545 .description = "tun_md_en", 3546 .field_bit_size = 1, 3547 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3548 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3549 }, 3550 { 3551 .description = "reserved_en", 3552 .field_bit_size = 1, 3553 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3554 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3555 }, 3556 { 3557 .description = "l2_dmac_en", 3558 .field_bit_size = 1, 3559 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3560 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3561 }, 3562 { 3563 .description = "l2_smac_en", 3564 .field_bit_size = 1, 3565 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3566 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3567 }, 3568 { 3569 .description = "l3_sip_ipv6_en", 3570 .field_bit_size = 1, 3571 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3572 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3573 }, 3574 { 3575 .description = "l3_dip_ipv6_en", 3576 .field_bit_size = 1, 3577 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3578 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3579 }, 3580 { 3581 .description = "l3_sip_ipv4_en", 3582 .field_bit_size = 1, 3583 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 3584 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 3585 .field_opr1 = { 3586 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 56) & 0xff, 3587 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 48) & 0xff, 3588 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 40) & 0xff, 3589 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 32) & 0xff, 3590 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 24) & 0xff, 3591 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 16) & 0xff, 3592 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 8) & 0xff, 3593 (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC & 0xff}, 3594 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 3595 .field_opr2 = { 3596 1}, 3597 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 3598 }, 3599 { 3600 .description = "l3_dip_ipv4_en", 3601 .field_bit_size = 1, 3602 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 3603 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 3604 .field_opr1 = { 3605 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 56) & 0xff, 3606 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 48) & 0xff, 3607 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 40) & 0xff, 3608 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 32) & 0xff, 3609 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 24) & 0xff, 3610 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 16) & 0xff, 3611 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 8) & 0xff, 3612 (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST & 0xff}, 3613 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 3614 .field_opr2 = { 3615 1}, 3616 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 3617 }, 3618 { 3619 .description = "l4_sport_en", 3620 .field_bit_size = 1, 3621 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 3622 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 3623 .field_opr1 = { 3624 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, 3625 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff, 3626 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff, 3627 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff, 3628 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff, 3629 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff, 3630 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff, 3631 (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff}, 3632 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 3633 .field_opr2 = { 3634 1}, 3635 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 3636 }, 3637 { 3638 .description = "l4_dport_en", 3639 .field_bit_size = 1, 3640 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 3641 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 3642 .field_opr1 = { 3643 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, 3644 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff, 3645 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff, 3646 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff, 3647 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff, 3648 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff, 3649 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff, 3650 (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff}, 3651 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 3652 .field_opr2 = { 3653 1}, 3654 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 3655 }, 3656 { 3657 .description = "metadata_data", 3658 .field_bit_size = 16, 3659 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3660 }, 3661 { 3662 .description = "metadata_rsvd", 3663 .field_bit_size = 10, 3664 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3665 }, 3666 { 3667 .description = "metadata_op", 3668 .field_bit_size = 2, 3669 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3670 }, 3671 { 3672 .description = "metadata_prof", 3673 .field_bit_size = 4, 3674 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3675 }, 3676 { 3677 .description = "ivlan_tpid", 3678 .field_bit_size = 16, 3679 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3680 }, 3681 { 3682 .description = "ivlan_pri", 3683 .field_bit_size = 3, 3684 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3685 }, 3686 { 3687 .description = "ivlan_de", 3688 .field_bit_size = 1, 3689 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3690 }, 3691 { 3692 .description = "ivlan_vid", 3693 .field_bit_size = 12, 3694 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3695 }, 3696 { 3697 .description = "ovlan_tpid", 3698 .field_bit_size = 16, 3699 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3700 }, 3701 { 3702 .description = "ovlan_pri", 3703 .field_bit_size = 3, 3704 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3705 }, 3706 { 3707 .description = "ovlan_de", 3708 .field_bit_size = 1, 3709 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3710 }, 3711 { 3712 .description = "ovlan_vid", 3713 .field_bit_size = 12, 3714 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3715 }, 3716 { 3717 .description = "alt_pfid", 3718 .field_bit_size = 4, 3719 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3720 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3721 }, 3722 { 3723 .description = "alt_vid", 3724 .field_bit_size = 12, 3725 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3726 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3727 }, 3728 { 3729 .description = "ttl_rsvd", 3730 .field_bit_size = 12, 3731 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3732 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3733 }, 3734 { 3735 .description = "ttl_tl3_dec", 3736 .field_bit_size = 1, 3737 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3738 .field_src1 = BNXT_ULP_FIELD_SRC_CF, 3739 .field_opr1 = { 3740 (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, 3741 BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff} 3742 }, 3743 { 3744 .description = "ttl_il3_dec", 3745 .field_bit_size = 1, 3746 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3747 .field_src1 = BNXT_ULP_FIELD_SRC_CF, 3748 .field_opr1 = { 3749 (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, 3750 BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff} 3751 }, 3752 { 3753 .description = "ttl_tl3_rdir", 3754 .field_bit_size = 1, 3755 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3756 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3757 }, 3758 { 3759 .description = "ttl_il3_rdir", 3760 .field_bit_size = 1, 3761 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3762 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3763 }, 3764 { 3765 .description = "tun_new_prot", 3766 .field_bit_size = 16, 3767 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3768 }, 3769 { 3770 .description = "tun_ex_prot", 3771 .field_bit_size = 16, 3772 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3773 }, 3774 { 3775 .description = "tun_mv", 3776 .field_bit_size = 16, 3777 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3778 }, 3779 { 3780 .description = "reserved", 3781 .field_bit_size = 0, 3782 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3783 }, 3784 { 3785 .description = "l2_dmac", 3786 .field_bit_size = 48, 3787 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3788 }, 3789 { 3790 .description = "l2_smac", 3791 .field_bit_size = 48, 3792 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3793 }, 3794 { 3795 .description = "l3_sip_ipv6", 3796 .field_bit_size = 128, 3797 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3798 }, 3799 { 3800 .description = "l3_dip_ipv6", 3801 .field_bit_size = 128, 3802 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 3803 }, 3804 { 3805 .description = "l3_sip_ipv4", 3806 .field_bit_size = 32, 3807 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 3808 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 3809 .field_opr1 = { 3810 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 56) & 0xff, 3811 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 48) & 0xff, 3812 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 40) & 0xff, 3813 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 32) & 0xff, 3814 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 24) & 0xff, 3815 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 16) & 0xff, 3816 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 8) & 0xff, 3817 (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC & 0xff}, 3818 .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, 3819 .field_opr2 = { 3820 (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC >> 8) & 0xff, 3821 BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC & 0xff}, 3822 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 3823 }, 3824 { 3825 .description = "l3_dip_ipv4", 3826 .field_bit_size = 32, 3827 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 3828 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 3829 .field_opr1 = { 3830 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 56) & 0xff, 3831 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 48) & 0xff, 3832 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 40) & 0xff, 3833 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 32) & 0xff, 3834 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 24) & 0xff, 3835 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 16) & 0xff, 3836 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 8) & 0xff, 3837 (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST & 0xff}, 3838 .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, 3839 .field_opr2 = { 3840 (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST >> 8) & 0xff, 3841 BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST & 0xff}, 3842 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 3843 }, 3844 { 3845 .description = "l4_sport", 3846 .field_bit_size = 16, 3847 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 3848 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 3849 .field_opr1 = { 3850 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, 3851 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff, 3852 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff, 3853 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff, 3854 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff, 3855 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff, 3856 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff, 3857 (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff}, 3858 .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, 3859 .field_opr2 = { 3860 (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, 3861 BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff}, 3862 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 3863 }, 3864 { 3865 .description = "l4_dport", 3866 .field_bit_size = 16, 3867 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 3868 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 3869 .field_opr1 = { 3870 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, 3871 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff, 3872 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff, 3873 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff, 3874 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff, 3875 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff, 3876 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff, 3877 (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff}, 3878 .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, 3879 .field_opr2 = { 3880 (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, 3881 BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff}, 3882 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 3883 }, 3884 /* act_tid: 5, , table: mod_record.ing_no_ttl */ 3885 { 3886 .description = "metadata_en", 3887 .field_bit_size = 1, 3888 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3889 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3890 }, 3891 { 3892 .description = "rem_ovlan", 3893 .field_bit_size = 1, 3894 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3895 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3896 }, 3897 { 3898 .description = "rem_ivlan", 3899 .field_bit_size = 1, 3900 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3901 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3902 }, 3903 { 3904 .description = "rep_add_ivlan", 3905 .field_bit_size = 1, 3906 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3907 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3908 }, 3909 { 3910 .description = "rep_add_ovlan", 3911 .field_bit_size = 1, 3912 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3913 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3914 }, 3915 { 3916 .description = "ttl_update", 3917 .field_bit_size = 1, 3918 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3919 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3920 }, 3921 { 3922 .description = "tun_md_en", 3923 .field_bit_size = 1, 3924 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3925 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3926 }, 3927 { 3928 .description = "reserved_en", 3929 .field_bit_size = 1, 3930 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3931 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3932 }, 3933 { 3934 .description = "l2_dmac_en", 3935 .field_bit_size = 1, 3936 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3937 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3938 }, 3939 { 3940 .description = "l2_smac_en", 3941 .field_bit_size = 1, 3942 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3943 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3944 }, 3945 { 3946 .description = "l3_sip_ipv6_en", 3947 .field_bit_size = 1, 3948 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3949 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3950 }, 3951 { 3952 .description = "l3_dip_ipv6_en", 3953 .field_bit_size = 1, 3954 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 3955 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 3956 }, 3957 { 3958 .description = "l3_sip_ipv4_en", 3959 .field_bit_size = 1, 3960 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 3961 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 3962 .field_opr1 = { 3963 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 56) & 0xff, 3964 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 48) & 0xff, 3965 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 40) & 0xff, 3966 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 32) & 0xff, 3967 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 24) & 0xff, 3968 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 16) & 0xff, 3969 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 8) & 0xff, 3970 (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC & 0xff}, 3971 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 3972 .field_opr2 = { 3973 1}, 3974 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 3975 }, 3976 { 3977 .description = "l3_dip_ipv4_en", 3978 .field_bit_size = 1, 3979 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 3980 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 3981 .field_opr1 = { 3982 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 56) & 0xff, 3983 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 48) & 0xff, 3984 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 40) & 0xff, 3985 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 32) & 0xff, 3986 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 24) & 0xff, 3987 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 16) & 0xff, 3988 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 8) & 0xff, 3989 (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST & 0xff}, 3990 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 3991 .field_opr2 = { 3992 1}, 3993 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 3994 }, 3995 { 3996 .description = "l4_sport_en", 3997 .field_bit_size = 1, 3998 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 3999 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 4000 .field_opr1 = { 4001 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, 4002 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff, 4003 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff, 4004 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff, 4005 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff, 4006 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff, 4007 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff, 4008 (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff}, 4009 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 4010 .field_opr2 = { 4011 1}, 4012 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 4013 }, 4014 { 4015 .description = "l4_dport_en", 4016 .field_bit_size = 1, 4017 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 4018 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 4019 .field_opr1 = { 4020 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, 4021 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff, 4022 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff, 4023 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff, 4024 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff, 4025 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff, 4026 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff, 4027 (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff}, 4028 .field_src2 = BNXT_ULP_FIELD_SRC_CONST, 4029 .field_opr2 = { 4030 1}, 4031 .field_src3 = BNXT_ULP_FIELD_SRC_ZERO 4032 }, 4033 { 4034 .description = "metadata_data", 4035 .field_bit_size = 16, 4036 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4037 }, 4038 { 4039 .description = "metadata_rsvd", 4040 .field_bit_size = 10, 4041 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4042 }, 4043 { 4044 .description = "metadata_op", 4045 .field_bit_size = 2, 4046 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4047 }, 4048 { 4049 .description = "metadata_prof", 4050 .field_bit_size = 4, 4051 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4052 }, 4053 { 4054 .description = "ivlan_tpid", 4055 .field_bit_size = 16, 4056 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4057 }, 4058 { 4059 .description = "ivlan_pri", 4060 .field_bit_size = 3, 4061 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4062 }, 4063 { 4064 .description = "ivlan_de", 4065 .field_bit_size = 1, 4066 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4067 }, 4068 { 4069 .description = "ivlan_vid", 4070 .field_bit_size = 12, 4071 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4072 }, 4073 { 4074 .description = "ovlan_tpid", 4075 .field_bit_size = 16, 4076 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4077 }, 4078 { 4079 .description = "ovlan_pri", 4080 .field_bit_size = 3, 4081 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4082 }, 4083 { 4084 .description = "ovlan_de", 4085 .field_bit_size = 1, 4086 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4087 }, 4088 { 4089 .description = "ovlan_vid", 4090 .field_bit_size = 12, 4091 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4092 }, 4093 { 4094 .description = "alt_pfid", 4095 .field_bit_size = 4, 4096 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4097 }, 4098 { 4099 .description = "alt_vid", 4100 .field_bit_size = 12, 4101 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4102 }, 4103 { 4104 .description = "ttl_rsvd", 4105 .field_bit_size = 12, 4106 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4107 }, 4108 { 4109 .description = "ttl_tl3_dec", 4110 .field_bit_size = 1, 4111 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4112 }, 4113 { 4114 .description = "ttl_il3_dec", 4115 .field_bit_size = 1, 4116 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4117 }, 4118 { 4119 .description = "ttl_tl3_rdir", 4120 .field_bit_size = 1, 4121 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4122 }, 4123 { 4124 .description = "ttl_il3_rdir", 4125 .field_bit_size = 1, 4126 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4127 }, 4128 { 4129 .description = "tun_new_prot", 4130 .field_bit_size = 16, 4131 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4132 }, 4133 { 4134 .description = "tun_ex_prot", 4135 .field_bit_size = 16, 4136 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4137 }, 4138 { 4139 .description = "tun_mv", 4140 .field_bit_size = 16, 4141 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4142 }, 4143 { 4144 .description = "reserved", 4145 .field_bit_size = 0, 4146 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4147 }, 4148 { 4149 .description = "l2_dmac", 4150 .field_bit_size = 48, 4151 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4152 }, 4153 { 4154 .description = "l2_smac", 4155 .field_bit_size = 48, 4156 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4157 }, 4158 { 4159 .description = "l3_sip_ipv6", 4160 .field_bit_size = 128, 4161 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4162 }, 4163 { 4164 .description = "l3_dip_ipv6", 4165 .field_bit_size = 128, 4166 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4167 }, 4168 { 4169 .description = "l3_sip_ipv4", 4170 .field_bit_size = 32, 4171 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 4172 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 4173 .field_opr1 = { 4174 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 56) & 0xff, 4175 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 48) & 0xff, 4176 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 40) & 0xff, 4177 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 32) & 0xff, 4178 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 24) & 0xff, 4179 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 16) & 0xff, 4180 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC >> 8) & 0xff, 4181 (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_SRC & 0xff}, 4182 .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, 4183 .field_opr2 = { 4184 (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC >> 8) & 0xff, 4185 BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC & 0xff}, 4186 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 4187 }, 4188 { 4189 .description = "l3_dip_ipv4", 4190 .field_bit_size = 32, 4191 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 4192 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 4193 .field_opr1 = { 4194 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 56) & 0xff, 4195 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 48) & 0xff, 4196 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 40) & 0xff, 4197 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 32) & 0xff, 4198 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 24) & 0xff, 4199 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 16) & 0xff, 4200 ((uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST >> 8) & 0xff, 4201 (uint64_t)BNXT_ULP_ACT_BIT_SET_IPV4_DST & 0xff}, 4202 .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, 4203 .field_opr2 = { 4204 (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST >> 8) & 0xff, 4205 BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST & 0xff}, 4206 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 4207 }, 4208 { 4209 .description = "l4_sport", 4210 .field_bit_size = 16, 4211 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 4212 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 4213 .field_opr1 = { 4214 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, 4215 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 48) & 0xff, 4216 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 40) & 0xff, 4217 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 32) & 0xff, 4218 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 24) & 0xff, 4219 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 16) & 0xff, 4220 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 8) & 0xff, 4221 (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC & 0xff}, 4222 .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, 4223 .field_opr2 = { 4224 (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, 4225 BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff}, 4226 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 4227 }, 4228 { 4229 .description = "l4_dport", 4230 .field_bit_size = 16, 4231 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 4232 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 4233 .field_opr1 = { 4234 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, 4235 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 48) & 0xff, 4236 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 40) & 0xff, 4237 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 32) & 0xff, 4238 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 24) & 0xff, 4239 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 16) & 0xff, 4240 ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 8) & 0xff, 4241 (uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST & 0xff}, 4242 .field_src2 = BNXT_ULP_FIELD_SRC_ACT_PROP, 4243 .field_opr2 = { 4244 (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, 4245 BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff}, 4246 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 4247 }, 4248 /* act_tid: 5, , table: int_full_act_record.0 */ 4249 { 4250 .description = "sp_rec_ptr", 4251 .field_bit_size = 16, 4252 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4253 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 4254 }, 4255 { 4256 .description = "encap_ptr", 4257 .field_bit_size = 16, 4258 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4259 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 4260 }, 4261 { 4262 .description = "mod_rec_ptr", 4263 .field_bit_size = 16, 4264 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4265 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 4266 .field_opr1 = { 4267 (BNXT_ULP_RF_IDX_MODIFY_PTR >> 8) & 0xff, 4268 BNXT_ULP_RF_IDX_MODIFY_PTR & 0xff} 4269 }, 4270 { 4271 .description = "rsvd1", 4272 .field_bit_size = 16, 4273 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4274 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 4275 }, 4276 { 4277 .description = "rsvd0", 4278 .field_bit_size = 8, 4279 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4280 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 4281 }, 4282 { 4283 .description = "decap_func", 4284 .field_bit_size = 5, 4285 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4286 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 4287 }, 4288 { 4289 .description = "meter", 4290 .field_bit_size = 10, 4291 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4292 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 4293 }, 4294 { 4295 .description = "stats_op", 4296 .field_bit_size = 1, 4297 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4298 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, 4299 .field_opr1 = { 4300 ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff, 4301 ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff, 4302 ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff, 4303 ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff, 4304 ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff, 4305 ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff, 4306 ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff, 4307 (uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff} 4308 }, 4309 { 4310 .description = "stats_ptr", 4311 .field_bit_size = 16, 4312 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4313 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 4314 .field_opr1 = { 4315 (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, 4316 BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} 4317 }, 4318 { 4319 .description = "vnic_or_vport", 4320 .field_bit_size = 11, 4321 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4322 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, 4323 .field_opr1 = { 4324 (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, 4325 BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff} 4326 }, 4327 { 4328 .description = "use_default", 4329 .field_bit_size = 1, 4330 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4331 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 4332 }, 4333 { 4334 .description = "mirror", 4335 .field_bit_size = 4, 4336 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4337 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 4338 }, 4339 { 4340 .description = "cond_copy", 4341 .field_bit_size = 1, 4342 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4343 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 4344 }, 4345 { 4346 .description = "vlan_del_rpt", 4347 .field_bit_size = 2, 4348 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4349 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 4350 }, 4351 { 4352 .description = "drop", 4353 .field_bit_size = 1, 4354 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4355 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 4356 }, 4357 { 4358 .description = "hit", 4359 .field_bit_size = 1, 4360 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4361 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 4362 }, 4363 { 4364 .description = "type", 4365 .field_bit_size = 3, 4366 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4367 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 4368 .field_opr1 = { 4369 1} 4370 }, 4371 /* act_tid: 6, , table: int_flow_counter_tbl.0 */ 4372 { 4373 .description = "count", 4374 .field_bit_size = 64, 4375 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4376 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 4377 }, 4378 /* act_tid: 6, , table: sp_smac_ipv4.0 */ 4379 { 4380 .description = "smac", 4381 .field_bit_size = 48, 4382 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4383 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4384 .field_opr1 = { 4385 (BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff, 4386 BNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff} 4387 }, 4388 { 4389 .description = "ipv4_src_addr", 4390 .field_bit_size = 32, 4391 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4392 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4393 .field_opr1 = { 4394 (BNXT_ULP_ENC_FIELD_IPV4_SADDR >> 8) & 0xff, 4395 BNXT_ULP_ENC_FIELD_IPV4_SADDR & 0xff} 4396 }, 4397 { 4398 .description = "reserved", 4399 .field_bit_size = 48, 4400 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4401 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 4402 }, 4403 /* act_tid: 6, , table: source_property_cache.wr */ 4404 { 4405 .description = "rid", 4406 .field_bit_size = 32, 4407 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4408 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 4409 .field_opr1 = { 4410 (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, 4411 BNXT_ULP_RF_IDX_RID & 0xff} 4412 }, 4413 { 4414 .description = "sp_rec_ptr", 4415 .field_bit_size = 16, 4416 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4417 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 4418 .field_opr1 = { 4419 (BNXT_ULP_RF_IDX_MAIN_SP_PTR >> 8) & 0xff, 4420 BNXT_ULP_RF_IDX_MAIN_SP_PTR & 0xff} 4421 }, 4422 /* act_tid: 6, , table: sp_smac_ipv6.0 */ 4423 { 4424 .description = "smac", 4425 .field_bit_size = 48, 4426 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4427 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4428 .field_opr1 = { 4429 (BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff, 4430 BNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff} 4431 }, 4432 { 4433 .description = "ipv6_src_addr", 4434 .field_bit_size = 128, 4435 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4436 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4437 .field_opr1 = { 4438 (BNXT_ULP_ENC_FIELD_IPV6_SADDR >> 8) & 0xff, 4439 BNXT_ULP_ENC_FIELD_IPV6_SADDR & 0xff} 4440 }, 4441 { 4442 .description = "reserved", 4443 .field_bit_size = 16, 4444 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4445 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 4446 }, 4447 /* act_tid: 6, , table: int_tun_encap_record.ipv4_vxlan */ 4448 { 4449 .description = "ecv_valid", 4450 .field_bit_size = 1, 4451 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4452 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 4453 .field_opr1 = { 4454 ULP_THOR_SYM_ECV_VALID_YES} 4455 }, 4456 { 4457 .description = "ecv_custom_en", 4458 .field_bit_size = 1, 4459 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4460 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 4461 }, 4462 { 4463 .description = "ecv_vtag_type", 4464 .field_bit_size = 4, 4465 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4466 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, 4467 .field_opr1 = { 4468 (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff, 4469 BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff} 4470 }, 4471 { 4472 .description = "ecv_l2_en", 4473 .field_bit_size = 1, 4474 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4475 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 4476 .field_opr1 = { 4477 ULP_THOR_SYM_ECV_L2_EN_YES} 4478 }, 4479 { 4480 .description = "ecv_l3_type", 4481 .field_bit_size = 3, 4482 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4483 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, 4484 .field_opr1 = { 4485 (BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff, 4486 BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff} 4487 }, 4488 { 4489 .description = "ecv_l4_type", 4490 .field_bit_size = 3, 4491 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4492 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 4493 .field_opr1 = { 4494 ULP_THOR_SYM_ECV_L4_TYPE_UDP_CSUM} 4495 }, 4496 { 4497 .description = "ecv_tun_type", 4498 .field_bit_size = 3, 4499 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4500 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 4501 .field_opr1 = { 4502 ULP_THOR_SYM_ECV_TUN_TYPE_VXLAN} 4503 }, 4504 { 4505 .description = "enc_eth_dmac", 4506 .field_bit_size = 48, 4507 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4508 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4509 .field_opr1 = { 4510 (BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff, 4511 BNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff} 4512 }, 4513 { 4514 .description = "enc_o_vlan_tag", 4515 .field_bit_size = 16, 4516 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 4517 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, 4518 .field_opr1 = { 4519 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, 4520 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, 4521 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, 4522 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, 4523 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, 4524 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, 4525 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, 4526 (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, 4527 .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4528 .field_opr2 = { 4529 (BNXT_ULP_ENC_FIELD_O_VLAN_TCI >> 8) & 0xff, 4530 BNXT_ULP_ENC_FIELD_O_VLAN_TCI & 0xff}, 4531 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 4532 }, 4533 { 4534 .description = "enc_o_vlan_type", 4535 .field_bit_size = 16, 4536 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 4537 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, 4538 .field_opr1 = { 4539 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, 4540 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, 4541 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, 4542 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, 4543 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, 4544 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, 4545 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, 4546 (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, 4547 .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4548 .field_opr2 = { 4549 (BNXT_ULP_ENC_FIELD_O_VLAN_TYPE >> 8) & 0xff, 4550 BNXT_ULP_ENC_FIELD_O_VLAN_TYPE & 0xff}, 4551 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 4552 }, 4553 { 4554 .description = "enc_i_vlan_tag", 4555 .field_bit_size = 16, 4556 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 4557 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, 4558 .field_opr1 = { 4559 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff, 4560 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff, 4561 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff, 4562 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff, 4563 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff, 4564 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff, 4565 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff, 4566 (uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff}, 4567 .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4568 .field_opr2 = { 4569 (BNXT_ULP_ENC_FIELD_I_VLAN_TCI >> 8) & 0xff, 4570 BNXT_ULP_ENC_FIELD_I_VLAN_TCI & 0xff}, 4571 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 4572 }, 4573 { 4574 .description = "enc_i_vlan_type", 4575 .field_bit_size = 16, 4576 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 4577 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, 4578 .field_opr1 = { 4579 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff, 4580 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff, 4581 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff, 4582 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff, 4583 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff, 4584 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff, 4585 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff, 4586 (uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff}, 4587 .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4588 .field_opr2 = { 4589 (BNXT_ULP_ENC_FIELD_I_VLAN_TYPE >> 8) & 0xff, 4590 BNXT_ULP_ENC_FIELD_I_VLAN_TYPE & 0xff}, 4591 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 4592 }, 4593 { 4594 .description = "enc_ipv4_ihl", 4595 .field_bit_size = 8, 4596 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4597 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4598 .field_opr1 = { 4599 (BNXT_ULP_ENC_FIELD_IPV4_IHL >> 8) & 0xff, 4600 BNXT_ULP_ENC_FIELD_IPV4_IHL & 0xff} 4601 }, 4602 { 4603 .description = "enc_ipv4_tos", 4604 .field_bit_size = 8, 4605 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4606 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4607 .field_opr1 = { 4608 (BNXT_ULP_ENC_FIELD_IPV4_TOS >> 8) & 0xff, 4609 BNXT_ULP_ENC_FIELD_IPV4_TOS & 0xff} 4610 }, 4611 { 4612 .description = "enc_ipv4_pkt_id", 4613 .field_bit_size = 16, 4614 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4615 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4616 .field_opr1 = { 4617 (BNXT_ULP_ENC_FIELD_IPV4_PKT_ID >> 8) & 0xff, 4618 BNXT_ULP_ENC_FIELD_IPV4_PKT_ID & 0xff} 4619 }, 4620 { 4621 .description = "enc_ipv4_frag", 4622 .field_bit_size = 16, 4623 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4624 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4625 .field_opr1 = { 4626 (BNXT_ULP_ENC_FIELD_IPV4_FRAG >> 8) & 0xff, 4627 BNXT_ULP_ENC_FIELD_IPV4_FRAG & 0xff} 4628 }, 4629 { 4630 .description = "enc_ipv4_ttl", 4631 .field_bit_size = 8, 4632 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4633 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4634 .field_opr1 = { 4635 (BNXT_ULP_ENC_FIELD_IPV4_TTL >> 8) & 0xff, 4636 BNXT_ULP_ENC_FIELD_IPV4_TTL & 0xff} 4637 }, 4638 { 4639 .description = "enc_ipv4_proto", 4640 .field_bit_size = 8, 4641 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4642 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4643 .field_opr1 = { 4644 (BNXT_ULP_ENC_FIELD_IPV4_PROTO >> 8) & 0xff, 4645 BNXT_ULP_ENC_FIELD_IPV4_PROTO & 0xff} 4646 }, 4647 { 4648 .description = "enc_ipv4_daddr", 4649 .field_bit_size = 32, 4650 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4651 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4652 .field_opr1 = { 4653 (BNXT_ULP_ENC_FIELD_IPV4_DADDR >> 8) & 0xff, 4654 BNXT_ULP_ENC_FIELD_IPV4_DADDR & 0xff} 4655 }, 4656 { 4657 .description = "enc_ipv6_vtc", 4658 .field_bit_size = 32, 4659 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4660 }, 4661 { 4662 .description = "enc_ipv6_zero", 4663 .field_bit_size = 16, 4664 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4665 }, 4666 { 4667 .description = "enc_ipv6_proto", 4668 .field_bit_size = 8, 4669 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4670 }, 4671 { 4672 .description = "enc_ipv6_ttl", 4673 .field_bit_size = 8, 4674 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4675 }, 4676 { 4677 .description = "enc_ipv6_daddr", 4678 .field_bit_size = 128, 4679 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4680 }, 4681 { 4682 .description = "enc_udp_sport", 4683 .field_bit_size = 16, 4684 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4685 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4686 .field_opr1 = { 4687 (BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff, 4688 BNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff} 4689 }, 4690 { 4691 .description = "enc_udp_dport", 4692 .field_bit_size = 16, 4693 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4694 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4695 .field_opr1 = { 4696 (BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff, 4697 BNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff} 4698 }, 4699 { 4700 .description = "enc_vxlan_flags", 4701 .field_bit_size = 8, 4702 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4703 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4704 .field_opr1 = { 4705 (BNXT_ULP_ENC_FIELD_VXLAN_FLAGS >> 8) & 0xff, 4706 BNXT_ULP_ENC_FIELD_VXLAN_FLAGS & 0xff} 4707 }, 4708 { 4709 .description = "enc_vxlan_rsvd0", 4710 .field_bit_size = 24, 4711 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4712 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4713 .field_opr1 = { 4714 (BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 >> 8) & 0xff, 4715 BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 & 0xff} 4716 }, 4717 { 4718 .description = "enc_vxlan_vni", 4719 .field_bit_size = 24, 4720 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4721 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4722 .field_opr1 = { 4723 (BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff, 4724 BNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff} 4725 }, 4726 { 4727 .description = "enc_vxlan_rsvd1", 4728 .field_bit_size = 8, 4729 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4730 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4731 .field_opr1 = { 4732 (BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 >> 8) & 0xff, 4733 BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 & 0xff} 4734 }, 4735 /* act_tid: 6, , table: vxlan_encap_rec_cache.wr */ 4736 { 4737 .description = "rid", 4738 .field_bit_size = 32, 4739 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4740 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 4741 .field_opr1 = { 4742 (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, 4743 BNXT_ULP_RF_IDX_RID & 0xff} 4744 }, 4745 { 4746 .description = "enc_rec_ptr", 4747 .field_bit_size = 16, 4748 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4749 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 4750 .field_opr1 = { 4751 (BNXT_ULP_RF_IDX_ENCAP_PTR_0 >> 8) & 0xff, 4752 BNXT_ULP_RF_IDX_ENCAP_PTR_0 & 0xff} 4753 }, 4754 /* act_tid: 6, , table: int_tun_encap_record.ipv6_vxlan */ 4755 { 4756 .description = "ecv_valid", 4757 .field_bit_size = 1, 4758 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4759 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 4760 .field_opr1 = { 4761 ULP_THOR_SYM_ECV_VALID_YES} 4762 }, 4763 { 4764 .description = "ecv_custom_en", 4765 .field_bit_size = 1, 4766 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4767 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 4768 }, 4769 { 4770 .description = "ecv_vtag_type", 4771 .field_bit_size = 4, 4772 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4773 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, 4774 .field_opr1 = { 4775 (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff, 4776 BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff} 4777 }, 4778 { 4779 .description = "ecv_l2_en", 4780 .field_bit_size = 1, 4781 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4782 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 4783 .field_opr1 = { 4784 ULP_THOR_SYM_ECV_L2_EN_YES} 4785 }, 4786 { 4787 .description = "ecv_l3_type", 4788 .field_bit_size = 3, 4789 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4790 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, 4791 .field_opr1 = { 4792 (BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff, 4793 BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff} 4794 }, 4795 { 4796 .description = "ecv_l4_type", 4797 .field_bit_size = 3, 4798 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4799 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 4800 .field_opr1 = { 4801 ULP_THOR_SYM_ECV_L4_TYPE_UDP_CSUM} 4802 }, 4803 { 4804 .description = "ecv_tun_type", 4805 .field_bit_size = 3, 4806 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4807 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 4808 .field_opr1 = { 4809 ULP_THOR_SYM_ECV_TUN_TYPE_VXLAN} 4810 }, 4811 { 4812 .description = "enc_eth_dmac", 4813 .field_bit_size = 48, 4814 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4815 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4816 .field_opr1 = { 4817 (BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff, 4818 BNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff} 4819 }, 4820 { 4821 .description = "enc_o_vlan_tag", 4822 .field_bit_size = 16, 4823 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 4824 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, 4825 .field_opr1 = { 4826 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, 4827 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, 4828 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, 4829 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, 4830 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, 4831 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, 4832 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, 4833 (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, 4834 .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4835 .field_opr2 = { 4836 (BNXT_ULP_ENC_FIELD_O_VLAN_TCI >> 8) & 0xff, 4837 BNXT_ULP_ENC_FIELD_O_VLAN_TCI & 0xff}, 4838 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 4839 }, 4840 { 4841 .description = "enc_o_vlan_type", 4842 .field_bit_size = 16, 4843 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 4844 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, 4845 .field_opr1 = { 4846 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff, 4847 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff, 4848 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff, 4849 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff, 4850 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff, 4851 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff, 4852 ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff, 4853 (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff}, 4854 .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4855 .field_opr2 = { 4856 (BNXT_ULP_ENC_FIELD_O_VLAN_TYPE >> 8) & 0xff, 4857 BNXT_ULP_ENC_FIELD_O_VLAN_TYPE & 0xff}, 4858 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 4859 }, 4860 { 4861 .description = "enc_i_vlan_tag", 4862 .field_bit_size = 16, 4863 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 4864 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, 4865 .field_opr1 = { 4866 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff, 4867 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff, 4868 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff, 4869 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff, 4870 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff, 4871 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff, 4872 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff, 4873 (uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff}, 4874 .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4875 .field_opr2 = { 4876 (BNXT_ULP_ENC_FIELD_I_VLAN_TCI >> 8) & 0xff, 4877 BNXT_ULP_ENC_FIELD_I_VLAN_TCI & 0xff}, 4878 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 4879 }, 4880 { 4881 .description = "enc_i_vlan_type", 4882 .field_bit_size = 16, 4883 .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3, 4884 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT, 4885 .field_opr1 = { 4886 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff, 4887 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff, 4888 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff, 4889 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff, 4890 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff, 4891 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff, 4892 ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff, 4893 (uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff}, 4894 .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4895 .field_opr2 = { 4896 (BNXT_ULP_ENC_FIELD_I_VLAN_TYPE >> 8) & 0xff, 4897 BNXT_ULP_ENC_FIELD_I_VLAN_TYPE & 0xff}, 4898 .field_src3 = BNXT_ULP_FIELD_SRC_SKIP 4899 }, 4900 { 4901 .description = "enc_ipv4_ihl", 4902 .field_bit_size = 8, 4903 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4904 }, 4905 { 4906 .description = "enc_ipv4_tos", 4907 .field_bit_size = 8, 4908 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4909 }, 4910 { 4911 .description = "enc_ipv4_pkt_id", 4912 .field_bit_size = 16, 4913 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4914 }, 4915 { 4916 .description = "enc_ipv4_frag", 4917 .field_bit_size = 16, 4918 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4919 }, 4920 { 4921 .description = "enc_ipv4_ttl", 4922 .field_bit_size = 8, 4923 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4924 }, 4925 { 4926 .description = "enc_ipv4_proto", 4927 .field_bit_size = 8, 4928 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4929 }, 4930 { 4931 .description = "enc_ipv4_daddr", 4932 .field_bit_size = 32, 4933 .field_opc = BNXT_ULP_FIELD_OPC_SKIP 4934 }, 4935 { 4936 .description = "enc_ipv6_vtc", 4937 .field_bit_size = 32, 4938 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4939 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4940 .field_opr1 = { 4941 (BNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW >> 8) & 0xff, 4942 BNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW & 0xff} 4943 }, 4944 { 4945 .description = "enc_ipv6_zero", 4946 .field_bit_size = 16, 4947 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4948 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 4949 }, 4950 { 4951 .description = "enc_ipv6_proto", 4952 .field_bit_size = 8, 4953 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4954 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4955 .field_opr1 = { 4956 (BNXT_ULP_ENC_FIELD_IPV6_PROTO >> 8) & 0xff, 4957 BNXT_ULP_ENC_FIELD_IPV6_PROTO & 0xff} 4958 }, 4959 { 4960 .description = "enc_ipv6_ttl", 4961 .field_bit_size = 8, 4962 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4963 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4964 .field_opr1 = { 4965 (BNXT_ULP_ENC_FIELD_IPV6_TTL >> 8) & 0xff, 4966 BNXT_ULP_ENC_FIELD_IPV6_TTL & 0xff} 4967 }, 4968 { 4969 .description = "enc_ipv6_daddr", 4970 .field_bit_size = 128, 4971 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4972 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4973 .field_opr1 = { 4974 (BNXT_ULP_ENC_FIELD_IPV6_DADDR >> 8) & 0xff, 4975 BNXT_ULP_ENC_FIELD_IPV6_DADDR & 0xff} 4976 }, 4977 { 4978 .description = "enc_udp_sport", 4979 .field_bit_size = 16, 4980 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4981 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4982 .field_opr1 = { 4983 (BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff, 4984 BNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff} 4985 }, 4986 { 4987 .description = "enc_udp_dport", 4988 .field_bit_size = 16, 4989 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4990 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 4991 .field_opr1 = { 4992 (BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff, 4993 BNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff} 4994 }, 4995 { 4996 .description = "enc_vxlan_flags", 4997 .field_bit_size = 8, 4998 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 4999 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 5000 .field_opr1 = { 5001 (BNXT_ULP_ENC_FIELD_VXLAN_FLAGS >> 8) & 0xff, 5002 BNXT_ULP_ENC_FIELD_VXLAN_FLAGS & 0xff} 5003 }, 5004 { 5005 .description = "enc_vxlan_rsvd0", 5006 .field_bit_size = 24, 5007 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5008 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 5009 .field_opr1 = { 5010 (BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 >> 8) & 0xff, 5011 BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 & 0xff} 5012 }, 5013 { 5014 .description = "enc_vxlan_vni", 5015 .field_bit_size = 24, 5016 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5017 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 5018 .field_opr1 = { 5019 (BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff, 5020 BNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff} 5021 }, 5022 { 5023 .description = "enc_vxlan_rsvd1", 5024 .field_bit_size = 8, 5025 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5026 .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD, 5027 .field_opr1 = { 5028 (BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 >> 8) & 0xff, 5029 BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 & 0xff} 5030 }, 5031 /* act_tid: 6, , table: int_full_act_record.0 */ 5032 { 5033 .description = "sp_rec_ptr", 5034 .field_bit_size = 16, 5035 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5036 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 5037 .field_opr1 = { 5038 (BNXT_ULP_RF_IDX_MAIN_SP_PTR >> 8) & 0xff, 5039 BNXT_ULP_RF_IDX_MAIN_SP_PTR & 0xff} 5040 }, 5041 { 5042 .description = "encap_ptr", 5043 .field_bit_size = 16, 5044 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5045 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 5046 .field_opr1 = { 5047 (BNXT_ULP_RF_IDX_ENCAP_PTR_0 >> 8) & 0xff, 5048 BNXT_ULP_RF_IDX_ENCAP_PTR_0 & 0xff} 5049 }, 5050 { 5051 .description = "mod_rec_ptr", 5052 .field_bit_size = 16, 5053 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5054 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 5055 }, 5056 { 5057 .description = "rsvd1", 5058 .field_bit_size = 16, 5059 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5060 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 5061 }, 5062 { 5063 .description = "rsvd0", 5064 .field_bit_size = 8, 5065 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5066 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 5067 }, 5068 { 5069 .description = "decap_func", 5070 .field_bit_size = 5, 5071 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5072 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 5073 }, 5074 { 5075 .description = "meter", 5076 .field_bit_size = 10, 5077 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5078 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 5079 }, 5080 { 5081 .description = "stats_op", 5082 .field_bit_size = 1, 5083 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5084 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 5085 .field_opr1 = { 5086 1} 5087 }, 5088 { 5089 .description = "stats_ptr", 5090 .field_bit_size = 16, 5091 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5092 .field_src1 = BNXT_ULP_FIELD_SRC_RF, 5093 .field_opr1 = { 5094 (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, 5095 BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff} 5096 }, 5097 { 5098 .description = "vnic_or_vport", 5099 .field_bit_size = 11, 5100 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5101 .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, 5102 .field_opr1 = { 5103 (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, 5104 BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff} 5105 }, 5106 { 5107 .description = "use_default", 5108 .field_bit_size = 1, 5109 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5110 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 5111 }, 5112 { 5113 .description = "mirror", 5114 .field_bit_size = 4, 5115 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5116 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 5117 }, 5118 { 5119 .description = "cond_copy", 5120 .field_bit_size = 1, 5121 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5122 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 5123 }, 5124 { 5125 .description = "vlan_del_rpt", 5126 .field_bit_size = 2, 5127 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5128 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 5129 }, 5130 { 5131 .description = "drop", 5132 .field_bit_size = 1, 5133 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5134 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 5135 }, 5136 { 5137 .description = "hit", 5138 .field_bit_size = 1, 5139 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5140 .field_src1 = BNXT_ULP_FIELD_SRC_ZERO 5141 }, 5142 { 5143 .description = "type", 5144 .field_bit_size = 3, 5145 .field_opc = BNXT_ULP_FIELD_OPC_SRC1, 5146 .field_src1 = BNXT_ULP_FIELD_SRC_CONST, 5147 .field_opr1 = { 5148 1} 5149 } 5150 }; 5151 5152 struct bnxt_ulp_mapper_ident_info ulp_thor_act_ident_list[] = { 5153 /* act_tid: 1, , table: shared_mirror_record.rd */ 5154 { 5155 .description = "mirror_id", 5156 .regfile_idx = BNXT_ULP_RF_IDX_MIRROR_ID_0, 5157 .ident_bit_size = 4, 5158 .ident_bit_pos = 32 5159 }, 5160 /* act_tid: 6, , table: source_property_cache.rd */ 5161 { 5162 .description = "sp_rec_ptr", 5163 .regfile_idx = BNXT_ULP_RF_IDX_MAIN_SP_PTR, 5164 .ident_bit_size = 16, 5165 .ident_bit_pos = 32 5166 }, 5167 /* act_tid: 6, , table: vxlan_encap_rec_cache.rd */ 5168 { 5169 .description = "enc_rec_ptr", 5170 .regfile_idx = BNXT_ULP_RF_IDX_ENCAP_PTR_0, 5171 .ident_bit_size = 16, 5172 .ident_bit_pos = 32 5173 } 5174 }; 5175