1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2018-2022 Intel Corporation 3 */ 4 #ifndef _QAT_QP_H_ 5 #define _QAT_QP_H_ 6 7 #include "qat_common.h" 8 #include "adf_transport_access_macros.h" 9 10 #define QAT_CSR_HEAD_WRITE_THRESH 32U 11 /* number of requests to accumulate before writing head CSR */ 12 13 #define QAT_QP_MIN_INFL_THRESHOLD 256 14 15 struct qat_pci_device; 16 17 /** 18 * Structure associated with each queue. 19 */ 20 struct qat_queue { 21 char memz_name[RTE_MEMZONE_NAMESIZE]; 22 void *base_addr; /* Base address */ 23 rte_iova_t base_phys_addr; /* Queue physical address */ 24 uint32_t head; /* Shadow copy of the head */ 25 uint32_t tail; /* Shadow copy of the tail */ 26 uint32_t modulo_mask; 27 uint32_t msg_size; 28 uint32_t queue_size; 29 uint8_t trailz; 30 uint8_t hw_bundle_number; 31 uint8_t hw_queue_number; 32 /* HW queue aka ring offset on bundle */ 33 uint32_t csr_head; /* last written head value */ 34 uint32_t csr_tail; /* last written tail value */ 35 uint16_t nb_processed_responses; 36 /* number of responses processed since last CSR head write */ 37 }; 38 39 /** 40 * Type define qat_op_build_request_t function pointer, passed in as argument 41 * in enqueue op burst, where a build request assigned base on the type of 42 * crypto op. 43 * 44 * @param in_op 45 * An input op pointer 46 * @param out_msg 47 * out_meg pointer 48 * @param op_cookie 49 * op cookie pointer 50 * @param opaque 51 * an opaque data may be used to store context may be useful between 52 * 2 enqueue operations. 53 * @param dev_gen 54 * qat device gen id 55 * @return 56 * - 0 if the crypto request is build successfully, 57 * - EINVAL if error 58 **/ 59 typedef int (*qat_op_build_request_t)(void *in_op, uint8_t *out_msg, 60 void *op_cookie, uint64_t *opaque, enum qat_device_gen dev_gen); 61 62 /** 63 * Type define qat_op_dequeue_t function pointer, passed in as argument 64 * in dequeue op burst, where a dequeue op assigned base on the type of 65 * crypto op. 66 * 67 * @param op 68 * An input op pointer 69 * @param resp 70 * qat response msg pointer 71 * @param op_cookie 72 * op cookie pointer 73 * @param dequeue_err_count 74 * dequeue error counter 75 * @return 76 * - 0 if dequeue OP is successful 77 * - EINVAL if error 78 **/ 79 typedef int (*qat_op_dequeue_t)(void **op, uint8_t *resp, void *op_cookie, 80 uint64_t *dequeue_err_count __rte_unused); 81 82 #define QAT_BUILD_REQUEST_MAX_OPAQUE_SIZE 2 83 84 struct qat_qp { 85 void *mmap_bar_addr; 86 struct qat_queue tx_q; 87 struct qat_queue rx_q; 88 struct qat_common_stats stats; 89 struct rte_mempool *op_cookie_pool; 90 void **op_cookies; 91 uint32_t nb_descriptors; 92 uint64_t opaque[QAT_BUILD_REQUEST_MAX_OPAQUE_SIZE]; 93 enum qat_device_gen qat_dev_gen; 94 enum qat_service_type service_type; 95 struct qat_pci_device *qat_dev; 96 /**< qat device this qp is on */ 97 uint32_t enqueued; 98 uint32_t dequeued __rte_aligned(4); 99 uint16_t max_inflights; 100 uint16_t min_enq_burst_threshold; 101 } __rte_cache_aligned; 102 103 /** 104 * Structure with data needed for creation of queue pair. 105 */ 106 struct qat_qp_hw_data { 107 enum qat_service_type service_type; 108 uint8_t hw_bundle_num; 109 uint8_t tx_ring_num; 110 uint8_t rx_ring_num; 111 uint16_t tx_msg_size; 112 uint16_t rx_msg_size; 113 }; 114 115 /** 116 * Structure with data needed for creation of queue pair. 117 */ 118 struct qat_qp_config { 119 const struct qat_qp_hw_data *hw; 120 uint32_t nb_descriptors; 121 uint32_t cookie_size; 122 int socket_id; 123 const char *service_str; 124 }; 125 126 uint16_t 127 qat_enqueue_op_burst(void *qp, qat_op_build_request_t op_build_request, 128 void **ops, uint16_t nb_ops); 129 130 uint16_t 131 qat_enqueue_comp_op_burst(void *qp, void **ops, uint16_t nb_ops); 132 133 uint16_t 134 qat_dequeue_op_burst(void *qp, void **ops, 135 qat_op_dequeue_t qat_dequeue_process_response, uint16_t nb_ops); 136 137 int 138 qat_qp_release(enum qat_device_gen qat_dev_gen, struct qat_qp **qp_addr); 139 140 int 141 qat_qp_setup(struct qat_pci_device *qat_dev, 142 struct qat_qp **qp_addr, uint16_t queue_pair_id, 143 struct qat_qp_config *qat_qp_conf); 144 145 int 146 qat_qps_per_service(struct qat_pci_device *qat_dev, 147 enum qat_service_type service); 148 149 const struct qat_qp_hw_data * 150 qat_qp_get_hw_data(struct qat_pci_device *qat_dev, 151 enum qat_service_type service, uint16_t qp_id); 152 153 int 154 qat_cq_get_fw_version(struct qat_qp *qp); 155 156 /* Needed for weak function*/ 157 int 158 qat_comp_process_response(void **op __rte_unused, uint8_t *resp __rte_unused, 159 void *op_cookie __rte_unused, 160 uint64_t *dequeue_err_count __rte_unused); 161 int 162 qat_read_qp_config(struct qat_pci_device *qat_dev); 163 164 /** 165 * Function prototypes for GENx specific queue pair operations. 166 **/ 167 typedef int (*qat_qp_rings_per_service_t) 168 (struct qat_pci_device *, enum qat_service_type); 169 170 typedef void (*qat_qp_build_ring_base_t)(void *, struct qat_queue *); 171 172 typedef void (*qat_qp_adf_arb_enable_t)(const struct qat_queue *, void *, 173 rte_spinlock_t *); 174 175 typedef void (*qat_qp_adf_arb_disable_t)(const struct qat_queue *, void *, 176 rte_spinlock_t *); 177 178 typedef void (*qat_qp_adf_configure_queues_t)(struct qat_qp *); 179 180 typedef void (*qat_qp_csr_write_tail_t)(struct qat_qp *qp, struct qat_queue *q); 181 182 typedef void (*qat_qp_csr_write_head_t)(struct qat_qp *qp, struct qat_queue *q, 183 uint32_t new_head); 184 185 typedef void (*qat_qp_csr_setup_t)(struct qat_pci_device*, void *, 186 struct qat_qp *); 187 188 typedef const struct qat_qp_hw_data * (*qat_qp_get_hw_data_t)( 189 struct qat_pci_device *dev, enum qat_service_type service_type, 190 uint16_t qp_id); 191 192 struct qat_qp_hw_spec_funcs { 193 qat_qp_rings_per_service_t qat_qp_rings_per_service; 194 qat_qp_build_ring_base_t qat_qp_build_ring_base; 195 qat_qp_adf_arb_enable_t qat_qp_adf_arb_enable; 196 qat_qp_adf_arb_disable_t qat_qp_adf_arb_disable; 197 qat_qp_adf_configure_queues_t qat_qp_adf_configure_queues; 198 qat_qp_csr_write_tail_t qat_qp_csr_write_tail; 199 qat_qp_csr_write_head_t qat_qp_csr_write_head; 200 qat_qp_csr_setup_t qat_qp_csr_setup; 201 qat_qp_get_hw_data_t qat_qp_get_hw_data; 202 }; 203 204 extern struct qat_qp_hw_spec_funcs *qat_qp_hw_spec[]; 205 206 #endif /* _QAT_QP_H_ */ 207