1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -no-opaque-pointers %s -emit-llvm -ffp-exception-behavior=maytrap -fallow-half-arguments-and-returns -o - -triple x86_64-unknown-unknown | FileCheck %s
3 
4 // Test that the constrained intrinsics are picking up the exception
5 // metadata from the AST instead of the global default from the command line.
6 // FIXME: these functions shouldn't trap on SNaN.
7 
8 #pragma float_control(except, on)
9 
10 int printf(const char *, ...);
11 
12 // CHECK-LABEL: @p(
13 // CHECK-NEXT:  entry:
14 // CHECK-NEXT:    [[STR_ADDR:%.*]] = alloca i8*, align 8
15 // CHECK-NEXT:    [[X_ADDR:%.*]] = alloca i32, align 4
16 // CHECK-NEXT:    store i8* [[STR:%.*]], i8** [[STR_ADDR]], align 8
17 // CHECK-NEXT:    store i32 [[X:%.*]], i32* [[X_ADDR]], align 4
18 // CHECK-NEXT:    [[TMP0:%.*]] = load i8*, i8** [[STR_ADDR]], align 8
19 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, i32* [[X_ADDR]], align 4
20 // CHECK-NEXT:    [[CALL:%.*]] = call i32 (i8*, ...) @printf(i8* noundef getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* noundef [[TMP0]], i32 noundef [[TMP1]]) [[ATTR4:#.*]]
21 // CHECK-NEXT:    ret void
22 //
p(char * str,int x)23 void p(char *str, int x) {
24   printf("%s: %d\n", str, x);
25 }
26 
27 #define P(n,args) p(#n #args, __builtin_##n args)
28 
29 // CHECK-LABEL: @test_fpclassify(
30 // CHECK-NEXT:  entry:
31 // CHECK-NEXT:    [[D_ADDR:%.*]] = alloca double, align 8
32 // CHECK-NEXT:    store double [[D:%.*]], double* [[D_ADDR]], align 8
33 // CHECK-NEXT:    [[TMP0:%.*]] = load double, double* [[D_ADDR]], align 8
34 // CHECK-NEXT:    [[ISZERO:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP0]], double 0.000000e+00, metadata !"oeq", metadata !"fpexcept.strict") [[ATTR4]]
35 // CHECK-NEXT:    br i1 [[ISZERO]], label [[FPCLASSIFY_END:%.*]], label [[FPCLASSIFY_NOT_ZERO:%.*]]
36 // CHECK:       fpclassify_end:
37 // CHECK-NEXT:    [[FPCLASSIFY_RESULT:%.*]] = phi i32 [ 4, [[ENTRY:%.*]] ], [ 0, [[FPCLASSIFY_NOT_ZERO]] ], [ 1, [[FPCLASSIFY_NOT_NAN:%.*]] ], [ [[TMP2:%.*]], [[FPCLASSIFY_NOT_INF:%.*]] ]
38 // CHECK-NEXT:    call void @p(i8* noundef getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0), i32 noundef [[FPCLASSIFY_RESULT]]) [[ATTR4]]
39 // CHECK-NEXT:    ret void
40 // CHECK:       fpclassify_not_zero:
41 // CHECK-NEXT:    [[CMP:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP0]], double [[TMP0]], metadata !"uno", metadata !"fpexcept.strict") [[ATTR4]]
42 // CHECK-NEXT:    br i1 [[CMP]], label [[FPCLASSIFY_END]], label [[FPCLASSIFY_NOT_NAN]]
43 // CHECK:       fpclassify_not_nan:
44 // CHECK-NEXT:    [[TMP1:%.*]] = call double @llvm.fabs.f64(double [[TMP0]]) [[ATTR5:#.*]]
45 // CHECK-NEXT:    [[ISINF:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP1]], double 0x7FF0000000000000, metadata !"oeq", metadata !"fpexcept.strict") [[ATTR4]]
46 // CHECK-NEXT:    br i1 [[ISINF]], label [[FPCLASSIFY_END]], label [[FPCLASSIFY_NOT_INF]]
47 // CHECK:       fpclassify_not_inf:
48 // CHECK-NEXT:    [[ISNORMAL:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP1]], double 0x10000000000000, metadata !"uge", metadata !"fpexcept.strict") [[ATTR4]]
49 // CHECK-NEXT:    [[TMP2]] = select i1 [[ISNORMAL]], i32 2, i32 3
50 // CHECK-NEXT:    br label [[FPCLASSIFY_END]]
51 //
test_fpclassify(double d)52 void test_fpclassify(double d) {
53   P(fpclassify, (0, 1, 2, 3, 4, d));
54 
55   return;
56 }
57 
58 // CHECK-LABEL: @test_fp16_isinf(
59 // CHECK-NEXT:  entry:
60 // CHECK-NEXT:    [[LD_ADDR:%.*]] = alloca half, align 2
61 // CHECK-NEXT:    store half [[H:%.*]], half* [[LD_ADDR]], align 2
62 // CHECK-NEXT:    [[TMP0:%.*]] = load half, half* [[LD_ADDR]], align 2
63 // CHECK-NEXT:    [[BITCAST:%.*]] = bitcast half [[TMP0]] to i16
64 // CHECK-NEXT:    [[SHL1:%.*]] = shl i16 [[BITCAST]], 1
65 // CHECK-NEXT:    [[CMP:%.*]] = icmp eq i16 [[SHL1]], -2048
66 // CHECK-NEXT:    [[RES:%.*]] = zext i1 [[CMP]] to i32
67 // CHECK-NEXT:    call void @p(i8* noundef getelementptr inbounds ([9 x i8], [9 x i8]* @.str.[[#STRID:2]], i64 0, i64 0), i32 noundef [[RES]]) [[ATTR4]]
68 // CHECK-NEXT:    ret void
69 //
test_fp16_isinf(__fp16 h)70 void test_fp16_isinf(__fp16 h) {
71   P(isinf, (h));
72 
73   return;
74 }
75 
76 // CHECK-LABEL: @test_float_isinf(
77 // CHECK-NEXT:  entry:
78 // CHECK-NEXT:    [[LD_ADDR:%.*]] = alloca float, align 4
79 // CHECK-NEXT:    store float [[F:%.*]], float* [[LD_ADDR]], align 4
80 // CHECK-NEXT:    [[TMP0:%.*]] = load float, float* [[LD_ADDR]], align 4
81 // CHECK-NEXT:    [[BITCAST:%.*]] = bitcast float [[TMP0]] to i32
82 // CHECK-NEXT:    [[SHL1:%.*]] = shl i32 [[BITCAST]], 1
83 // CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[SHL1]], -16777216
84 // CHECK-NEXT:    [[RES:%.*]] = zext i1 [[CMP]] to i32
85 // CHECK-NEXT:    call void @p(i8* noundef getelementptr inbounds ([9 x i8], [9 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 noundef [[RES]]) [[ATTR4]]
86 // CHECK-NEXT:    ret void
87 //
test_float_isinf(float f)88 void test_float_isinf(float f) {
89   P(isinf, (f));
90 
91   return;
92 }
93 
94 // CHECK-LABEL: @test_double_isinf(
95 // CHECK-NEXT:  entry:
96 // CHECK-NEXT:    [[LD_ADDR:%.*]] = alloca double, align 8
97 // CHECK-NEXT:    store double [[D:%.*]], double* [[LD_ADDR]], align 8
98 // CHECK-NEXT:    [[TMP0:%.*]] = load double, double* [[LD_ADDR]], align 8
99 // CHECK-NEXT:    [[BITCAST:%.*]] = bitcast double [[TMP0]] to i64
100 // CHECK-NEXT:    [[SHL1:%.*]] = shl i64 [[BITCAST]], 1
101 // CHECK-NEXT:    [[CMP:%.*]] = icmp eq i64 [[SHL1]], -9007199254740992
102 // CHECK-NEXT:    [[RES:%.*]] = zext i1 [[CMP]] to i32
103 // CHECK-NEXT:    call void @p(i8* noundef getelementptr inbounds ([9 x i8], [9 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 noundef [[RES]]) [[ATTR4]]
104 // CHECK-NEXT:    ret void
105 //
test_double_isinf(double d)106 void test_double_isinf(double d) {
107   P(isinf, (d));
108 
109   return;
110 }
111 
112 // CHECK-LABEL: @test_fp16_isfinite(
113 // CHECK-NEXT:  entry:
114 // CHECK-NEXT:    [[LD_ADDR:%.*]] = alloca half, align 2
115 // CHECK-NEXT:    store half [[H:%.*]], half* [[LD_ADDR]], align 2
116 // CHECK-NEXT:    [[TMP0:%.*]] = load half, half* [[LD_ADDR]], align 2
117 // CHECK-NEXT:    [[BITCAST:%.*]] = bitcast half [[TMP0]] to i16
118 // CHECK-NEXT:    [[SHL1:%.*]] = shl i16 [[BITCAST]], 1
119 // CHECK-NEXT:    [[CMP:%.*]] = icmp ult i16 [[SHL1]], -2048
120 // CHECK-NEXT:    [[RES:%.*]] = zext i1 [[CMP]] to i32
121 // CHECK-NEXT:    call void @p(i8* noundef getelementptr inbounds ([12 x i8], [12 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 noundef [[RES]]) [[ATTR4]]
122 // CHECK-NEXT:    ret void
123 //
test_fp16_isfinite(__fp16 h)124 void test_fp16_isfinite(__fp16 h) {
125   P(isfinite, (h));
126 
127   return;
128 }
129 
130 // CHECK-LABEL: @test_float_isfinite(
131 // CHECK-NEXT:  entry:
132 // CHECK-NEXT:    [[LD_ADDR:%.*]] = alloca float, align 4
133 // CHECK-NEXT:    store float [[F:%.*]], float* [[LD_ADDR]], align 4
134 // CHECK-NEXT:    [[TMP0:%.*]] = load float, float* [[LD_ADDR]], align 4
135 // CHECK-NEXT:    [[BITCAST:%.*]] = bitcast float [[TMP0]] to i32
136 // CHECK-NEXT:    [[SHL1:%.*]] = shl i32 [[BITCAST]], 1
137 // CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[SHL1]], -16777216
138 // CHECK-NEXT:    [[RES:%.*]] = zext i1 [[CMP]] to i32
139 // CHECK-NEXT:    call void @p(i8* noundef getelementptr inbounds ([12 x i8], [12 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 noundef [[RES]]) [[ATTR4]]
140 // CHECK-NEXT:    ret void
141 //
test_float_isfinite(float f)142 void test_float_isfinite(float f) {
143   P(isfinite, (f));
144 
145   return;
146 }
147 
148 // CHECK-LABEL: @test_double_isfinite(
149 // CHECK-NEXT:  entry:
150 // CHECK-NEXT:    [[LD_ADDR:%.*]] = alloca double, align 8
151 // CHECK-NEXT:    store double [[D:%.*]], double* [[LD_ADDR]], align 8
152 // CHECK-NEXT:    [[TMP0:%.*]] = load double, double* [[LD_ADDR]], align 8
153 // CHECK-NEXT:    [[BITCAST:%.*]] = bitcast double [[TMP0]] to i64
154 // CHECK-NEXT:    [[SHL1:%.*]] = shl i64 [[BITCAST]], 1
155 // CHECK-NEXT:    [[CMP:%.*]] = icmp ult i64 [[SHL1]], -9007199254740992
156 // CHECK-NEXT:    [[RES:%.*]] = zext i1 [[CMP]] to i32
157 // CHECK-NEXT:    call void @p(i8* noundef getelementptr inbounds ([12 x i8], [12 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 noundef [[RES]]) [[ATTR4]]
158 // CHECK-NEXT:    ret void
159 //
test_double_isfinite(double d)160 void test_double_isfinite(double d) {
161   P(isfinite, (d));
162 
163   return;
164 }
165 
166 // CHECK-LABEL: @test_isinf_sign(
167 // CHECK-NEXT:  entry:
168 // CHECK-NEXT:    [[D_ADDR:%.*]] = alloca double, align 8
169 // CHECK-NEXT:    store double [[D:%.*]], double* [[D_ADDR]], align 8
170 // CHECK-NEXT:    [[TMP0:%.*]] = load double, double* [[D_ADDR]], align 8
171 // CHECK-NEXT:    [[TMP1:%.*]] = call double @llvm.fabs.f64(double [[TMP0]]) [[ATTR5]]
172 // CHECK-NEXT:    [[ISINF:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP1]], double 0x7FF0000000000000, metadata !"oeq", metadata !"fpexcept.strict") [[ATTR4]]
173 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast double [[TMP0]] to i64
174 // CHECK-NEXT:    [[TMP3:%.*]] = icmp slt i64 [[TMP2]], 0
175 // CHECK-NEXT:    [[TMP4:%.*]] = select i1 [[TMP3]], i32 -1, i32 1
176 // CHECK-NEXT:    [[TMP5:%.*]] = select i1 [[ISINF]], i32 [[TMP4]], i32 0
177 // CHECK-NEXT:    call void @p(i8* noundef getelementptr inbounds ([14 x i8], [14 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 noundef [[TMP5]]) [[ATTR4]]
178 // CHECK-NEXT:    ret void
179 //
test_isinf_sign(double d)180 void test_isinf_sign(double d) {
181   P(isinf_sign, (d));
182 
183   return;
184 }
185 
186 // CHECK-LABEL: @test_fp16_isnan(
187 // CHECK-NEXT:  entry:
188 // CHECK-NEXT:    [[H_ADDR:%.*]] = alloca half, align 2
189 // CHECK-NEXT:    store half [[H:%.*]], half* [[H_ADDR]], align 2
190 // CHECK-NEXT:    [[TMP0:%.*]] = load half, half* [[H_ADDR]], align 2
191 // CHECK-NEXT:    [[BITCAST:%.*]] = bitcast half [[TMP0]] to i16
192 // CHECK-NEXT:    [[ABS:%.*]] = and i16 [[BITCAST]], [[#%u,0x7FFF]]
193 // CHECK-NEXT:    [[TMP1:%.*]] = sub i16 [[#%u,0x7C00]], [[ABS]]
194 // CHECK-NEXT:    [[ISNAN:%.*]] = lshr i16 [[TMP1]], 15
195 // CHECK-NEXT:    [[RES:%.*]] = zext i16 [[ISNAN]] to i32
196 // CHECK-NEXT:    call void @p(i8* noundef getelementptr inbounds ([9 x i8], [9 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 noundef [[RES]]) [[ATTR4]]
197 // CHECK-NEXT:    ret void
198 //
test_fp16_isnan(__fp16 h)199 void test_fp16_isnan(__fp16 h) {
200   P(isnan, (h));
201 
202   return;
203 }
204 
205 // CHECK-LABEL: @test_float_isnan(
206 // CHECK-NEXT:  entry:
207 // CHECK-NEXT:    [[F_ADDR:%.*]] = alloca float, align 4
208 // CHECK-NEXT:    store float [[F:%.*]], float* [[F_ADDR]], align 4
209 // CHECK-NEXT:    [[TMP0:%.*]] = load float, float* [[F_ADDR]], align 4
210 // CHECK-NEXT:    [[BITCAST:%.*]] = bitcast float [[TMP0]] to i32
211 // CHECK-NEXT:    [[ABS:%.*]] = and i32 [[BITCAST]], [[#%u,0x7FFFFFFF]]
212 // CHECK-NEXT:    [[TMP1:%.*]] = sub i32 [[#%u,0x7F800000]], [[ABS]]
213 // CHECK-NEXT:    [[ISNAN:%.*]] = lshr i32 [[TMP1]], 31
214 // CHECK-NEXT:    call void @p(i8* noundef getelementptr inbounds ([9 x i8], [9 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 noundef [[ISNAN]]) [[ATTR4]]
215 // CHECK-NEXT:    ret void
216 //
test_float_isnan(float f)217 void test_float_isnan(float f) {
218   P(isnan, (f));
219 
220   return;
221 }
222 
223 // CHECK-LABEL: @test_double_isnan(
224 // CHECK-NEXT:  entry:
225 // CHECK-NEXT:    [[D_ADDR:%.*]] = alloca double, align 8
226 // CHECK-NEXT:    store double [[D:%.*]], double* [[D_ADDR]], align 8
227 // CHECK-NEXT:    [[TMP0:%.*]] = load double, double* [[D_ADDR]], align 8
228 // CHECK-NEXT:    [[BITCAST:%.*]] = bitcast double [[TMP0]] to i64
229 // CHECK-NEXT:    [[ABS:%.*]] = and i64 [[BITCAST]], [[#%u,0x7FFFFFFFFFFFFFFF]]
230 // CHECK-NEXT:    [[TMP1:%.*]] = sub i64 [[#%u,0x7FF0000000000000]], [[ABS]]
231 // CHECK-NEXT:    [[ISNAN:%.*]] = lshr i64 [[TMP1]], 63
232 // CHECK-NEXT:    [[RES:%.*]] = trunc i64 [[ISNAN]] to i32
233 // CHECK-NEXT:    call void @p(i8* noundef getelementptr inbounds ([9 x i8], [9 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 noundef [[RES]]) [[ATTR4]]
234 // CHECK-NEXT:    ret void
235 //
test_double_isnan(double d)236 void test_double_isnan(double d) {
237   P(isnan, (d));
238 
239   return;
240 }
241 
242 // CHECK-LABEL: @test_isnormal(
243 // CHECK-NEXT:  entry:
244 // CHECK-NEXT:    [[D_ADDR:%.*]] = alloca double, align 8
245 // CHECK-NEXT:    store double [[D:%.*]], double* [[D_ADDR]], align 8
246 // CHECK-NEXT:    [[TMP0:%.*]] = load double, double* [[D_ADDR]], align 8
247 // CHECK-NEXT:    [[ISEQ:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP0]], double [[TMP0]], metadata !"oeq", metadata !"fpexcept.strict") [[ATTR4]]
248 // CHECK-NEXT:    [[TMP1:%.*]] = call double @llvm.fabs.f64(double [[TMP0]]) [[ATTR5]]
249 // CHECK-NEXT:    [[ISINF:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP1]], double 0x7FF0000000000000, metadata !"ult", metadata !"fpexcept.strict") [[ATTR4]]
250 // CHECK-NEXT:    [[ISNORMAL:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double [[TMP1]], double 0x10000000000000, metadata !"uge", metadata !"fpexcept.strict") [[ATTR4]]
251 // CHECK-NEXT:    [[AND:%.*]] = and i1 [[ISEQ]], [[ISINF]]
252 // CHECK-NEXT:    [[AND1:%.*]] = and i1 [[AND]], [[ISNORMAL]]
253 // CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[AND1]] to i32
254 // CHECK-NEXT:    call void @p(i8* noundef getelementptr inbounds ([12 x i8], [12 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 noundef [[TMP2]]) [[ATTR4]]
255 // CHECK-NEXT:    ret void
256 //
test_isnormal(double d)257 void test_isnormal(double d) {
258   P(isnormal, (d));
259 
260   return;
261 }
262