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/llvm-project-15.0.7/clang/test/CodeGen/
H A Dms-intrinsics-rotations.c22 unsigned char test_rotl8(unsigned char value, unsigned char shift) { in test_rotl8()
29 unsigned short test_rotl16(unsigned short value, unsigned char shift) { in test_rotl16()
36 unsigned int test_rotl(unsigned int value, int shift) { in test_rotl()
43 unsigned long test_lrotl(unsigned long value, int shift) { in test_lrotl()
53 unsigned __int64 test_rotl64(unsigned __int64 value, int shift) { in test_rotl64()
62 unsigned char test_rotr8(unsigned char value, unsigned char shift) { in test_rotr8()
69 unsigned short test_rotr16(unsigned short value, unsigned char shift) { in test_rotr16()
76 unsigned int test_rotr(unsigned int value, int shift) { in test_rotr()
83 unsigned long test_lrotr(unsigned long value, int shift) { in test_lrotr()
93 unsigned __int64 test_rotr64(unsigned __int64 value, int shift) { in test_rotr64()
/llvm-project-15.0.7/clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/
H A Dvsll.c12 vint8mf8_t test_vsll_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vsll_vv_i8mf8()
21 vint8mf8_t test_vsll_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf8()
39 vint8mf4_t test_vsll_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf4()
57 vint8mf2_t test_vsll_vx_i8mf2(vint8mf2_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf2()
66 vint8m1_t test_vsll_vv_i8m1(vint8m1_t op1, vuint8m1_t shift, size_t vl) { in test_vsll_vv_i8m1()
75 vint8m1_t test_vsll_vx_i8m1(vint8m1_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8m1()
84 vint8m2_t test_vsll_vv_i8m2(vint8m2_t op1, vuint8m2_t shift, size_t vl) { in test_vsll_vv_i8m2()
93 vint8m2_t test_vsll_vx_i8m2(vint8m2_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8m2()
102 vint8m4_t test_vsll_vv_i8m4(vint8m4_t op1, vuint8m4_t shift, size_t vl) { in test_vsll_vv_i8m4()
111 vint8m4_t test_vsll_vx_i8m4(vint8m4_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8m4()
[all …]
H A Dvnsrl.c12 vuint8mf8_t test_vnsrl_wv_u8mf8(vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { in test_vnsrl_wv_u8mf8()
21 vuint8mf8_t test_vnsrl_wx_u8mf8(vuint16mf4_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8mf8()
39 vuint8mf4_t test_vnsrl_wx_u8mf4(vuint16mf2_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8mf4()
57 vuint8mf2_t test_vnsrl_wx_u8mf2(vuint16m1_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8mf2()
66 vuint8m1_t test_vnsrl_wv_u8m1(vuint16m2_t op1, vuint8m1_t shift, size_t vl) { in test_vnsrl_wv_u8m1()
75 vuint8m1_t test_vnsrl_wx_u8m1(vuint16m2_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8m1()
84 vuint8m2_t test_vnsrl_wv_u8m2(vuint16m4_t op1, vuint8m2_t shift, size_t vl) { in test_vnsrl_wv_u8m2()
93 vuint8m2_t test_vnsrl_wx_u8m2(vuint16m4_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8m2()
111 vuint8m4_t test_vnsrl_wx_u8m4(vuint16m8_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8m4()
165 vuint16m1_t test_vnsrl_wx_u16m1(vuint32m2_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u16m1()
[all …]
H A Dvnsra.c12 vint8mf8_t test_vnsra_wv_i8mf8(vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { in test_vnsra_wv_i8mf8()
21 vint8mf8_t test_vnsra_wx_i8mf8(vint16mf4_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf8()
39 vint8mf4_t test_vnsra_wx_i8mf4(vint16mf2_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf4()
57 vint8mf2_t test_vnsra_wx_i8mf2(vint16m1_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf2()
66 vint8m1_t test_vnsra_wv_i8m1(vint16m2_t op1, vuint8m1_t shift, size_t vl) { in test_vnsra_wv_i8m1()
75 vint8m1_t test_vnsra_wx_i8m1(vint16m2_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8m1()
84 vint8m2_t test_vnsra_wv_i8m2(vint16m4_t op1, vuint8m2_t shift, size_t vl) { in test_vnsra_wv_i8m2()
93 vint8m2_t test_vnsra_wx_i8m2(vint16m4_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8m2()
111 vint8m4_t test_vnsra_wx_i8m4(vint16m8_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8m4()
165 vint16m1_t test_vnsra_wx_i16m1(vint32m2_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i16m1()
[all …]
H A Dvnclip.c21 vint8mf8_t test_vnclip_wx_i8mf8(vint16mf4_t op1, size_t shift, size_t vl) { in test_vnclip_wx_i8mf8()
75 vint8m1_t test_vnclip_wx_i8m1(vint16m2_t op1, size_t shift, size_t vl) { in test_vnclip_wx_i8m1()
93 vint8m2_t test_vnclip_wx_i8m2(vint16m4_t op1, size_t shift, size_t vl) { in test_vnclip_wx_i8m2()
120 vint16mf4_t test_vnclip_wv_i16mf4(vint32mf2_t op1, vuint16mf4_t shift, in test_vnclip_wv_i16mf4()
139 vint16mf2_t test_vnclip_wv_i16mf2(vint32m1_t op1, vuint16mf2_t shift, in test_vnclip_wv_i16mf2()
212 vint32mf2_t test_vnclip_wv_i32mf2(vint64m1_t op1, vuint32mf2_t shift, in test_vnclip_wv_i32mf2()
323 vuint8mf2_t test_vnclipu_wv_u8mf2(vuint16m1_t op1, vuint8mf2_t shift, in test_vnclipu_wv_u8mf2()
434 vuint16m1_t test_vnclipu_wv_u16m1(vuint32m2_t op1, vuint16m1_t shift, in test_vnclipu_wv_u16m1()
610 vint16m1_t op1, vuint8mf2_t shift, in test_vnclip_wv_i8mf2_m()
733 vint32m2_t op1, vuint16m1_t shift, in test_vnclip_wv_i16m1_m()
[all …]
H A Dvsra.c12 vint8mf8_t test_vsra_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vsra_vv_i8mf8()
21 vint8mf8_t test_vsra_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf8()
39 vint8mf4_t test_vsra_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf4()
57 vint8mf2_t test_vsra_vx_i8mf2(vint8mf2_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf2()
66 vint8m1_t test_vsra_vv_i8m1(vint8m1_t op1, vuint8m1_t shift, size_t vl) { in test_vsra_vv_i8m1()
75 vint8m1_t test_vsra_vx_i8m1(vint8m1_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8m1()
84 vint8m2_t test_vsra_vv_i8m2(vint8m2_t op1, vuint8m2_t shift, size_t vl) { in test_vsra_vv_i8m2()
93 vint8m2_t test_vsra_vx_i8m2(vint8m2_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8m2()
102 vint8m4_t test_vsra_vv_i8m4(vint8m4_t op1, vuint8m4_t shift, size_t vl) { in test_vsra_vv_i8m4()
111 vint8m4_t test_vsra_vx_i8m4(vint8m4_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8m4()
[all …]
H A Dvsrl.c12 vuint8mf8_t test_vsrl_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vsrl_vv_u8mf8()
21 vuint8mf8_t test_vsrl_vx_u8mf8(vuint8mf8_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf8()
39 vuint8mf4_t test_vsrl_vx_u8mf4(vuint8mf4_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf4()
57 vuint8mf2_t test_vsrl_vx_u8mf2(vuint8mf2_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf2()
66 vuint8m1_t test_vsrl_vv_u8m1(vuint8m1_t op1, vuint8m1_t shift, size_t vl) { in test_vsrl_vv_u8m1()
75 vuint8m1_t test_vsrl_vx_u8m1(vuint8m1_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8m1()
84 vuint8m2_t test_vsrl_vv_u8m2(vuint8m2_t op1, vuint8m2_t shift, size_t vl) { in test_vsrl_vv_u8m2()
93 vuint8m2_t test_vsrl_vx_u8m2(vuint8m2_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8m2()
102 vuint8m4_t test_vsrl_vv_u8m4(vuint8m4_t op1, vuint8m4_t shift, size_t vl) { in test_vsrl_vv_u8m4()
111 vuint8m4_t test_vsrl_vx_u8m4(vuint8m4_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8m4()
[all …]
H A Dvssrl.c21 vuint8mf8_t test_vssrl_vx_u8mf8(vuint8mf8_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8mf8()
39 vuint8mf4_t test_vssrl_vx_u8mf4(vuint8mf4_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8mf4()
75 vuint8m1_t test_vssrl_vx_u8m1(vuint8m1_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8m1()
93 vuint8m2_t test_vssrl_vx_u8m2(vuint8m2_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8m2()
111 vuint8m4_t test_vssrl_vx_u8m4(vuint8m4_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8m4()
129 vuint8m8_t test_vssrl_vx_u8m8(vuint8m8_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8m8()
138 vuint16mf4_t test_vssrl_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t shift, in test_vssrl_vv_u16mf4()
157 vuint16mf2_t test_vssrl_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t shift, in test_vssrl_vv_u16mf2()
412 vuint8mf8_t op1, vuint8mf8_t shift, in test_vssrl_vv_u8mf8_m()
433 vuint8mf4_t op1, vuint8mf4_t shift, in test_vssrl_vv_u8mf4_m()
[all …]
H A Dvssra.c12 vint8mf8_t test_vssra_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vssra_vv_i8mf8()
21 vint8mf8_t test_vssra_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8mf8()
39 vint8mf4_t test_vssra_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8mf4()
57 vint8mf2_t test_vssra_vx_i8mf2(vint8mf2_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8mf2()
75 vint8m1_t test_vssra_vx_i8m1(vint8m1_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8m1()
93 vint8m2_t test_vssra_vx_i8m2(vint8m2_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8m2()
111 vint8m4_t test_vssra_vx_i8m4(vint8m4_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8m4()
129 vint8m8_t test_vssra_vx_i8m8(vint8m8_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8m8()
138 vint16mf4_t test_vssra_vv_i16mf4(vint16mf4_t op1, vuint16mf4_t shift, in test_vssra_vv_i16mf4()
157 vint16mf2_t test_vssra_vv_i16mf2(vint16mf2_t op1, vuint16mf2_t shift, in test_vssra_vv_i16mf2()
[all …]
/llvm-project-15.0.7/clang/test/CodeGen/RISCV/rvv-intrinsics/
H A Dvsll.c12 vint8mf8_t test_vsll_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vsll_vv_i8mf8()
21 vint8mf8_t test_vsll_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf8()
39 vint8mf4_t test_vsll_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf4()
57 vint8mf2_t test_vsll_vx_i8mf2(vint8mf2_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf2()
66 vint8m1_t test_vsll_vv_i8m1(vint8m1_t op1, vuint8m1_t shift, size_t vl) { in test_vsll_vv_i8m1()
75 vint8m1_t test_vsll_vx_i8m1(vint8m1_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8m1()
84 vint8m2_t test_vsll_vv_i8m2(vint8m2_t op1, vuint8m2_t shift, size_t vl) { in test_vsll_vv_i8m2()
93 vint8m2_t test_vsll_vx_i8m2(vint8m2_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8m2()
102 vint8m4_t test_vsll_vv_i8m4(vint8m4_t op1, vuint8m4_t shift, size_t vl) { in test_vsll_vv_i8m4()
111 vint8m4_t test_vsll_vx_i8m4(vint8m4_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8m4()
[all …]
H A Dvnsra.c12 vint8mf8_t test_vnsra_wv_i8mf8(vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { in test_vnsra_wv_i8mf8()
21 vint8mf8_t test_vnsra_wx_i8mf8(vint16mf4_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf8()
39 vint8mf4_t test_vnsra_wx_i8mf4(vint16mf2_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf4()
57 vint8mf2_t test_vnsra_wx_i8mf2(vint16m1_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf2()
66 vint8m1_t test_vnsra_wv_i8m1(vint16m2_t op1, vuint8m1_t shift, size_t vl) { in test_vnsra_wv_i8m1()
75 vint8m1_t test_vnsra_wx_i8m1(vint16m2_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8m1()
84 vint8m2_t test_vnsra_wv_i8m2(vint16m4_t op1, vuint8m2_t shift, size_t vl) { in test_vnsra_wv_i8m2()
93 vint8m2_t test_vnsra_wx_i8m2(vint16m4_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8m2()
111 vint8m4_t test_vnsra_wx_i8m4(vint16m8_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8m4()
165 vint16m1_t test_vnsra_wx_i16m1(vint32m2_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i16m1()
[all …]
H A Dvnsrl.c12 vuint8mf8_t test_vnsrl_wv_u8mf8(vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { in test_vnsrl_wv_u8mf8()
21 vuint8mf8_t test_vnsrl_wx_u8mf8(vuint16mf4_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8mf8()
39 vuint8mf4_t test_vnsrl_wx_u8mf4(vuint16mf2_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8mf4()
57 vuint8mf2_t test_vnsrl_wx_u8mf2(vuint16m1_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8mf2()
66 vuint8m1_t test_vnsrl_wv_u8m1(vuint16m2_t op1, vuint8m1_t shift, size_t vl) { in test_vnsrl_wv_u8m1()
75 vuint8m1_t test_vnsrl_wx_u8m1(vuint16m2_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8m1()
84 vuint8m2_t test_vnsrl_wv_u8m2(vuint16m4_t op1, vuint8m2_t shift, size_t vl) { in test_vnsrl_wv_u8m2()
93 vuint8m2_t test_vnsrl_wx_u8m2(vuint16m4_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8m2()
111 vuint8m4_t test_vnsrl_wx_u8m4(vuint16m8_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8m4()
165 vuint16m1_t test_vnsrl_wx_u16m1(vuint32m2_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u16m1()
[all …]
H A Dvnclip.c21 vint8mf8_t test_vnclip_wx_i8mf8(vint16mf4_t op1, size_t shift, size_t vl) { in test_vnclip_wx_i8mf8()
75 vint8m1_t test_vnclip_wx_i8m1(vint16m2_t op1, size_t shift, size_t vl) { in test_vnclip_wx_i8m1()
93 vint8m2_t test_vnclip_wx_i8m2(vint16m4_t op1, size_t shift, size_t vl) { in test_vnclip_wx_i8m2()
120 vint16mf4_t test_vnclip_wv_i16mf4(vint32mf2_t op1, vuint16mf4_t shift, in test_vnclip_wv_i16mf4()
139 vint16mf2_t test_vnclip_wv_i16mf2(vint32m1_t op1, vuint16mf2_t shift, in test_vnclip_wv_i16mf2()
212 vint32mf2_t test_vnclip_wv_i32mf2(vint64m1_t op1, vuint32mf2_t shift, in test_vnclip_wv_i32mf2()
323 vuint8mf2_t test_vnclipu_wv_u8mf2(vuint16m1_t op1, vuint8mf2_t shift, in test_vnclipu_wv_u8mf2()
434 vuint16m1_t test_vnclipu_wv_u16m1(vuint32m2_t op1, vuint16m1_t shift, in test_vnclipu_wv_u16m1()
610 vint16m1_t op1, vuint8mf2_t shift, in test_vnclip_wv_i8mf2_m()
733 vint32m2_t op1, vuint16m1_t shift, in test_vnclip_wv_i16m1_m()
[all …]
H A Dvsra.c12 vint8mf8_t test_vsra_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vsra_vv_i8mf8()
21 vint8mf8_t test_vsra_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf8()
39 vint8mf4_t test_vsra_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf4()
57 vint8mf2_t test_vsra_vx_i8mf2(vint8mf2_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf2()
66 vint8m1_t test_vsra_vv_i8m1(vint8m1_t op1, vuint8m1_t shift, size_t vl) { in test_vsra_vv_i8m1()
75 vint8m1_t test_vsra_vx_i8m1(vint8m1_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8m1()
84 vint8m2_t test_vsra_vv_i8m2(vint8m2_t op1, vuint8m2_t shift, size_t vl) { in test_vsra_vv_i8m2()
93 vint8m2_t test_vsra_vx_i8m2(vint8m2_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8m2()
102 vint8m4_t test_vsra_vv_i8m4(vint8m4_t op1, vuint8m4_t shift, size_t vl) { in test_vsra_vv_i8m4()
111 vint8m4_t test_vsra_vx_i8m4(vint8m4_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8m4()
[all …]
H A Dvssra.c12 vint8mf8_t test_vssra_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vssra_vv_i8mf8()
21 vint8mf8_t test_vssra_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8mf8()
39 vint8mf4_t test_vssra_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8mf4()
57 vint8mf2_t test_vssra_vx_i8mf2(vint8mf2_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8mf2()
75 vint8m1_t test_vssra_vx_i8m1(vint8m1_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8m1()
93 vint8m2_t test_vssra_vx_i8m2(vint8m2_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8m2()
111 vint8m4_t test_vssra_vx_i8m4(vint8m4_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8m4()
129 vint8m8_t test_vssra_vx_i8m8(vint8m8_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8m8()
138 vint16mf4_t test_vssra_vv_i16mf4(vint16mf4_t op1, vuint16mf4_t shift, in test_vssra_vv_i16mf4()
157 vint16mf2_t test_vssra_vv_i16mf2(vint16mf2_t op1, vuint16mf2_t shift, in test_vssra_vv_i16mf2()
[all …]
H A Dvssrl.c21 vuint8mf8_t test_vssrl_vx_u8mf8(vuint8mf8_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8mf8()
39 vuint8mf4_t test_vssrl_vx_u8mf4(vuint8mf4_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8mf4()
75 vuint8m1_t test_vssrl_vx_u8m1(vuint8m1_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8m1()
93 vuint8m2_t test_vssrl_vx_u8m2(vuint8m2_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8m2()
111 vuint8m4_t test_vssrl_vx_u8m4(vuint8m4_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8m4()
129 vuint8m8_t test_vssrl_vx_u8m8(vuint8m8_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8m8()
138 vuint16mf4_t test_vssrl_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t shift, in test_vssrl_vv_u16mf4()
157 vuint16mf2_t test_vssrl_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t shift, in test_vssrl_vv_u16mf2()
412 vuint8mf8_t op1, vuint8mf8_t shift, in test_vssrl_vv_u8mf8_m()
433 vuint8mf4_t op1, vuint8mf4_t shift, in test_vssrl_vv_u8mf4_m()
[all …]
H A Dvsrl.c12 vuint8mf8_t test_vsrl_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vsrl_vv_u8mf8()
21 vuint8mf8_t test_vsrl_vx_u8mf8(vuint8mf8_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf8()
39 vuint8mf4_t test_vsrl_vx_u8mf4(vuint8mf4_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf4()
57 vuint8mf2_t test_vsrl_vx_u8mf2(vuint8mf2_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf2()
66 vuint8m1_t test_vsrl_vv_u8m1(vuint8m1_t op1, vuint8m1_t shift, size_t vl) { in test_vsrl_vv_u8m1()
75 vuint8m1_t test_vsrl_vx_u8m1(vuint8m1_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8m1()
84 vuint8m2_t test_vsrl_vv_u8m2(vuint8m2_t op1, vuint8m2_t shift, size_t vl) { in test_vsrl_vv_u8m2()
93 vuint8m2_t test_vsrl_vx_u8m2(vuint8m2_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8m2()
102 vuint8m4_t test_vsrl_vv_u8m4(vuint8m4_t op1, vuint8m4_t shift, size_t vl) { in test_vsrl_vv_u8m4()
111 vuint8m4_t test_vsrl_vx_u8m4(vuint8m4_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8m4()
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/llvm-project-15.0.7/clang/test/CodeGen/X86/
H A Drot-intrinsics.c17 unsigned char test__rolb(unsigned char value, int shift) { in test__rolb()
24 unsigned short test__rolw(unsigned short value, int shift) { in test__rolw()
31 unsigned int test__rold(unsigned int value, int shift) { in test__rold()
39 unsigned long test__rolq(unsigned long value, int shift) { in test__rolq()
47 unsigned char test__rorb(unsigned char value, int shift) { in test__rorb()
61 unsigned int test__rord(unsigned int value, int shift) { in test__rord()
69 unsigned long test__rorq(unsigned long value, int shift) { in test__rorq()
84 unsigned int test_rotl(unsigned int value, int shift) { in test_rotl()
91 unsigned long test_lrotl(unsigned long value, int shift) { in test_lrotl()
110 unsigned int test_rotr(unsigned int value, int shift) { in test_rotr()
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/llvm-project-15.0.7/clang/test/CodeGen/arm-mve-intrinsics/
H A Dscalar-shifts.c22 int64_t test_asrl(int64_t value, int32_t shift) in test_asrl()
41 uint64_t test_lsll(uint64_t value, int32_t shift) in test_lsll()
51 int32_t test_sqrshr(int32_t value, int32_t shift) in test_sqrshr()
70 int64_t test_sqrshrl(int64_t value, int32_t shift) in test_sqrshrl()
89 int64_t test_sqrshrl_sat48(int64_t value, int32_t shift) in test_sqrshrl_sat48()
157 uint32_t test_uqrshl(uint32_t value, int32_t shift) in test_uqrshl()
176 uint64_t test_uqrshll(uint64_t value, int32_t shift) in test_uqrshll()
195 uint64_t test_uqrshll_sat48(uint64_t value, int32_t shift) in test_uqrshll_sat48()
/llvm-project-15.0.7/flang/test/Lower/Intrinsics/
H A Dishftc.f9051 subroutine dyn_optional_scalar(i, shift, size) argument
53 integer :: i, shift local
77 subroutine dyn_optional_array_scalar(i, shift, size) argument
79 integer :: i(:), shift(:) local
102 subroutine dyn_optional_array(i, shift, size) argument
104 integer :: i(:), shift(:) local
128 integer :: shift(4) = [2, 1, -1, -2] variable
H A Deoshift.f904 subroutine eoshift_test1(arr, shift) argument
6 integer :: shift local
27 subroutine eoshift_test2(arr, shift, bound, dim) argument
29 integer, dimension(3) :: shift local
51 subroutine eoshift_test3(arr, shift, dim) argument
53 integer :: shift, dim local
78 subroutine eoshift_test_dynamic_optional(array, shift, boundary) argument
83 integer :: shift local
/llvm-project-15.0.7/clang/test/CodeGen/PowerPC/
H A Dbuiltins-ppc-xlcompat-rotate.c59 void test_builtin_ppc_rlwnm2(unsigned int shift) { in test_builtin_ppc_rlwnm2()
79 unsigned int testrotatel4(unsigned int rs, unsigned int shift) { in testrotatel4()
87 unsigned long long testrotatel8(unsigned long long rs, unsigned long long shift) { in testrotatel8()
96 unsigned long long testrdlam(unsigned long long rs, unsigned int shift) { in testrdlam()
/llvm-project-15.0.7/flang/lib/Evaluate/
H A Dstatic-data.cpp37 int shift{bigEndian ? 8 : 0}; in Push() local
47 int shift{bigEndian ? 24 : 0}; in Push() local
71 int shift{bigEndian ? 8 : 0}; in AsU16String() local
86 int shift{bigEndian ? 24 : 0}; in AsU32String() local
/llvm-project-15.0.7/compiler-rt/lib/builtins/arm/
H A Dudivsi3.S198 #define block(shift) \ argument
213 #define block(shift) \ argument
/llvm-project-15.0.7/compiler-rt/lib/builtins/
H A Dfloatunsisf.c34 const int shift = significandBits - exponent; in __floatunsisf() local
37 const int shift = exponent - significandBits; in __floatunsisf() local

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