1 /*-
2 * Copyright (c) 2001-2003, Shunsuke Akiyama <[email protected]>.
3 * Copyright (c) 1997, 1998, 1999, 2000 Bill Paul <[email protected]>.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27 /*-
28 * SPDX-License-Identifier: BSD-4-Clause AND BSD-2-Clause-FreeBSD
29 *
30 * Copyright (c) 1997, 1998, 1999, 2000
31 * Bill Paul <[email protected]>. All rights reserved.
32 *
33 * Redistribution and use in source and binary forms, with or without
34 * modification, are permitted provided that the following conditions
35 * are met:
36 * 1. Redistributions of source code must retain the above copyright
37 * notice, this list of conditions and the following disclaimer.
38 * 2. Redistributions in binary form must reproduce the above copyright
39 * notice, this list of conditions and the following disclaimer in the
40 * documentation and/or other materials provided with the distribution.
41 * 3. All advertising materials mentioning features or use of this software
42 * must display the following acknowledgement:
43 * This product includes software developed by Bill Paul.
44 * 4. Neither the name of the author nor the names of any co-contributors
45 * may be used to endorse or promote products derived from this software
46 * without specific prior written permission.
47 *
48 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
49 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
50 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
51 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
52 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
53 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
54 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
55 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
56 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
57 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
58 * THE POSSIBILITY OF SUCH DAMAGE.
59 */
60
61 #include <sys/cdefs.h>
62 __FBSDID("$FreeBSD$");
63
64 /*
65 * RealTek RTL8150 USB to fast ethernet controller driver.
66 * Datasheet is available from
67 * ftp://ftp.realtek.com.tw/lancard/data_sheet/8150/.
68 */
69
70 #include <sys/stdint.h>
71 #include <sys/stddef.h>
72 #include <sys/param.h>
73 #include <sys/queue.h>
74 #include <sys/types.h>
75 #include <sys/systm.h>
76 #include <sys/socket.h>
77 #include <sys/kernel.h>
78 #include <sys/bus.h>
79 #include <sys/module.h>
80 #include <sys/lock.h>
81 #include <sys/mutex.h>
82 #include <sys/condvar.h>
83 #include <sys/sysctl.h>
84 #include <sys/sx.h>
85 #include <sys/unistd.h>
86 #include <sys/callout.h>
87 #include <sys/malloc.h>
88 #include <sys/priv.h>
89
90 #include <net/if.h>
91 #include <net/if_var.h>
92
93 #include <dev/usb/usb.h>
94 #include <dev/usb/usbdi.h>
95 #include <dev/usb/usbdi_util.h>
96 #include "usbdevs.h"
97
98 #define USB_DEBUG_VAR rue_debug
99 #include <dev/usb/usb_debug.h>
100 #include <dev/usb/usb_process.h>
101
102 #include <dev/usb/net/usb_ethernet.h>
103 #include <dev/usb/net/if_ruereg.h>
104
105 #ifdef USB_DEBUG
106 static int rue_debug = 0;
107
108 static SYSCTL_NODE(_hw_usb, OID_AUTO, rue, CTLFLAG_RW, 0, "USB rue");
109 SYSCTL_INT(_hw_usb_rue, OID_AUTO, debug, CTLFLAG_RWTUN,
110 &rue_debug, 0, "Debug level");
111 #endif
112
113 /*
114 * Various supported device vendors/products.
115 */
116
117 static const STRUCT_USB_HOST_ID rue_devs[] = {
118 {USB_VPI(USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAKTX, 0)},
119 {USB_VPI(USB_VENDOR_REALTEK, USB_PRODUCT_REALTEK_USBKR100, 0)},
120 {USB_VPI(USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01, 0)},
121 };
122
123 /* prototypes */
124
125 static device_probe_t rue_probe;
126 static device_attach_t rue_attach;
127 static device_detach_t rue_detach;
128
129 static miibus_readreg_t rue_miibus_readreg;
130 static miibus_writereg_t rue_miibus_writereg;
131 static miibus_statchg_t rue_miibus_statchg;
132
133 static usb_callback_t rue_intr_callback;
134 static usb_callback_t rue_bulk_read_callback;
135 static usb_callback_t rue_bulk_write_callback;
136
137 static uether_fn_t rue_attach_post;
138 static uether_fn_t rue_init;
139 static uether_fn_t rue_stop;
140 static uether_fn_t rue_start;
141 static uether_fn_t rue_tick;
142 static uether_fn_t rue_setmulti;
143 static uether_fn_t rue_setpromisc;
144
145 static int rue_read_mem(struct rue_softc *, uint16_t, void *, int);
146 static int rue_write_mem(struct rue_softc *, uint16_t, void *, int);
147 static uint8_t rue_csr_read_1(struct rue_softc *, uint16_t);
148 static uint16_t rue_csr_read_2(struct rue_softc *, uint16_t);
149 static int rue_csr_write_1(struct rue_softc *, uint16_t, uint8_t);
150 static int rue_csr_write_2(struct rue_softc *, uint16_t, uint16_t);
151 static int rue_csr_write_4(struct rue_softc *, int, uint32_t);
152
153 static void rue_reset(struct rue_softc *);
154 static int rue_ifmedia_upd(struct ifnet *);
155 static void rue_ifmedia_sts(struct ifnet *, struct ifmediareq *);
156
157 static const struct usb_config rue_config[RUE_N_TRANSFER] = {
158
159 [RUE_BULK_DT_WR] = {
160 .type = UE_BULK,
161 .endpoint = UE_ADDR_ANY,
162 .direction = UE_DIR_OUT,
163 .bufsize = MCLBYTES,
164 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
165 .callback = rue_bulk_write_callback,
166 .timeout = 10000, /* 10 seconds */
167 },
168
169 [RUE_BULK_DT_RD] = {
170 .type = UE_BULK,
171 .endpoint = UE_ADDR_ANY,
172 .direction = UE_DIR_IN,
173 .bufsize = (MCLBYTES + 4),
174 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
175 .callback = rue_bulk_read_callback,
176 .timeout = 0, /* no timeout */
177 },
178
179 [RUE_INTR_DT_RD] = {
180 .type = UE_INTERRUPT,
181 .endpoint = UE_ADDR_ANY,
182 .direction = UE_DIR_IN,
183 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
184 .bufsize = 0, /* use wMaxPacketSize */
185 .callback = rue_intr_callback,
186 },
187 };
188
189 static device_method_t rue_methods[] = {
190 /* Device interface */
191 DEVMETHOD(device_probe, rue_probe),
192 DEVMETHOD(device_attach, rue_attach),
193 DEVMETHOD(device_detach, rue_detach),
194
195 /* MII interface */
196 DEVMETHOD(miibus_readreg, rue_miibus_readreg),
197 DEVMETHOD(miibus_writereg, rue_miibus_writereg),
198 DEVMETHOD(miibus_statchg, rue_miibus_statchg),
199
200 DEVMETHOD_END
201 };
202
203 static driver_t rue_driver = {
204 .name = "rue",
205 .methods = rue_methods,
206 .size = sizeof(struct rue_softc),
207 };
208
209 static devclass_t rue_devclass;
210
211 DRIVER_MODULE_ORDERED(rue, uhub, rue_driver, rue_devclass, NULL, NULL,
212 SI_ORDER_ANY);
213 DRIVER_MODULE(miibus, rue, miibus_driver, miibus_devclass, NULL, NULL);
214 MODULE_DEPEND(rue, uether, 1, 1, 1);
215 MODULE_DEPEND(rue, usb, 1, 1, 1);
216 MODULE_DEPEND(rue, ether, 1, 1, 1);
217 MODULE_DEPEND(rue, miibus, 1, 1, 1);
218 MODULE_VERSION(rue, 1);
219 USB_PNP_HOST_INFO(rue_devs);
220
221 static const struct usb_ether_methods rue_ue_methods = {
222 .ue_attach_post = rue_attach_post,
223 .ue_start = rue_start,
224 .ue_init = rue_init,
225 .ue_stop = rue_stop,
226 .ue_tick = rue_tick,
227 .ue_setmulti = rue_setmulti,
228 .ue_setpromisc = rue_setpromisc,
229 .ue_mii_upd = rue_ifmedia_upd,
230 .ue_mii_sts = rue_ifmedia_sts,
231 };
232
233 #define RUE_SETBIT(sc, reg, x) \
234 rue_csr_write_1(sc, reg, rue_csr_read_1(sc, reg) | (x))
235
236 #define RUE_CLRBIT(sc, reg, x) \
237 rue_csr_write_1(sc, reg, rue_csr_read_1(sc, reg) & ~(x))
238
239 static int
rue_read_mem(struct rue_softc * sc,uint16_t addr,void * buf,int len)240 rue_read_mem(struct rue_softc *sc, uint16_t addr, void *buf, int len)
241 {
242 struct usb_device_request req;
243
244 req.bmRequestType = UT_READ_VENDOR_DEVICE;
245 req.bRequest = UR_SET_ADDRESS;
246 USETW(req.wValue, addr);
247 USETW(req.wIndex, 0);
248 USETW(req.wLength, len);
249
250 return (uether_do_request(&sc->sc_ue, &req, buf, 1000));
251 }
252
253 static int
rue_write_mem(struct rue_softc * sc,uint16_t addr,void * buf,int len)254 rue_write_mem(struct rue_softc *sc, uint16_t addr, void *buf, int len)
255 {
256 struct usb_device_request req;
257
258 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
259 req.bRequest = UR_SET_ADDRESS;
260 USETW(req.wValue, addr);
261 USETW(req.wIndex, 0);
262 USETW(req.wLength, len);
263
264 return (uether_do_request(&sc->sc_ue, &req, buf, 1000));
265 }
266
267 static uint8_t
rue_csr_read_1(struct rue_softc * sc,uint16_t reg)268 rue_csr_read_1(struct rue_softc *sc, uint16_t reg)
269 {
270 uint8_t val;
271
272 rue_read_mem(sc, reg, &val, 1);
273 return (val);
274 }
275
276 static uint16_t
rue_csr_read_2(struct rue_softc * sc,uint16_t reg)277 rue_csr_read_2(struct rue_softc *sc, uint16_t reg)
278 {
279 uint8_t val[2];
280
281 rue_read_mem(sc, reg, &val, 2);
282 return (UGETW(val));
283 }
284
285 static int
rue_csr_write_1(struct rue_softc * sc,uint16_t reg,uint8_t val)286 rue_csr_write_1(struct rue_softc *sc, uint16_t reg, uint8_t val)
287 {
288 return (rue_write_mem(sc, reg, &val, 1));
289 }
290
291 static int
rue_csr_write_2(struct rue_softc * sc,uint16_t reg,uint16_t val)292 rue_csr_write_2(struct rue_softc *sc, uint16_t reg, uint16_t val)
293 {
294 uint8_t temp[2];
295
296 USETW(temp, val);
297 return (rue_write_mem(sc, reg, &temp, 2));
298 }
299
300 static int
rue_csr_write_4(struct rue_softc * sc,int reg,uint32_t val)301 rue_csr_write_4(struct rue_softc *sc, int reg, uint32_t val)
302 {
303 uint8_t temp[4];
304
305 USETDW(temp, val);
306 return (rue_write_mem(sc, reg, &temp, 4));
307 }
308
309 static int
rue_miibus_readreg(device_t dev,int phy,int reg)310 rue_miibus_readreg(device_t dev, int phy, int reg)
311 {
312 struct rue_softc *sc = device_get_softc(dev);
313 uint16_t rval;
314 uint16_t ruereg;
315 int locked;
316
317 if (phy != 0) /* RTL8150 supports PHY == 0, only */
318 return (0);
319
320 locked = mtx_owned(&sc->sc_mtx);
321 if (!locked)
322 RUE_LOCK(sc);
323
324 switch (reg) {
325 case MII_BMCR:
326 ruereg = RUE_BMCR;
327 break;
328 case MII_BMSR:
329 ruereg = RUE_BMSR;
330 break;
331 case MII_ANAR:
332 ruereg = RUE_ANAR;
333 break;
334 case MII_ANER:
335 ruereg = RUE_AER;
336 break;
337 case MII_ANLPAR:
338 ruereg = RUE_ANLP;
339 break;
340 case MII_PHYIDR1:
341 case MII_PHYIDR2:
342 rval = 0;
343 goto done;
344 default:
345 if (RUE_REG_MIN <= reg && reg <= RUE_REG_MAX) {
346 rval = rue_csr_read_1(sc, reg);
347 goto done;
348 }
349 device_printf(sc->sc_ue.ue_dev, "bad phy register\n");
350 rval = 0;
351 goto done;
352 }
353
354 rval = rue_csr_read_2(sc, ruereg);
355 done:
356 if (!locked)
357 RUE_UNLOCK(sc);
358 return (rval);
359 }
360
361 static int
rue_miibus_writereg(device_t dev,int phy,int reg,int data)362 rue_miibus_writereg(device_t dev, int phy, int reg, int data)
363 {
364 struct rue_softc *sc = device_get_softc(dev);
365 uint16_t ruereg;
366 int locked;
367
368 if (phy != 0) /* RTL8150 supports PHY == 0, only */
369 return (0);
370
371 locked = mtx_owned(&sc->sc_mtx);
372 if (!locked)
373 RUE_LOCK(sc);
374
375 switch (reg) {
376 case MII_BMCR:
377 ruereg = RUE_BMCR;
378 break;
379 case MII_BMSR:
380 ruereg = RUE_BMSR;
381 break;
382 case MII_ANAR:
383 ruereg = RUE_ANAR;
384 break;
385 case MII_ANER:
386 ruereg = RUE_AER;
387 break;
388 case MII_ANLPAR:
389 ruereg = RUE_ANLP;
390 break;
391 case MII_PHYIDR1:
392 case MII_PHYIDR2:
393 goto done;
394 default:
395 if (RUE_REG_MIN <= reg && reg <= RUE_REG_MAX) {
396 rue_csr_write_1(sc, reg, data);
397 goto done;
398 }
399 device_printf(sc->sc_ue.ue_dev, " bad phy register\n");
400 goto done;
401 }
402 rue_csr_write_2(sc, ruereg, data);
403 done:
404 if (!locked)
405 RUE_UNLOCK(sc);
406 return (0);
407 }
408
409 static void
rue_miibus_statchg(device_t dev)410 rue_miibus_statchg(device_t dev)
411 {
412 /*
413 * When the code below is enabled the card starts doing weird
414 * things after link going from UP to DOWN and back UP.
415 *
416 * Looks like some of register writes below messes up PHY
417 * interface.
418 *
419 * No visible regressions were found after commenting this code
420 * out, so that disable it for good.
421 */
422 #if 0
423 struct rue_softc *sc = device_get_softc(dev);
424 struct mii_data *mii = GET_MII(sc);
425 uint16_t bmcr;
426 int locked;
427
428 locked = mtx_owned(&sc->sc_mtx);
429 if (!locked)
430 RUE_LOCK(sc);
431
432 RUE_CLRBIT(sc, RUE_CR, (RUE_CR_RE | RUE_CR_TE));
433
434 bmcr = rue_csr_read_2(sc, RUE_BMCR);
435
436 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX)
437 bmcr |= RUE_BMCR_SPD_SET;
438 else
439 bmcr &= ~RUE_BMCR_SPD_SET;
440
441 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX)
442 bmcr |= RUE_BMCR_DUPLEX;
443 else
444 bmcr &= ~RUE_BMCR_DUPLEX;
445
446 rue_csr_write_2(sc, RUE_BMCR, bmcr);
447
448 RUE_SETBIT(sc, RUE_CR, (RUE_CR_RE | RUE_CR_TE));
449
450 if (!locked)
451 RUE_UNLOCK(sc);
452 #endif
453 }
454
455 static void
rue_setpromisc(struct usb_ether * ue)456 rue_setpromisc(struct usb_ether *ue)
457 {
458 struct rue_softc *sc = uether_getsc(ue);
459 struct ifnet *ifp = uether_getifp(ue);
460
461 RUE_LOCK_ASSERT(sc, MA_OWNED);
462
463 /* If we want promiscuous mode, set the allframes bit. */
464 if (ifp->if_flags & IFF_PROMISC)
465 RUE_SETBIT(sc, RUE_RCR, RUE_RCR_AAP);
466 else
467 RUE_CLRBIT(sc, RUE_RCR, RUE_RCR_AAP);
468 }
469
470 /*
471 * Program the 64-bit multicast hash filter.
472 */
473 static void
rue_setmulti(struct usb_ether * ue)474 rue_setmulti(struct usb_ether *ue)
475 {
476 struct rue_softc *sc = uether_getsc(ue);
477 struct ifnet *ifp = uether_getifp(ue);
478 uint16_t rxcfg;
479 int h = 0;
480 uint32_t hashes[2] = { 0, 0 };
481 struct ifmultiaddr *ifma;
482 int mcnt = 0;
483
484 RUE_LOCK_ASSERT(sc, MA_OWNED);
485
486 rxcfg = rue_csr_read_2(sc, RUE_RCR);
487
488 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) {
489 rxcfg |= (RUE_RCR_AAM | RUE_RCR_AAP);
490 rxcfg &= ~RUE_RCR_AM;
491 rue_csr_write_2(sc, RUE_RCR, rxcfg);
492 rue_csr_write_4(sc, RUE_MAR0, 0xFFFFFFFF);
493 rue_csr_write_4(sc, RUE_MAR4, 0xFFFFFFFF);
494 return;
495 }
496
497 /* first, zot all the existing hash bits */
498 rue_csr_write_4(sc, RUE_MAR0, 0);
499 rue_csr_write_4(sc, RUE_MAR4, 0);
500
501 /* now program new ones */
502 if_maddr_rlock(ifp);
503 CK_STAILQ_FOREACH (ifma, &ifp->if_multiaddrs, ifma_link)
504 {
505 if (ifma->ifma_addr->sa_family != AF_LINK)
506 continue;
507 h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
508 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
509 if (h < 32)
510 hashes[0] |= (1 << h);
511 else
512 hashes[1] |= (1 << (h - 32));
513 mcnt++;
514 }
515 if_maddr_runlock(ifp);
516
517 if (mcnt)
518 rxcfg |= RUE_RCR_AM;
519 else
520 rxcfg &= ~RUE_RCR_AM;
521
522 rxcfg &= ~(RUE_RCR_AAM | RUE_RCR_AAP);
523
524 rue_csr_write_2(sc, RUE_RCR, rxcfg);
525 rue_csr_write_4(sc, RUE_MAR0, hashes[0]);
526 rue_csr_write_4(sc, RUE_MAR4, hashes[1]);
527 }
528
529 static void
rue_reset(struct rue_softc * sc)530 rue_reset(struct rue_softc *sc)
531 {
532 int i;
533
534 rue_csr_write_1(sc, RUE_CR, RUE_CR_SOFT_RST);
535
536 for (i = 0; i != RUE_TIMEOUT; i++) {
537 if (uether_pause(&sc->sc_ue, hz / 1000))
538 break;
539 if (!(rue_csr_read_1(sc, RUE_CR) & RUE_CR_SOFT_RST))
540 break;
541 }
542 if (i == RUE_TIMEOUT)
543 device_printf(sc->sc_ue.ue_dev, "reset never completed\n");
544
545 uether_pause(&sc->sc_ue, hz / 100);
546 }
547
548 static void
rue_attach_post(struct usb_ether * ue)549 rue_attach_post(struct usb_ether *ue)
550 {
551 struct rue_softc *sc = uether_getsc(ue);
552
553 /* reset the adapter */
554 rue_reset(sc);
555
556 /* get station address from the EEPROM */
557 rue_read_mem(sc, RUE_EEPROM_IDR0, ue->ue_eaddr, ETHER_ADDR_LEN);
558 }
559
560 /*
561 * Probe for a RTL8150 chip.
562 */
563 static int
rue_probe(device_t dev)564 rue_probe(device_t dev)
565 {
566 struct usb_attach_arg *uaa = device_get_ivars(dev);
567
568 if (uaa->usb_mode != USB_MODE_HOST)
569 return (ENXIO);
570 if (uaa->info.bConfigIndex != RUE_CONFIG_IDX)
571 return (ENXIO);
572 if (uaa->info.bIfaceIndex != RUE_IFACE_IDX)
573 return (ENXIO);
574
575 return (usbd_lookup_id_by_uaa(rue_devs, sizeof(rue_devs), uaa));
576 }
577
578 /*
579 * Attach the interface. Allocate softc structures, do ifmedia
580 * setup and ethernet/BPF attach.
581 */
582 static int
rue_attach(device_t dev)583 rue_attach(device_t dev)
584 {
585 struct usb_attach_arg *uaa = device_get_ivars(dev);
586 struct rue_softc *sc = device_get_softc(dev);
587 struct usb_ether *ue = &sc->sc_ue;
588 uint8_t iface_index;
589 int error;
590
591 device_set_usb_desc(dev);
592 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
593
594 iface_index = RUE_IFACE_IDX;
595 error = usbd_transfer_setup(uaa->device, &iface_index,
596 sc->sc_xfer, rue_config, RUE_N_TRANSFER,
597 sc, &sc->sc_mtx);
598 if (error) {
599 device_printf(dev, "allocating USB transfers failed\n");
600 goto detach;
601 }
602
603 ue->ue_sc = sc;
604 ue->ue_dev = dev;
605 ue->ue_udev = uaa->device;
606 ue->ue_mtx = &sc->sc_mtx;
607 ue->ue_methods = &rue_ue_methods;
608
609 error = uether_ifattach(ue);
610 if (error) {
611 device_printf(dev, "could not attach interface\n");
612 goto detach;
613 }
614 return (0); /* success */
615
616 detach:
617 rue_detach(dev);
618 return (ENXIO); /* failure */
619 }
620
621 static int
rue_detach(device_t dev)622 rue_detach(device_t dev)
623 {
624 struct rue_softc *sc = device_get_softc(dev);
625 struct usb_ether *ue = &sc->sc_ue;
626
627 usbd_transfer_unsetup(sc->sc_xfer, RUE_N_TRANSFER);
628 uether_ifdetach(ue);
629 mtx_destroy(&sc->sc_mtx);
630
631 return (0);
632 }
633
634 static void
rue_intr_callback(struct usb_xfer * xfer,usb_error_t error)635 rue_intr_callback(struct usb_xfer *xfer, usb_error_t error)
636 {
637 struct rue_softc *sc = usbd_xfer_softc(xfer);
638 struct ifnet *ifp = uether_getifp(&sc->sc_ue);
639 struct rue_intrpkt pkt;
640 struct usb_page_cache *pc;
641 int actlen;
642
643 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
644
645 switch (USB_GET_STATE(xfer)) {
646 case USB_ST_TRANSFERRED:
647
648 if (ifp && (ifp->if_drv_flags & IFF_DRV_RUNNING) &&
649 actlen >= (int)sizeof(pkt)) {
650
651 pc = usbd_xfer_get_frame(xfer, 0);
652 usbd_copy_out(pc, 0, &pkt, sizeof(pkt));
653
654 if_inc_counter(ifp, IFCOUNTER_IERRORS, pkt.rue_rxlost_cnt);
655 if_inc_counter(ifp, IFCOUNTER_IERRORS, pkt.rue_crcerr_cnt);
656 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, pkt.rue_col_cnt);
657 }
658 /* FALLTHROUGH */
659 case USB_ST_SETUP:
660 tr_setup:
661 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
662 usbd_transfer_submit(xfer);
663 return;
664
665 default: /* Error */
666 if (error != USB_ERR_CANCELLED) {
667 /* try to clear stall first */
668 usbd_xfer_set_stall(xfer);
669 goto tr_setup;
670 }
671 return;
672 }
673 }
674
675 static void
rue_bulk_read_callback(struct usb_xfer * xfer,usb_error_t error)676 rue_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
677 {
678 struct rue_softc *sc = usbd_xfer_softc(xfer);
679 struct usb_ether *ue = &sc->sc_ue;
680 struct ifnet *ifp = uether_getifp(ue);
681 struct usb_page_cache *pc;
682 uint16_t status;
683 int actlen;
684
685 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
686
687 switch (USB_GET_STATE(xfer)) {
688 case USB_ST_TRANSFERRED:
689
690 if (actlen < 4) {
691 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
692 goto tr_setup;
693 }
694 pc = usbd_xfer_get_frame(xfer, 0);
695 usbd_copy_out(pc, actlen - 4, &status, sizeof(status));
696 actlen -= 4;
697
698 /* check receive packet was valid or not */
699 status = le16toh(status);
700 if ((status & RUE_RXSTAT_VALID) == 0) {
701 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
702 goto tr_setup;
703 }
704 uether_rxbuf(ue, pc, 0, actlen);
705 /* FALLTHROUGH */
706 case USB_ST_SETUP:
707 tr_setup:
708 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
709 usbd_transfer_submit(xfer);
710 uether_rxflush(ue);
711 return;
712
713 default: /* Error */
714 DPRINTF("bulk read error, %s\n",
715 usbd_errstr(error));
716
717 if (error != USB_ERR_CANCELLED) {
718 /* try to clear stall first */
719 usbd_xfer_set_stall(xfer);
720 goto tr_setup;
721 }
722 return;
723 }
724 }
725
726 static void
rue_bulk_write_callback(struct usb_xfer * xfer,usb_error_t error)727 rue_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
728 {
729 struct rue_softc *sc = usbd_xfer_softc(xfer);
730 struct ifnet *ifp = uether_getifp(&sc->sc_ue);
731 struct usb_page_cache *pc;
732 struct mbuf *m;
733 int temp_len;
734
735 switch (USB_GET_STATE(xfer)) {
736 case USB_ST_TRANSFERRED:
737 DPRINTFN(11, "transfer complete\n");
738 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
739
740 /* FALLTHROUGH */
741 case USB_ST_SETUP:
742 tr_setup:
743 if ((sc->sc_flags & RUE_FLAG_LINK) == 0) {
744 /*
745 * don't send anything if there is no link !
746 */
747 return;
748 }
749 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
750
751 if (m == NULL)
752 return;
753 if (m->m_pkthdr.len > MCLBYTES)
754 m->m_pkthdr.len = MCLBYTES;
755 temp_len = m->m_pkthdr.len;
756
757 pc = usbd_xfer_get_frame(xfer, 0);
758 usbd_m_copy_in(pc, 0, m, 0, m->m_pkthdr.len);
759
760 /*
761 * This is an undocumented behavior.
762 * RTL8150 chip doesn't send frame length smaller than
763 * RUE_MIN_FRAMELEN (60) byte packet.
764 */
765 if (temp_len < RUE_MIN_FRAMELEN) {
766 usbd_frame_zero(pc, temp_len,
767 RUE_MIN_FRAMELEN - temp_len);
768 temp_len = RUE_MIN_FRAMELEN;
769 }
770 usbd_xfer_set_frame_len(xfer, 0, temp_len);
771
772 /*
773 * if there's a BPF listener, bounce a copy
774 * of this frame to him:
775 */
776 BPF_MTAP(ifp, m);
777
778 m_freem(m);
779
780 usbd_transfer_submit(xfer);
781
782 return;
783
784 default: /* Error */
785 DPRINTFN(11, "transfer error, %s\n",
786 usbd_errstr(error));
787
788 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
789
790 if (error != USB_ERR_CANCELLED) {
791 /* try to clear stall first */
792 usbd_xfer_set_stall(xfer);
793 goto tr_setup;
794 }
795 return;
796 }
797 }
798
799 static void
rue_tick(struct usb_ether * ue)800 rue_tick(struct usb_ether *ue)
801 {
802 struct rue_softc *sc = uether_getsc(ue);
803 struct mii_data *mii = GET_MII(sc);
804
805 RUE_LOCK_ASSERT(sc, MA_OWNED);
806
807 mii_tick(mii);
808 if ((sc->sc_flags & RUE_FLAG_LINK) == 0
809 && mii->mii_media_status & IFM_ACTIVE &&
810 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
811 sc->sc_flags |= RUE_FLAG_LINK;
812 rue_start(ue);
813 }
814 }
815
816 static void
rue_start(struct usb_ether * ue)817 rue_start(struct usb_ether *ue)
818 {
819 struct rue_softc *sc = uether_getsc(ue);
820
821 /*
822 * start the USB transfers, if not already started:
823 */
824 usbd_transfer_start(sc->sc_xfer[RUE_INTR_DT_RD]);
825 usbd_transfer_start(sc->sc_xfer[RUE_BULK_DT_RD]);
826 usbd_transfer_start(sc->sc_xfer[RUE_BULK_DT_WR]);
827 }
828
829 static void
rue_init(struct usb_ether * ue)830 rue_init(struct usb_ether *ue)
831 {
832 struct rue_softc *sc = uether_getsc(ue);
833 struct ifnet *ifp = uether_getifp(ue);
834
835 RUE_LOCK_ASSERT(sc, MA_OWNED);
836
837 /*
838 * Cancel pending I/O
839 */
840 rue_reset(sc);
841
842 /* Set MAC address */
843 rue_write_mem(sc, RUE_IDR0, IF_LLADDR(ifp), ETHER_ADDR_LEN);
844
845 rue_stop(ue);
846
847 /*
848 * Set the initial TX and RX configuration.
849 */
850 rue_csr_write_1(sc, RUE_TCR, RUE_TCR_CONFIG);
851 rue_csr_write_2(sc, RUE_RCR, RUE_RCR_CONFIG|RUE_RCR_AB);
852
853 /* Load the multicast filter */
854 rue_setpromisc(ue);
855 /* Load the multicast filter. */
856 rue_setmulti(ue);
857
858 /* Enable RX and TX */
859 rue_csr_write_1(sc, RUE_CR, (RUE_CR_TE | RUE_CR_RE | RUE_CR_EP3CLREN));
860
861 usbd_xfer_set_stall(sc->sc_xfer[RUE_BULK_DT_WR]);
862
863 ifp->if_drv_flags |= IFF_DRV_RUNNING;
864 rue_start(ue);
865 }
866
867 /*
868 * Set media options.
869 */
870 static int
rue_ifmedia_upd(struct ifnet * ifp)871 rue_ifmedia_upd(struct ifnet *ifp)
872 {
873 struct rue_softc *sc = ifp->if_softc;
874 struct mii_data *mii = GET_MII(sc);
875 struct mii_softc *miisc;
876 int error;
877
878 RUE_LOCK_ASSERT(sc, MA_OWNED);
879
880 sc->sc_flags &= ~RUE_FLAG_LINK;
881 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
882 PHY_RESET(miisc);
883 error = mii_mediachg(mii);
884 return (error);
885 }
886
887 /*
888 * Report current media status.
889 */
890 static void
rue_ifmedia_sts(struct ifnet * ifp,struct ifmediareq * ifmr)891 rue_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
892 {
893 struct rue_softc *sc = ifp->if_softc;
894 struct mii_data *mii = GET_MII(sc);
895
896 RUE_LOCK(sc);
897 mii_pollstat(mii);
898 ifmr->ifm_active = mii->mii_media_active;
899 ifmr->ifm_status = mii->mii_media_status;
900 RUE_UNLOCK(sc);
901 }
902
903 static void
rue_stop(struct usb_ether * ue)904 rue_stop(struct usb_ether *ue)
905 {
906 struct rue_softc *sc = uether_getsc(ue);
907 struct ifnet *ifp = uether_getifp(ue);
908
909 RUE_LOCK_ASSERT(sc, MA_OWNED);
910
911 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
912 sc->sc_flags &= ~RUE_FLAG_LINK;
913
914 /*
915 * stop all the transfers, if not already stopped:
916 */
917 usbd_transfer_stop(sc->sc_xfer[RUE_BULK_DT_WR]);
918 usbd_transfer_stop(sc->sc_xfer[RUE_BULK_DT_RD]);
919 usbd_transfer_stop(sc->sc_xfer[RUE_INTR_DT_RD]);
920
921 rue_csr_write_1(sc, RUE_CR, 0x00);
922
923 rue_reset(sc);
924 }
925