1 //===-- RISCVBaseInfo.h - Top level definitions for RISCV MC ----*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains small standalone enum definitions for the RISCV target
11 // useful for the compiler back-end and the MC libraries.
12 //
13 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVBASEINFO_H
15 #define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVBASEINFO_H
16
17 #include "MCTargetDesc/RISCVMCTargetDesc.h"
18 #include "llvm/ADT/StringRef.h"
19 #include "llvm/ADT/StringSwitch.h"
20 #include "llvm/MC/SubtargetFeature.h"
21
22 namespace llvm {
23
24 // RISCVII - This namespace holds all of the target specific flags that
25 // instruction info tracks. All definitions must match RISCVInstrFormats.td.
26 namespace RISCVII {
27 enum {
28 InstFormatPseudo = 0,
29 InstFormatR = 1,
30 InstFormatR4 = 2,
31 InstFormatI = 3,
32 InstFormatS = 4,
33 InstFormatB = 5,
34 InstFormatU = 6,
35 InstFormatJ = 7,
36 InstFormatCR = 8,
37 InstFormatCI = 9,
38 InstFormatCSS = 10,
39 InstFormatCIW = 11,
40 InstFormatCL = 12,
41 InstFormatCS = 13,
42 InstFormatCA = 14,
43 InstFormatCB = 15,
44 InstFormatCJ = 16,
45 InstFormatOther = 17,
46
47 InstFormatMask = 31
48 };
49
50 enum {
51 MO_None,
52 MO_LO,
53 MO_HI,
54 MO_PCREL_HI,
55 };
56 } // namespace RISCVII
57
58 // Describes the predecessor/successor bits used in the FENCE instruction.
59 namespace RISCVFenceField {
60 enum FenceField {
61 I = 8,
62 O = 4,
63 R = 2,
64 W = 1
65 };
66 }
67
68 // Describes the supported floating point rounding mode encodings.
69 namespace RISCVFPRndMode {
70 enum RoundingMode {
71 RNE = 0,
72 RTZ = 1,
73 RDN = 2,
74 RUP = 3,
75 RMM = 4,
76 DYN = 7,
77 Invalid
78 };
79
roundingModeToString(RoundingMode RndMode)80 inline static StringRef roundingModeToString(RoundingMode RndMode) {
81 switch (RndMode) {
82 default:
83 llvm_unreachable("Unknown floating point rounding mode");
84 case RISCVFPRndMode::RNE:
85 return "rne";
86 case RISCVFPRndMode::RTZ:
87 return "rtz";
88 case RISCVFPRndMode::RDN:
89 return "rdn";
90 case RISCVFPRndMode::RUP:
91 return "rup";
92 case RISCVFPRndMode::RMM:
93 return "rmm";
94 case RISCVFPRndMode::DYN:
95 return "dyn";
96 }
97 }
98
stringToRoundingMode(StringRef Str)99 inline static RoundingMode stringToRoundingMode(StringRef Str) {
100 return StringSwitch<RoundingMode>(Str)
101 .Case("rne", RISCVFPRndMode::RNE)
102 .Case("rtz", RISCVFPRndMode::RTZ)
103 .Case("rdn", RISCVFPRndMode::RDN)
104 .Case("rup", RISCVFPRndMode::RUP)
105 .Case("rmm", RISCVFPRndMode::RMM)
106 .Case("dyn", RISCVFPRndMode::DYN)
107 .Default(RISCVFPRndMode::Invalid);
108 }
109
isValidRoundingMode(unsigned Mode)110 inline static bool isValidRoundingMode(unsigned Mode) {
111 switch (Mode) {
112 default:
113 return false;
114 case RISCVFPRndMode::RNE:
115 case RISCVFPRndMode::RTZ:
116 case RISCVFPRndMode::RDN:
117 case RISCVFPRndMode::RUP:
118 case RISCVFPRndMode::RMM:
119 case RISCVFPRndMode::DYN:
120 return true;
121 }
122 }
123 } // namespace RISCVFPRndMode
124
125 namespace RISCVSysReg {
126 struct SysReg {
127 const char *Name;
128 unsigned Encoding;
129 // FIXME: add these additional fields when needed.
130 // Privilege Access: Read, Write, Read-Only.
131 // unsigned ReadWrite;
132 // Privilege Mode: User, System or Machine.
133 // unsigned Mode;
134 // Check field name.
135 // unsigned Extra;
136 // Register number without the privilege bits.
137 // unsigned Number;
138 FeatureBitset FeaturesRequired;
139 bool isRV32Only;
140
haveRequiredFeaturesSysReg141 bool haveRequiredFeatures(FeatureBitset ActiveFeatures) const {
142 // Not in 32-bit mode.
143 if (isRV32Only && ActiveFeatures[RISCV::Feature64Bit])
144 return false;
145 // No required feature associated with the system register.
146 if (FeaturesRequired.none())
147 return true;
148 return (FeaturesRequired & ActiveFeatures) == FeaturesRequired;
149 }
150 };
151
152 #define GET_SysRegsList_DECL
153 #include "RISCVGenSystemOperands.inc"
154 } // end namespace RISCVSysReg
155
156 } // namespace llvm
157
158 #endif
159