1 /*
2 * Copyright (c) 2007-2021 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28 /*
29 * @OSF_COPYRIGHT@
30 */
31
32 #ifndef _ARM_MACHINE_ROUTINES_H_
33 #define _ARM_MACHINE_ROUTINES_H_
34
35 #include <mach/mach_types.h>
36 #include <mach/vm_types.h>
37 #include <mach/boolean.h>
38 #include <kern/kern_types.h>
39 #include <pexpert/pexpert.h>
40
41 #include <sys/cdefs.h>
42 #include <sys/appleapiopts.h>
43
44 #include <stdarg.h>
45
46 #ifdef XNU_KERNEL_PRIVATE
47 #include <kern/sched_hygiene.h>
48 #include <kern/startup.h>
49 #endif /* XNU_KERNEL_PRIVATE */
50
51 __BEGIN_DECLS
52 #ifdef XNU_KERNEL_PRIVATE
53 #ifdef __arm64__
54 typedef bool (*expected_fault_handler_t)(arm_saved_state_t *);
55 #endif /* __arm64__ */
56 #endif /* XNU_KERNEL_PRIVATE */
57
58 /* Interrupt handling */
59
60 void ml_cpu_signal(unsigned int cpu_id);
61 void ml_cpu_signal_deferred_adjust_timer(uint64_t nanosecs);
62 uint64_t ml_cpu_signal_deferred_get_timer(void);
63 void ml_cpu_signal_deferred(unsigned int cpu_id);
64 void ml_cpu_signal_retract(unsigned int cpu_id);
65
66 #ifdef XNU_KERNEL_PRIVATE
67 extern void ml_wait_for_cpu_signal_to_enable(void);
68 extern void assert_ml_cpu_signal_is_enabled(bool enabled);
69 #endif /* XNU_KERNEL_PRIVATE */
70
71 /* Initialize Interrupts */
72 void ml_init_interrupt(void);
73
74 /* Get Interrupts Enabled */
75 boolean_t ml_get_interrupts_enabled(void);
76
77 /* Set Interrupts Enabled */
78 #if __has_feature(ptrauth_calls)
79 uint64_t ml_pac_safe_interrupts_disable(void);
80 void ml_pac_safe_interrupts_restore(uint64_t);
81 #endif /* __has_feature(ptrauth_calls) */
82 boolean_t ml_set_interrupts_enabled_with_debug(boolean_t enable, boolean_t debug);
83 boolean_t ml_set_interrupts_enabled(boolean_t enable);
84 boolean_t ml_early_set_interrupts_enabled(boolean_t enable);
85
86 /*
87 * Functions for disabling measurements for AppleCLPC only.
88 */
89 boolean_t sched_perfcontrol_ml_set_interrupts_without_measurement(boolean_t enable);
90 void sched_perfcontrol_abandon_preemption_disable_measurement(void);
91
92 /* Check if running at interrupt context */
93 boolean_t ml_at_interrupt_context(void);
94
95
96 /* Generate a fake interrupt */
97 void ml_cause_interrupt(void);
98
99
100 #ifdef XNU_KERNEL_PRIVATE
101
102 /* did this interrupt context interrupt userspace? */
103 bool ml_did_interrupt_userspace(void);
104
105 /* Clear interrupt spin debug state for thread */
106
107 #if SCHED_HYGIENE_DEBUG
108 void mt_cur_cpu_cycles_instrs_speculative(uint64_t *cycles, uint64_t *instrs);
109
110 #if CONFIG_CPU_COUNTERS
111 #define INTERRUPT_MASKED_DEBUG_CAPTURE_PMC(thread) \
112 if (sched_hygiene_debug_pmc) { \
113 mt_cur_cpu_cycles_instrs_speculative(&thread->machine.intmask_cycles, \
114 &thread->machine.intmask_instr); \
115 }
116 #else /* CONFIG_CPU_COUNTERS */
117 #define INTERRUPT_MASKED_DEBUG_CAPTURE_PMC(thread)
118 #endif /* !CONFIG_CPU_COUNTERS */
119
120 #define INTERRUPT_MASKED_DEBUG_START(handler_addr, type) \
121 do { \
122 if ((interrupt_masked_debug_mode || sched_preemption_disable_debug_mode) && os_atomic_load(&interrupt_masked_timeout, relaxed) > 0) { \
123 thread_t thread = current_thread(); \
124 thread->machine.int_type = type; \
125 thread->machine.int_handler_addr = (uintptr_t)VM_KERNEL_STRIP_UPTR(handler_addr); \
126 thread->machine.inthandler_timestamp = ml_get_sched_hygiene_timebase(); \
127 INTERRUPT_MASKED_DEBUG_CAPTURE_PMC(thread); \
128 thread->machine.int_vector = (uintptr_t)NULL; \
129 } \
130 } while (0)
131
132 #define INTERRUPT_MASKED_DEBUG_END() \
133 do { \
134 if ((interrupt_masked_debug_mode || sched_preemption_disable_debug_mode) && os_atomic_load(&interrupt_masked_timeout, relaxed) > 0) { \
135 thread_t thread = current_thread(); \
136 ml_handle_interrupt_handler_duration(thread); \
137 thread->machine.inthandler_timestamp = 0; \
138 thread->machine.inthandler_abandon = false; \
139 } \
140 } while (0)
141
142 void ml_irq_debug_start(uintptr_t handler, uintptr_t vector);
143 void ml_irq_debug_end(void);
144 void ml_irq_debug_abandon(void);
145
146 void ml_spin_debug_reset(thread_t thread);
147 void ml_spin_debug_clear(thread_t thread);
148 void ml_spin_debug_clear_self(void);
149 void ml_handle_interrupts_disabled_duration(thread_t thread);
150 void ml_handle_stackshot_interrupt_disabled_duration(thread_t thread);
151 void ml_handle_interrupt_handler_duration(thread_t thread);
152
153 #else /* SCHED_HYGIENE_DEBUG */
154
155 #define INTERRUPT_MASKED_DEBUG_START(handler_addr, type)
156 #define INTERRUPT_MASKED_DEBUG_END()
157
158 #endif /* SCHED_HYGIENE_DEBUG */
159
160 extern bool ml_snoop_thread_is_on_core(thread_t thread);
161 extern boolean_t ml_is_quiescing(void);
162 extern void ml_set_is_quiescing(boolean_t);
163 extern uint64_t ml_get_booter_memory_size(void);
164 #endif
165
166 /* Type for the Time Base Enable function */
167 typedef void (*time_base_enable_t)(cpu_id_t cpu_id, boolean_t enable);
168 #if defined(PEXPERT_KERNEL_PRIVATE) || defined(MACH_KERNEL_PRIVATE)
169 /* Type for the Processor Cache Dispatch function */
170 typedef void (*cache_dispatch_t)(cpu_id_t cpu_id, unsigned int select, unsigned int param0, unsigned int param1);
171
172 typedef uint32_t (*get_decrementer_t)(void);
173 typedef void (*set_decrementer_t)(uint32_t);
174 typedef void (*fiq_handler_t)(void);
175
176 #endif
177
178 #define CacheConfig 0x00000000UL
179 #define CacheControl 0x00000001UL
180 #define CacheClean 0x00000002UL
181 #define CacheCleanRegion 0x00000003UL
182 #define CacheCleanFlush 0x00000004UL
183 #define CacheCleanFlushRegion 0x00000005UL
184 #define CacheShutdown 0x00000006UL
185
186 #define CacheControlEnable 0x00000000UL
187
188 #define CacheConfigCCSIDR 0x00000001UL
189 #define CacheConfigSize 0x00000100UL
190
191 /* Type for the Processor Idle function */
192 typedef void (*processor_idle_t)(cpu_id_t cpu_id, boolean_t enter, uint64_t *new_timeout_ticks);
193
194 /* Type for the Idle Tickle function */
195 typedef void (*idle_tickle_t)(void);
196
197 /* Type for the Idle Timer function */
198 typedef void (*idle_timer_t)(void *refcon, uint64_t *new_timeout_ticks);
199
200 /* Type for the IPI Hander */
201 typedef void (*ipi_handler_t)(void);
202
203 /* Type for the Lockdown Hander */
204 typedef void (*lockdown_handler_t)(void *);
205
206 /* Type for the Platform specific Error Handler */
207 typedef void (*platform_error_handler_t)(void *refcon, vm_offset_t fault_addr);
208
209 /*
210 * The exception callback (ex_cb) module is obsolete. Some definitions related
211 * to ex_cb were exported through the SDK, and are only left here for historical
212 * reasons.
213 */
214
215 /* Unused. Left for historical reasons. */
216 typedef enum{
217 EXCB_CLASS_ILLEGAL_INSTR_SET,
218 #ifdef CONFIG_XNUPOST
219 EXCB_CLASS_TEST1,
220 EXCB_CLASS_TEST2,
221 EXCB_CLASS_TEST3,
222 #endif
223 EXCB_CLASS_MAX
224 }
225 ex_cb_class_t;
226
227 /* Unused. Left for historical reasons. */
228 typedef enum{
229 EXCB_ACTION_RERUN,
230 EXCB_ACTION_NONE,
231 #ifdef CONFIG_XNUPOST
232 EXCB_ACTION_TEST_FAIL,
233 #endif
234 }
235 ex_cb_action_t;
236
237 /* Unused. Left for historical reasons. */
238 typedef struct{
239 vm_offset_t far;
240 }
241 ex_cb_state_t;
242
243 /* Unused. Left for historical reasons. */
244 typedef ex_cb_action_t (*ex_cb_t) (
245 ex_cb_class_t cb_class,
246 void *refcon,
247 const ex_cb_state_t *state
248 );
249
250 /*
251 * This function is unimplemented. Its definition is left for historical
252 * reasons.
253 */
254 kern_return_t ex_cb_register(
255 ex_cb_class_t cb_class,
256 ex_cb_t cb,
257 void *refcon );
258
259 /*
260 * This function is unimplemented. Its definition is left for historical
261 * reasons.
262 */
263 ex_cb_action_t ex_cb_invoke(
264 ex_cb_class_t cb_class,
265 vm_offset_t far);
266
267 typedef enum {
268 CLUSTER_TYPE_SMP = 0,
269 CLUSTER_TYPE_E = 1,
270 CLUSTER_TYPE_P = 2,
271 MAX_CPU_TYPES,
272 } cluster_type_t;
273
274 #ifdef XNU_KERNEL_PRIVATE
275 void ml_parse_cpu_topology(void);
276 #endif /* XNU_KERNEL_PRIVATE */
277
278 unsigned int ml_get_cpu_count(void);
279
280 unsigned int ml_get_cpu_number_type(cluster_type_t cluster_type, bool logical, bool available);
281
282 unsigned int ml_get_cluster_number_type(cluster_type_t cluster_type);
283
284 unsigned int ml_cpu_cache_sharing(unsigned int level, cluster_type_t cluster_type, bool include_all_cpu_types);
285
286 unsigned int ml_get_cpu_types(void);
287
288 int ml_get_boot_cpu_number(void);
289
290 int ml_get_cpu_number(uint32_t phys_id);
291
292 unsigned int ml_get_cpu_number_local(void);
293
294 int ml_get_cluster_number(uint32_t phys_id);
295
296 int ml_get_max_cpu_number(void);
297
298 int ml_get_max_cluster_number(void);
299
300 /*
301 * Return the id of a cluster's first cpu.
302 */
303 unsigned int ml_get_first_cpu_id(unsigned int cluster_id);
304
305 /*
306 * Return the die id of a cluster.
307 */
308 unsigned int ml_get_die_id(unsigned int cluster_id);
309
310 /*
311 * Return the index of a cluster in its die.
312 */
313 unsigned int ml_get_die_cluster_id(unsigned int cluster_id);
314
315 /*
316 * Return the highest die id of the system.
317 */
318 unsigned int ml_get_max_die_id(void);
319
320 #ifdef __arm64__
321 int ml_get_cluster_number_local(void);
322 #endif /* __arm64__ */
323
324 /* Struct for ml_cpu_get_info */
325 struct ml_cpu_info {
326 unsigned long vector_unit;
327 unsigned long cache_line_size;
328 unsigned long l1_icache_size;
329 unsigned long l1_dcache_size;
330 unsigned long l2_settings;
331 unsigned long l2_cache_size;
332 unsigned long l3_settings;
333 unsigned long l3_cache_size;
334 };
335 typedef struct ml_cpu_info ml_cpu_info_t;
336
337 cluster_type_t ml_get_boot_cluster_type(void);
338
339 #ifdef KERNEL_PRIVATE
340 #include "cpu_topology.h"
341 #endif /* KERNEL_PRIVATE */
342
343 /*!
344 * @function ml_map_cpu_pio
345 * @brief Maps per-CPU and per-cluster PIO registers found in EDT. This needs to be
346 * called after arm_vm_init() so it can't be part of ml_parse_cpu_topology().
347 */
348 void ml_map_cpu_pio(void);
349
350 /* Struct for ml_processor_register */
351 struct ml_processor_info {
352 cpu_id_t cpu_id;
353 vm_offset_t start_paddr;
354 boolean_t supports_nap;
355 void *platform_cache_dispatch;
356 time_base_enable_t time_base_enable;
357 processor_idle_t processor_idle;
358 idle_tickle_t *idle_tickle;
359 idle_timer_t idle_timer;
360 void *idle_timer_refcon;
361 vm_offset_t powergate_stub_addr;
362 uint32_t powergate_stub_length;
363 uint32_t powergate_latency;
364 platform_error_handler_t platform_error_handler;
365 uint64_t regmap_paddr;
366 uint32_t phys_id;
367 uint32_t log_id;
368 uint32_t l2_access_penalty;
369 uint32_t cluster_id;
370 cluster_type_t cluster_type;
371 uint32_t l2_cache_id;
372 uint32_t l2_cache_size;
373 uint32_t l3_cache_id;
374 uint32_t l3_cache_size;
375 };
376 typedef struct ml_processor_info ml_processor_info_t;
377
378 #if defined(PEXPERT_KERNEL_PRIVATE) || defined(MACH_KERNEL_PRIVATE)
379 /* Struct for ml_init_timebase */
380 struct tbd_ops {
381 fiq_handler_t tbd_fiq_handler;
382 get_decrementer_t tbd_get_decrementer;
383 set_decrementer_t tbd_set_decrementer;
384 };
385 typedef struct tbd_ops *tbd_ops_t;
386 typedef struct tbd_ops tbd_ops_data_t;
387 #endif
388
389
390 /*!
391 * @function ml_processor_register
392 *
393 * @abstract callback from platform kext to register processor
394 *
395 * @discussion This function is called by the platform kext when a processor is
396 * being registered. This is called while running on the CPU itself, as part of
397 * its initialization.
398 *
399 * @param ml_processor_info provides machine-specific information about the
400 * processor to xnu.
401 *
402 * @param processor is set as an out-parameter to an opaque handle that should
403 * be used by the platform kext when referring to this processor in the future.
404 *
405 * @param ipi_handler is set as an out-parameter to the function that should be
406 * registered as the IPI handler.
407 *
408 * @param pmi_handler is set as an out-parameter to the function that should be
409 * registered as the PMI handler.
410 *
411 * @returns KERN_SUCCESS on success and an error code, otherwise.
412 */
413 kern_return_t ml_processor_register(ml_processor_info_t *ml_processor_info,
414 processor_t *processor, ipi_handler_t *ipi_handler,
415 perfmon_interrupt_handler_func *pmi_handler);
416
417 /* Register a lockdown handler */
418 kern_return_t ml_lockdown_handler_register(lockdown_handler_t, void *);
419
420 /* Register a M$ flushing */
421 typedef kern_return_t (*mcache_flush_function)(void *service);
422 kern_return_t ml_mcache_flush_callback_register(mcache_flush_function func, void *service);
423 kern_return_t ml_mcache_flush(void);
424
425 #if XNU_KERNEL_PRIVATE
426 void ml_lockdown_init(void);
427
428 /* Machine layer routine for intercepting panics */
429 __printflike(1, 0)
430 void ml_panic_trap_to_debugger(const char *panic_format_str,
431 va_list *panic_args,
432 unsigned int reason,
433 void *ctx,
434 uint64_t panic_options_mask,
435 unsigned long panic_caller,
436 const char *panic_initiator);
437 #endif /* XNU_KERNEL_PRIVATE */
438
439 /* Initialize Interrupts */
440 void ml_install_interrupt_handler(
441 void *nub,
442 int source,
443 void *target,
444 IOInterruptHandler handler,
445 void *refCon);
446
447 vm_offset_t
448 ml_static_vtop(
449 vm_offset_t);
450
451 kern_return_t
452 ml_static_verify_page_protections(
453 uint64_t base, uint64_t size, vm_prot_t prot);
454
455 vm_offset_t
456 ml_static_ptovirt(
457 vm_offset_t);
458
459 /* Offset required to obtain absolute time value from tick counter */
460 uint64_t ml_get_abstime_offset(void);
461
462 /* Offset required to obtain continuous time value from tick counter */
463 uint64_t ml_get_conttime_offset(void);
464
465 #ifdef __APPLE_API_UNSTABLE
466 /* PCI config cycle probing */
467 boolean_t ml_probe_read(
468 vm_offset_t paddr,
469 unsigned int *val);
470 boolean_t ml_probe_read_64(
471 addr64_t paddr,
472 unsigned int *val);
473
474 /* Read physical address byte */
475 unsigned int ml_phys_read_byte(
476 vm_offset_t paddr);
477 unsigned int ml_phys_read_byte_64(
478 addr64_t paddr);
479
480 /* Read physical address half word */
481 unsigned int ml_phys_read_half(
482 vm_offset_t paddr);
483 unsigned int ml_phys_read_half_64(
484 addr64_t paddr);
485
486 /* Read physical address word*/
487 unsigned int ml_phys_read(
488 vm_offset_t paddr);
489 unsigned int ml_phys_read_64(
490 addr64_t paddr);
491 unsigned int ml_phys_read_word(
492 vm_offset_t paddr);
493 unsigned int ml_phys_read_word_64(
494 addr64_t paddr);
495
496 /* Read physical address double word */
497 unsigned long long ml_phys_read_double(
498 vm_offset_t paddr);
499 unsigned long long ml_phys_read_double_64(
500 addr64_t paddr);
501
502 /* Write physical address byte */
503 void ml_phys_write_byte(
504 vm_offset_t paddr, unsigned int data);
505 void ml_phys_write_byte_64(
506 addr64_t paddr, unsigned int data);
507
508 /* Write physical address half word */
509 void ml_phys_write_half(
510 vm_offset_t paddr, unsigned int data);
511 void ml_phys_write_half_64(
512 addr64_t paddr, unsigned int data);
513
514 /* Write physical address word */
515 void ml_phys_write(
516 vm_offset_t paddr, unsigned int data);
517 void ml_phys_write_64(
518 addr64_t paddr, unsigned int data);
519 void ml_phys_write_word(
520 vm_offset_t paddr, unsigned int data);
521 void ml_phys_write_word_64(
522 addr64_t paddr, unsigned int data);
523
524 /* Write physical address double word */
525 void ml_phys_write_double(
526 vm_offset_t paddr, unsigned long long data);
527 void ml_phys_write_double_64(
528 addr64_t paddr, unsigned long long data);
529
530 #if defined(__SIZEOF_INT128__) && APPLE_ARM64_ARCH_FAMILY
531 /*
532 * Not all dependent projects consuming `machine_routines.h` are built using
533 * toolchains that support 128-bit integers.
534 */
535 #define BUILD_QUAD_WORD_FUNCS 1
536 #else
537 #define BUILD_QUAD_WORD_FUNCS 0
538 #endif /* defined(__SIZEOF_INT128__) && APPLE_ARM64_ARCH_FAMILY */
539
540 #if BUILD_QUAD_WORD_FUNCS
541 /*
542 * Not all dependent projects have their own typedef of `uint128_t` at the
543 * time they consume `machine_routines.h`.
544 */
545 typedef unsigned __int128 uint128_t;
546
547 /* Read physical address quad word */
548 uint128_t ml_phys_read_quad(
549 vm_offset_t paddr);
550 uint128_t ml_phys_read_quad_64(
551 addr64_t paddr);
552
553 /* Write physical address quad word */
554 void ml_phys_write_quad(
555 vm_offset_t paddr, uint128_t data);
556 void ml_phys_write_quad_64(
557 addr64_t paddr, uint128_t data);
558 #endif /* BUILD_QUAD_WORD_FUNCS */
559
560 void ml_static_mfree(
561 vm_offset_t,
562 vm_size_t);
563
564 kern_return_t
565 ml_static_protect(
566 vm_offset_t start,
567 vm_size_t size,
568 vm_prot_t new_prot);
569
570 /* virtual to physical on wired pages */
571 vm_offset_t ml_vtophys(
572 vm_offset_t vaddr);
573
574 /* Get processor cache info */
575 void ml_cpu_get_info(ml_cpu_info_t *ml_cpu_info);
576 void ml_cpu_get_info_type(ml_cpu_info_t * ml_cpu_info, cluster_type_t cluster_type);
577
578 #endif /* __APPLE_API_UNSTABLE */
579
580 typedef int ml_page_protection_t;
581
582 /* Return the type of page protection supported */
583 ml_page_protection_t ml_page_protection_type(void);
584
585 #ifdef __APPLE_API_PRIVATE
586 #ifdef XNU_KERNEL_PRIVATE
587 vm_size_t ml_nofault_copy(
588 vm_offset_t virtsrc,
589 vm_offset_t virtdst,
590 vm_size_t size);
591 boolean_t ml_validate_nofault(
592 vm_offset_t virtsrc, vm_size_t size);
593 #endif /* XNU_KERNEL_PRIVATE */
594 #if defined(PEXPERT_KERNEL_PRIVATE) || defined(MACH_KERNEL_PRIVATE)
595 /* IO memory map services */
596
597 extern vm_offset_t io_map(
598 vm_map_offset_t phys_addr,
599 vm_size_t size,
600 unsigned int flags,
601 vm_prot_t prot,
602 bool unmappable);
603
604 /* Map memory map IO space */
605 vm_offset_t ml_io_map(
606 vm_offset_t phys_addr,
607 vm_size_t size);
608
609 vm_offset_t ml_io_map_wcomb(
610 vm_offset_t phys_addr,
611 vm_size_t size);
612
613 vm_offset_t ml_io_map_unmappable(
614 vm_offset_t phys_addr,
615 vm_size_t size,
616 uint32_t flags);
617
618 vm_offset_t ml_io_map_with_prot(
619 vm_offset_t phys_addr,
620 vm_size_t size,
621 vm_prot_t prot);
622
623 void ml_io_unmap(
624 vm_offset_t addr,
625 vm_size_t sz);
626
627 void ml_get_bouncepool_info(
628 vm_offset_t *phys_addr,
629 vm_size_t *size);
630
631 vm_map_address_t ml_map_high_window(
632 vm_offset_t phys_addr,
633 vm_size_t len);
634
635 void ml_init_timebase(
636 void *args,
637 tbd_ops_t tbd_funcs,
638 vm_offset_t int_address,
639 vm_offset_t int_value);
640
641 uint64_t ml_get_timebase(void);
642
643 #if MACH_KERNEL_PRIVATE
644 void ml_memory_to_timebase_fence(void);
645 void ml_timebase_to_memory_fence(void);
646 #endif /* MACH_KERNEL_PRIVATE */
647
648 uint64_t ml_get_speculative_timebase(void);
649
650 uint64_t ml_get_timebase_entropy(void);
651
652 boolean_t ml_delay_should_spin(uint64_t interval);
653
654 void ml_delay_on_yield(void);
655
656 uint32_t ml_get_decrementer(void);
657
658 #include <machine/config.h>
659
660 uint64_t ml_get_hwclock(void);
661
662 #ifdef __arm64__
663 boolean_t ml_get_timer_pending(void);
664 #endif
665
666 void platform_syscall(
667 struct arm_saved_state *);
668
669 void ml_set_decrementer(
670 uint32_t dec_value);
671
672 boolean_t is_user_contex(
673 void);
674
675 void ml_init_arm_debug_interface(void *args, vm_offset_t virt_address);
676
677 /* These calls are only valid if __ARM_USER_PROTECT__ is defined */
678 uintptr_t arm_user_protect_begin(
679 thread_t thread);
680
681 void arm_user_protect_end(
682 thread_t thread,
683 uintptr_t up,
684 boolean_t disable_interrupts);
685
686 #endif /* PEXPERT_KERNEL_PRIVATE || MACH_KERNEL_PRIVATE */
687
688 /* Zero bytes starting at a physical address */
689 void bzero_phys(
690 addr64_t phys_address,
691 vm_size_t length);
692
693 void bzero_phys_nc(addr64_t src64, vm_size_t bytes);
694
695 #if MACH_KERNEL_PRIVATE
696 #ifdef __arm64__
697 /* Pattern-fill buffer with zeros or a 32-bit pattern;
698 * target must be 128-byte aligned and sized a multiple of 128
699 * Both variants emit stores with non-temporal properties.
700 */
701 void fill32_dczva(addr64_t, vm_size_t);
702 void fill32_nt(addr64_t, vm_size_t, uint32_t);
703 bool cpu_interrupt_is_pending(void);
704
705 #endif // __arm64__
706 #endif // MACH_KERNEL_PRIVATE
707
708 void ml_thread_policy(
709 thread_t thread,
710 unsigned policy_id,
711 unsigned policy_info);
712
713 #define MACHINE_GROUP 0x00000001
714 #define MACHINE_NETWORK_GROUP 0x10000000
715 #define MACHINE_NETWORK_WORKLOOP 0x00000001
716 #define MACHINE_NETWORK_NETISR 0x00000002
717
718 /* Set the maximum number of CPUs */
719 void ml_set_max_cpus(
720 unsigned int max_cpus);
721
722 /* Return the maximum number of CPUs set by ml_set_max_cpus(), waiting if necessary */
723 unsigned int ml_wait_max_cpus(
724 void);
725
726 /* Return the maximum memory size */
727 unsigned int ml_get_machine_mem(void);
728
729 #ifdef XNU_KERNEL_PRIVATE
730 /* Return max offset */
731 vm_map_offset_t ml_get_max_offset(
732 boolean_t is64,
733 unsigned int option);
734 #define MACHINE_MAX_OFFSET_DEFAULT 0x01
735 #define MACHINE_MAX_OFFSET_MIN 0x02
736 #define MACHINE_MAX_OFFSET_MAX 0x04
737 #define MACHINE_MAX_OFFSET_DEVICE 0x08
738 #endif
739
740 extern void ml_cpu_init_completed(void);
741 extern void ml_cpu_up(void);
742 extern void ml_cpu_down(void);
743 extern int ml_find_next_up_processor(void);
744
745 /*
746 * The update to CPU counts needs to be separate from other actions
747 * in ml_cpu_up() and ml_cpu_down()
748 * because we don't update the counts when CLPC causes temporary
749 * cluster powerdown events, as these must be transparent to the user.
750 */
751 extern void ml_cpu_up_update_counts(int cpu_id);
752 extern void ml_cpu_down_update_counts(int cpu_id);
753 extern void ml_arm_sleep(void);
754
755 extern uint64_t ml_get_wake_timebase(void);
756 extern uint64_t ml_get_conttime_wake_time(void);
757
758 /* Time since the system was reset (as part of boot/wake) */
759 uint64_t ml_get_time_since_reset(void);
760
761 /*
762 * Called by ApplePMGR to set wake time. Units and epoch are identical
763 * to mach_continuous_time(). Has no effect on !HAS_CONTINUOUS_HWCLOCK
764 * chips. If wake_time == UINT64_MAX, that means the wake time is
765 * unknown and calls to ml_get_time_since_reset() will return UINT64_MAX.
766 */
767 void ml_set_reset_time(uint64_t wake_time);
768
769 #ifdef XNU_KERNEL_PRIVATE
770 /* Just a stub on ARM */
771 extern kern_return_t ml_interrupt_prewarm(uint64_t deadline);
772 #define TCOAL_DEBUG(x, a, b, c, d, e) do { } while(0)
773 #endif /* XNU_KERNEL_PRIVATE */
774
775 /* Bytes available on current stack */
776 vm_offset_t ml_stack_remaining(void);
777
778 #ifdef MACH_KERNEL_PRIVATE
779 uint32_t get_fpscr(void);
780 void set_fpscr(uint32_t);
781 void machine_conf(void);
782 void machine_lockdown(void);
783
784 #ifdef __arm64__
785 unsigned long update_mdscr(unsigned long clear, unsigned long set);
786 #endif /* __arm64__ */
787
788 extern void arm_debug_set_cp14(arm_debug_state_t *debug_state);
789 extern void fiq_context_init(boolean_t enable_fiq);
790
791 extern void reenable_async_aborts(void);
792
793 #ifdef __arm64__
794 uint64_t ml_cluster_wfe_timeout(uint32_t wfe_cluster_id);
795 #endif
796
797 #ifdef MONITOR
798 #define MONITOR_SET_ENTRY 0x800 /* Set kernel entry point from monitor */
799 #define MONITOR_LOCKDOWN 0x801 /* Enforce kernel text/rodata integrity */
800 unsigned long monitor_call(uintptr_t callnum, uintptr_t arg1,
801 uintptr_t arg2, uintptr_t arg3);
802 #endif /* MONITOR */
803
804 #if __ARM_KERNEL_PROTECT__
805 extern void set_vbar_el1(uint64_t);
806 #endif /* __ARM_KERNEL_PROTECT__ */
807
808
809 #endif /* MACH_KERNEL_PRIVATE */
810
811 extern uint32_t arm_debug_read_dscr(void);
812
813 extern int set_be_bit(void);
814 extern int clr_be_bit(void);
815 extern int be_tracing(void);
816
817 /* Please note that cpu_broadcast_xcall is not as simple is you would like it to be.
818 * It will sometimes put the calling thread to sleep, and it is up to your callback
819 * to wake it up as needed, where "as needed" is defined as "all other CPUs have
820 * called the broadcast func". Look around the kernel for examples, or instead use
821 * cpu_broadcast_xcall_simple() which does indeed act like you would expect, given
822 * the prototype.
823 */
824 typedef void (*broadcastFunc) (void *);
825 unsigned int cpu_broadcast_xcall(uint32_t *, boolean_t, broadcastFunc, void *);
826 unsigned int cpu_broadcast_xcall_simple(boolean_t, broadcastFunc, void *);
827 __result_use_check kern_return_t cpu_xcall(int, broadcastFunc, void *);
828 __result_use_check kern_return_t cpu_immediate_xcall(int, broadcastFunc, void *);
829
830 #ifdef KERNEL_PRIVATE
831
832 /* Interface to be used by the perf. controller to register a callback, in a
833 * single-threaded fashion. The callback will receive notifications of
834 * processor performance quality-of-service changes from the scheduler.
835 */
836
837 #ifdef __arm64__
838 typedef void (*cpu_qos_update_t)(int throughput_qos, uint64_t qos_param1, uint64_t qos_param2);
839 void cpu_qos_update_register(cpu_qos_update_t);
840 #endif /* __arm64__ */
841
842 struct going_on_core {
843 uint64_t thread_id;
844 uint16_t qos_class;
845 uint16_t urgency; /* XCPM compatibility */
846 uint32_t is_32_bit : 1; /* uses 32-bit ISA/register state in userspace (which may differ from address space size) */
847 uint32_t is_kernel_thread : 1;
848 uint64_t thread_group_id;
849 void *thread_group_data;
850 uint64_t scheduling_latency; /* absolute time between when thread was made runnable and this ctx switch */
851 uint64_t start_time;
852 uint64_t scheduling_latency_at_same_basepri;
853 uint32_t energy_estimate_nj; /* return: In nanojoules */
854 /* smaller of the time between last change to base priority and ctx switch and scheduling_latency */
855 };
856 typedef struct going_on_core *going_on_core_t;
857
858 struct going_off_core {
859 uint64_t thread_id;
860 uint32_t energy_estimate_nj; /* return: In nanojoules */
861 uint32_t reserved;
862 uint64_t end_time;
863 uint64_t thread_group_id;
864 void *thread_group_data;
865 };
866 typedef struct going_off_core *going_off_core_t;
867
868 struct thread_group_data {
869 uint64_t thread_group_id;
870 void *thread_group_data;
871 uint32_t thread_group_size;
872 uint32_t thread_group_flags;
873 };
874 typedef struct thread_group_data *thread_group_data_t;
875
876 struct perfcontrol_max_runnable_latency {
877 uint64_t max_scheduling_latencies[4 /* THREAD_URGENCY_MAX */];
878 };
879 typedef struct perfcontrol_max_runnable_latency *perfcontrol_max_runnable_latency_t;
880
881 struct perfcontrol_work_interval {
882 uint64_t thread_id;
883 uint16_t qos_class;
884 uint16_t urgency;
885 uint32_t flags; // notify
886 uint64_t work_interval_id;
887 uint64_t start;
888 uint64_t finish;
889 uint64_t deadline;
890 uint64_t next_start;
891 uint64_t thread_group_id;
892 void *thread_group_data;
893 uint32_t create_flags;
894 };
895 typedef struct perfcontrol_work_interval *perfcontrol_work_interval_t;
896
897 typedef enum {
898 WORK_INTERVAL_START,
899 WORK_INTERVAL_UPDATE,
900 WORK_INTERVAL_FINISH,
901 WORK_INTERVAL_CREATE,
902 WORK_INTERVAL_DEALLOCATE,
903 } work_interval_ctl_t;
904
905 struct perfcontrol_work_interval_instance {
906 work_interval_ctl_t ctl;
907 uint32_t create_flags;
908 uint64_t complexity;
909 uint64_t thread_id;
910 uint64_t work_interval_id;
911 uint64_t instance_id; /* out: start, in: update/finish */
912 uint64_t start;
913 uint64_t finish;
914 uint64_t deadline;
915 uint64_t thread_group_id;
916 void *thread_group_data;
917 };
918 typedef struct perfcontrol_work_interval_instance *perfcontrol_work_interval_instance_t;
919
920 /*
921 * Structure to export per-CPU counters as part of the CLPC callout.
922 * Contains only the fixed CPU counters (instructions and cycles); CLPC
923 * would call back into XNU to get the configurable counters if needed.
924 */
925 struct perfcontrol_cpu_counters {
926 uint64_t instructions;
927 uint64_t cycles;
928 };
929
930 __options_decl(perfcontrol_thread_flags_mask_t, uint64_t, {
931 PERFCTL_THREAD_FLAGS_MASK_CLUSTER_SHARED_RSRC_RR = 1 << 0,
932 PERFCTL_THREAD_FLAGS_MASK_CLUSTER_SHARED_RSRC_NATIVE_FIRST = 1 << 1,
933 });
934
935
936 /*
937 * Structure used to pass information about a thread to CLPC
938 */
939 struct perfcontrol_thread_data {
940 /*
941 * Energy estimate (return value)
942 * The field is populated by CLPC and used to update the
943 * energy estimate of the thread
944 */
945 uint32_t energy_estimate_nj;
946 /* Perfcontrol class for thread */
947 perfcontrol_class_t perfctl_class;
948 /* Thread ID for the thread */
949 uint64_t thread_id;
950 /* Thread Group ID */
951 uint64_t thread_group_id;
952 /*
953 * Scheduling latency for threads at the same base priority.
954 * Calculated by the scheduler and passed into CLPC. The field is
955 * populated only in the thread_data structure for the thread
956 * going on-core.
957 */
958 uint64_t scheduling_latency_at_same_basepri;
959 /* Thread Group data pointer */
960 void *thread_group_data;
961 /* perfctl state pointer */
962 void *perfctl_state;
963 /* Bitmask to indicate which thread flags have been updated as part of the callout */
964 perfcontrol_thread_flags_mask_t thread_flags_mask;
965 /* Actual values for the flags that are getting updated in the callout */
966 perfcontrol_thread_flags_mask_t thread_flags;
967 };
968
969 /*
970 * All callouts from the scheduler are executed with interrupts
971 * disabled. Callouts should be implemented in C with minimal
972 * abstractions, and only use KPI exported by the mach/libkern
973 * symbolset, restricted to routines like spinlocks and atomic
974 * operations and scheduler routines as noted below. Spinlocks that
975 * are used to synchronize data in the perfcontrol_state_t should only
976 * ever be acquired with interrupts disabled, to avoid deadlocks where
977 * an quantum expiration timer interrupt attempts to perform a callout
978 * that attempts to lock a spinlock that is already held.
979 */
980
981 /*
982 * When a processor is switching between two threads (after the
983 * scheduler has chosen a new thread), the low-level platform layer
984 * will call this routine, which should perform required timestamps,
985 * MMIO register reads, or other state switching. No scheduler locks
986 * are held during this callout.
987 *
988 * This function is called with interrupts ENABLED.
989 */
990 typedef void (*sched_perfcontrol_context_switch_t)(perfcontrol_state_t, perfcontrol_state_t);
991
992 /*
993 * Once the processor has switched to the new thread, the offcore
994 * callout will indicate the old thread that is no longer being
995 * run. The thread's scheduler lock is held, so it will not begin
996 * running on another processor (in the case of preemption where it
997 * remains runnable) until it completes. If the "thread_terminating"
998 * boolean is TRUE, this will be the last callout for this thread_id.
999 */
1000 typedef void (*sched_perfcontrol_offcore_t)(perfcontrol_state_t, going_off_core_t /* populated by callee */, boolean_t);
1001
1002 /*
1003 * After the offcore callout and after the old thread can potentially
1004 * start running on another processor, the oncore callout will be
1005 * called with the thread's scheduler lock held. The oncore callout is
1006 * also called any time one of the parameters in the going_on_core_t
1007 * structure changes, like priority/QoS changes, and quantum
1008 * expiration, so the callout must not assume callouts are paired with
1009 * offcore callouts.
1010 */
1011 typedef void (*sched_perfcontrol_oncore_t)(perfcontrol_state_t, going_on_core_t);
1012
1013 /*
1014 * Periodically (on hundreds of ms scale), the scheduler will perform
1015 * maintenance and report the maximum latency for runnable (but not currently
1016 * running) threads for each urgency class.
1017 */
1018 typedef void (*sched_perfcontrol_max_runnable_latency_t)(perfcontrol_max_runnable_latency_t);
1019
1020 /*
1021 * When the kernel receives information about work intervals from userland,
1022 * it is passed along using this callback. No locks are held, although the state
1023 * object will not go away during the callout.
1024 */
1025 typedef void (*sched_perfcontrol_work_interval_notify_t)(perfcontrol_state_t, perfcontrol_work_interval_t);
1026
1027 /*
1028 * Start, update and finish work interval instance with optional complexity estimate.
1029 */
1030 typedef void (*sched_perfcontrol_work_interval_ctl_t)(perfcontrol_state_t, perfcontrol_work_interval_instance_t);
1031
1032 /*
1033 * These callbacks are used when thread groups are added, removed or properties
1034 * updated.
1035 * No blocking allocations (or anything else blocking) are allowed inside these
1036 * callbacks. No locks allowed in these callbacks as well since the kernel might
1037 * be holding the thread/task locks.
1038 */
1039 typedef void (*sched_perfcontrol_thread_group_init_t)(thread_group_data_t);
1040 typedef void (*sched_perfcontrol_thread_group_deinit_t)(thread_group_data_t);
1041 typedef void (*sched_perfcontrol_thread_group_flags_update_t)(thread_group_data_t);
1042
1043 /*
1044 * Sometime after the timeout set by sched_perfcontrol_update_callback_deadline has passed,
1045 * this function will be called, passing the timeout deadline that was previously armed as an argument.
1046 *
1047 * This is called inside context-switch/quantum-interrupt context and must follow the safety rules for that context.
1048 */
1049 typedef void (*sched_perfcontrol_deadline_passed_t)(uint64_t deadline);
1050
1051 /*
1052 * Context Switch Callout
1053 *
1054 * Parameters:
1055 * event - The perfcontrol_event for this callout
1056 * cpu_id - The CPU doing the context switch
1057 * timestamp - The timestamp for the context switch
1058 * flags - Flags for other relevant information
1059 * offcore - perfcontrol_data structure for thread going off-core
1060 * oncore - perfcontrol_data structure for thread going on-core
1061 * cpu_counters - perfcontrol_cpu_counters for the CPU doing the switch
1062 */
1063 typedef void (*sched_perfcontrol_csw_t)(
1064 perfcontrol_event event, uint32_t cpu_id, uint64_t timestamp, uint32_t flags,
1065 struct perfcontrol_thread_data *offcore, struct perfcontrol_thread_data *oncore,
1066 struct perfcontrol_cpu_counters *cpu_counters, __unused void *unused);
1067
1068
1069 /*
1070 * Thread State Update Callout
1071 *
1072 * Parameters:
1073 * event - The perfcontrol_event for this callout
1074 * cpu_id - The CPU doing the state update
1075 * timestamp - The timestamp for the state update
1076 * flags - Flags for other relevant information
1077 * thr_data - perfcontrol_data structure for the thread being updated
1078 */
1079 typedef void (*sched_perfcontrol_state_update_t)(
1080 perfcontrol_event event, uint32_t cpu_id, uint64_t timestamp, uint32_t flags,
1081 struct perfcontrol_thread_data *thr_data, __unused void *unused);
1082
1083 /*
1084 * Thread Group Blocking Relationship Callout
1085 *
1086 * Parameters:
1087 * blocked_tg - Thread group blocking on progress of another thread group
1088 * blocking_tg - Thread group blocking progress of another thread group
1089 * flags - Flags for other relevant information
1090 * blocked_thr_state - Per-thread perfcontrol state for blocked thread
1091 */
1092 typedef void (*sched_perfcontrol_thread_group_blocked_t)(
1093 thread_group_data_t blocked_tg, thread_group_data_t blocking_tg, uint32_t flags, perfcontrol_state_t blocked_thr_state);
1094
1095 /*
1096 * Thread Group Unblocking Callout
1097 *
1098 * Parameters:
1099 * unblocked_tg - Thread group being unblocked from making forward progress
1100 * unblocking_tg - Thread group unblocking progress of another thread group
1101 * flags - Flags for other relevant information
1102 * unblocked_thr_state - Per-thread perfcontrol state for unblocked thread
1103 */
1104 typedef void (*sched_perfcontrol_thread_group_unblocked_t)(
1105 thread_group_data_t unblocked_tg, thread_group_data_t unblocking_tg, uint32_t flags, perfcontrol_state_t unblocked_thr_state);
1106
1107 /*
1108 * Callers should always use the CURRENT version so that the kernel can detect both older
1109 * and newer structure layouts. New callbacks should always be added at the end of the
1110 * structure, and xnu should expect existing source recompiled against newer headers
1111 * to pass NULL for unimplemented callbacks. Pass NULL as the as the callbacks parameter
1112 * to reset callbacks to their default in-kernel values.
1113 */
1114
1115 #define SCHED_PERFCONTROL_CALLBACKS_VERSION_0 (0) /* up-to oncore */
1116 #define SCHED_PERFCONTROL_CALLBACKS_VERSION_1 (1) /* up-to max_runnable_latency */
1117 #define SCHED_PERFCONTROL_CALLBACKS_VERSION_2 (2) /* up-to work_interval_notify */
1118 #define SCHED_PERFCONTROL_CALLBACKS_VERSION_3 (3) /* up-to thread_group_deinit */
1119 #define SCHED_PERFCONTROL_CALLBACKS_VERSION_4 (4) /* up-to deadline_passed */
1120 #define SCHED_PERFCONTROL_CALLBACKS_VERSION_5 (5) /* up-to state_update */
1121 #define SCHED_PERFCONTROL_CALLBACKS_VERSION_6 (6) /* up-to thread_group_flags_update */
1122 #define SCHED_PERFCONTROL_CALLBACKS_VERSION_7 (7) /* up-to work_interval_ctl */
1123 #define SCHED_PERFCONTROL_CALLBACKS_VERSION_8 (8) /* up-to thread_group_unblocked */
1124 #define SCHED_PERFCONTROL_CALLBACKS_VERSION_9 (9) /* allows CLPC to specify resource contention flags */
1125 #define SCHED_PERFCONTROL_CALLBACKS_VERSION_CURRENT SCHED_PERFCONTROL_CALLBACKS_VERSION_6
1126
1127 struct sched_perfcontrol_callbacks {
1128 unsigned long version; /* Use SCHED_PERFCONTROL_CALLBACKS_VERSION_CURRENT */
1129 sched_perfcontrol_offcore_t offcore;
1130 sched_perfcontrol_context_switch_t context_switch;
1131 sched_perfcontrol_oncore_t oncore;
1132 sched_perfcontrol_max_runnable_latency_t max_runnable_latency;
1133 sched_perfcontrol_work_interval_notify_t work_interval_notify;
1134 sched_perfcontrol_thread_group_init_t thread_group_init;
1135 sched_perfcontrol_thread_group_deinit_t thread_group_deinit;
1136 sched_perfcontrol_deadline_passed_t deadline_passed;
1137 sched_perfcontrol_csw_t csw;
1138 sched_perfcontrol_state_update_t state_update;
1139 sched_perfcontrol_thread_group_flags_update_t thread_group_flags_update;
1140 sched_perfcontrol_work_interval_ctl_t work_interval_ctl;
1141 sched_perfcontrol_thread_group_blocked_t thread_group_blocked;
1142 sched_perfcontrol_thread_group_unblocked_t thread_group_unblocked;
1143 };
1144 typedef struct sched_perfcontrol_callbacks *sched_perfcontrol_callbacks_t;
1145
1146 extern void sched_perfcontrol_register_callbacks(sched_perfcontrol_callbacks_t callbacks, unsigned long size_of_state);
1147 extern void sched_perfcontrol_thread_group_recommend(void *data, cluster_type_t recommendation);
1148 extern void sched_perfcontrol_inherit_recommendation_from_tg(perfcontrol_class_t perfctl_class, boolean_t inherit);
1149 extern const char* sched_perfcontrol_thread_group_get_name(void *data);
1150
1151 /*
1152 * Edge Scheduler-CLPC Interface
1153 *
1154 * sched_perfcontrol_thread_group_preferred_clusters_set()
1155 *
1156 * The Edge scheduler expects thread group recommendations to be specific clusters rather
1157 * than just E/P. In order to allow more fine grained control, CLPC can specify an override
1158 * preferred cluster per QoS bucket. CLPC passes a common preferred cluster `tg_preferred_cluster`
1159 * and an array of size [PERFCONTROL_CLASS_MAX] with overrides for specific perfctl classes.
1160 * The scheduler translates these preferences into sched_bucket
1161 * preferences and applies the changes.
1162 *
1163 */
1164 /* Token to indicate a particular perfctl class is not overriden */
1165 #define SCHED_PERFCONTROL_PREFERRED_CLUSTER_OVERRIDE_NONE ((uint32_t)~0)
1166
1167 /*
1168 * CLPC can also indicate if there should be an immediate rebalancing of threads of this TG as
1169 * part of this preferred cluster change. It does that by specifying the following options.
1170 */
1171 #define SCHED_PERFCONTROL_PREFERRED_CLUSTER_MIGRATE_RUNNING 0x1
1172 #define SCHED_PERFCONTROL_PREFERRED_CLUSTER_MIGRATE_RUNNABLE 0x2
1173 typedef uint64_t sched_perfcontrol_preferred_cluster_options_t;
1174
1175 extern void sched_perfcontrol_thread_group_preferred_clusters_set(void *machine_data, uint32_t tg_preferred_cluster,
1176 uint32_t overrides[PERFCONTROL_CLASS_MAX], sched_perfcontrol_preferred_cluster_options_t options);
1177
1178 /*
1179 * Edge Scheduler-CLPC Interface
1180 *
1181 * sched_perfcontrol_edge_matrix_get()/sched_perfcontrol_edge_matrix_set()
1182 *
1183 * The Edge scheduler uses edges between clusters to define the likelihood of migrating threads
1184 * across clusters. The edge config between any two clusters defines the edge weight and whether
1185 * migation and steal operations are allowed across that edge. The getter and setter allow CLPC
1186 * to query and configure edge properties between various clusters on the platform.
1187 */
1188
1189 extern void sched_perfcontrol_edge_matrix_get(sched_clutch_edge *edge_matrix, bool *edge_request_bitmap, uint64_t flags, uint64_t matrix_order);
1190 extern void sched_perfcontrol_edge_matrix_set(sched_clutch_edge *edge_matrix, bool *edge_changes_bitmap, uint64_t flags, uint64_t matrix_order);
1191
1192 /*
1193 * sched_perfcontrol_edge_cpu_rotation_bitmasks_get()/sched_perfcontrol_edge_cpu_rotation_bitmasks_set()
1194 *
1195 * In order to drive intra-cluster core rotation CLPC supplies the edge scheduler with a pair of
1196 * per-cluster bitmasks. The preferred_bitmask is a bitmask of CPU cores where if a bit is set,
1197 * CLPC would prefer threads to be scheduled on that core if it is idle. The migration_bitmask
1198 * is a bitmask of CPU cores where if a bit is set, CLPC would prefer threads no longer continue
1199 * running on that core if there is any other non-avoided idle core in the cluster that is available.
1200 */
1201
1202 extern void sched_perfcontrol_edge_cpu_rotation_bitmasks_set(uint32_t cluster_id, uint64_t preferred_bitmask, uint64_t migration_bitmask);
1203 extern void sched_perfcontrol_edge_cpu_rotation_bitmasks_get(uint32_t cluster_id, uint64_t *preferred_bitmask, uint64_t *migration_bitmask);
1204
1205 /*
1206 * Update the deadline after which sched_perfcontrol_deadline_passed will be called.
1207 * Returns TRUE if it successfully canceled a previously set callback,
1208 * and FALSE if it did not (i.e. one wasn't set, or callback already fired / is in flight).
1209 * The callback is automatically canceled when it fires, and does not repeat unless rearmed.
1210 *
1211 * This 'timer' executes as the scheduler switches between threads, on a non-idle core
1212 *
1213 * There can be only one outstanding timer globally.
1214 */
1215 extern boolean_t sched_perfcontrol_update_callback_deadline(uint64_t deadline);
1216
1217 /*
1218 * SFI configuration.
1219 */
1220 extern kern_return_t sched_perfcontrol_sfi_set_window(uint64_t window_usecs);
1221 extern kern_return_t sched_perfcontrol_sfi_set_bg_offtime(uint64_t offtime_usecs);
1222 extern kern_return_t sched_perfcontrol_sfi_set_utility_offtime(uint64_t offtime_usecs);
1223
1224 typedef enum perfcontrol_callout_type {
1225 PERFCONTROL_CALLOUT_ON_CORE,
1226 PERFCONTROL_CALLOUT_OFF_CORE,
1227 PERFCONTROL_CALLOUT_CONTEXT,
1228 PERFCONTROL_CALLOUT_STATE_UPDATE,
1229 /* Add other callout types here */
1230 PERFCONTROL_CALLOUT_MAX
1231 } perfcontrol_callout_type_t;
1232
1233 typedef enum perfcontrol_callout_stat {
1234 PERFCONTROL_STAT_INSTRS,
1235 PERFCONTROL_STAT_CYCLES,
1236 /* Add other stat types here */
1237 PERFCONTROL_STAT_MAX
1238 } perfcontrol_callout_stat_t;
1239
1240 uint64_t perfcontrol_callout_stat_avg(perfcontrol_callout_type_t type,
1241 perfcontrol_callout_stat_t stat);
1242
1243 #ifdef __arm64__
1244 /* The performance controller may use this interface to recommend
1245 * that CPUs in the designated cluster employ WFE rather than WFI
1246 * within the idle loop, falling back to WFI after the specified
1247 * timeout. The updates are expected to be serialized by the caller,
1248 * the implementation is not required to perform internal synchronization.
1249 */
1250 uint32_t ml_update_cluster_wfe_recommendation(uint32_t wfe_cluster_id, uint64_t wfe_timeout_abstime_interval, uint64_t wfe_hint_flags);
1251 #endif /* __arm64__ */
1252
1253 #if defined(HAS_APPLE_PAC)
1254 #define ONES(x) (BIT((x))-1)
1255 #define PTR_MASK ONES(64-T1SZ_BOOT)
1256 #define PAC_MASK ~PTR_MASK
1257 #define SIGN(p) ((p) & BIT(55))
1258 #define UNSIGN_PTR(p) \
1259 SIGN(p) ? ((p) | PAC_MASK) : ((p) & ~PAC_MASK)
1260
1261 uint64_t ml_default_rop_pid(void);
1262 uint64_t ml_default_jop_pid(void);
1263 uint64_t ml_non_arm64e_user_jop_pid(void);
1264 void ml_task_set_rop_pid(task_t task, task_t parent_task, boolean_t inherit);
1265 void ml_task_set_jop_pid(task_t task, task_t parent_task, boolean_t inherit, boolean_t disable_user_jop);
1266 void ml_task_set_jop_pid_from_shared_region(task_t task, boolean_t disable_user_jop);
1267 uint8_t ml_task_get_disable_user_jop(task_t task);
1268 void ml_task_set_disable_user_jop(task_t task, uint8_t disable_user_jop);
1269 void ml_thread_set_disable_user_jop(thread_t thread, uint8_t disable_user_jop);
1270 void ml_thread_set_jop_pid(thread_t thread, task_t task);
1271
1272 #if !__has_ptrcheck
1273
1274 /*
1275 * There are two implementations of _ml_auth_ptr_unchecked(). Non-FPAC CPUs
1276 * take a fast path that directly auths the pointer, relying on the CPU to
1277 * poison invald pointers without trapping. FPAC CPUs take a slower path which
1278 * emulates a non-trapping auth using strip + sign + compare, and manually
1279 * poisons the output when necessary.
1280 *
1281 * The FPAC implementation is also safe for non-FPAC CPUs, but less efficient;
1282 * guest kernels need to use it because it does not know at compile time whether
1283 * the host CPU supports FPAC.
1284 */
1285
1286 #if __ARM_ARCH_8_6__ || APPLEVIRTUALPLATFORM
1287 void *
1288 ml_poison_ptr(void *ptr, ptrauth_key key);
1289
1290 /*
1291 * ptrauth_sign_unauthenticated() reimplemented using asm volatile, forcing the
1292 * compiler to assume this operation has side-effects and cannot be reordered
1293 */
1294 #define ptrauth_sign_volatile(__value, __suffix, __data) \
1295 ({ \
1296 void *__ret = __value; \
1297 asm volatile ( \
1298 "pac" #__suffix " %[value], %[data]" \
1299 : [value] "+r"(__ret) \
1300 : [data] "r"(__data) \
1301 ); \
1302 __ret; \
1303 })
1304
1305 #define ml_auth_ptr_unchecked_for_key(_ptr, _suffix, _key, _modifier) \
1306 do { \
1307 void *stripped = ptrauth_strip(_ptr, _key); \
1308 void *reauthed = ptrauth_sign_volatile(stripped, _suffix, _modifier); \
1309 if (__probable(_ptr == reauthed)) { \
1310 _ptr = stripped; \
1311 } else { \
1312 _ptr = ml_poison_ptr(stripped, _key); \
1313 } \
1314 } while (0)
1315
1316 #define _ml_auth_ptr_unchecked(_ptr, _suffix, _modifier) \
1317 ml_auth_ptr_unchecked_for_key(_ptr, _suffix, ptrauth_key_as ## _suffix, _modifier)
1318 #else
1319 #define _ml_auth_ptr_unchecked(_ptr, _suffix, _modifier) \
1320 asm volatile ("aut" #_suffix " %[ptr], %[modifier]" : [ptr] "+r"(_ptr) : [modifier] "r"(_modifier));
1321 #endif /* __ARM_ARCH_8_6__ || APPLEVIRTUALPLATFORM */
1322
1323 /**
1324 * Authenticates a signed pointer without trapping on failure.
1325 *
1326 * @warning This function must be called with interrupts disabled.
1327 *
1328 * @warning Pointer authentication failure should normally be treated as a fatal
1329 * error. This function is intended for a handful of callers that cannot panic
1330 * on failure, and that understand the risks in handling a poisoned return
1331 * value. Other code should generally use the trapping variant
1332 * ptrauth_auth_data() instead.
1333 *
1334 * @param ptr the pointer to authenticate
1335 * @param key which key to use for authentication
1336 * @param modifier a modifier to mix into the key
1337 * @return an authenticated version of ptr, possibly with poison bits set
1338 */
1339 static inline OS_ALWAYS_INLINE void *
ml_auth_ptr_unchecked(void * ptr,ptrauth_key key,uint64_t modifier)1340 ml_auth_ptr_unchecked(void *ptr, ptrauth_key key, uint64_t modifier)
1341 {
1342 switch (key & 0x3) {
1343 case ptrauth_key_asia:
1344 _ml_auth_ptr_unchecked(ptr, ia, modifier);
1345 break;
1346 case ptrauth_key_asib:
1347 _ml_auth_ptr_unchecked(ptr, ib, modifier);
1348 break;
1349 case ptrauth_key_asda:
1350 _ml_auth_ptr_unchecked(ptr, da, modifier);
1351 break;
1352 case ptrauth_key_asdb:
1353 _ml_auth_ptr_unchecked(ptr, db, modifier);
1354 break;
1355 }
1356
1357 return ptr;
1358 }
1359
1360 #endif /* !__has_ptrcheck */
1361
1362 uint64_t ml_enable_user_jop_key(uint64_t user_jop_key);
1363
1364 /**
1365 * Restores the previous JOP key state after a previous ml_enable_user_jop_key()
1366 * call.
1367 *
1368 * @param user_jop_key The userspace JOP key previously passed to
1369 * ml_enable_user_jop_key()
1370 * @param saved_jop_state The saved JOP state returned by
1371 * ml_enable_user_jop_key()
1372 */
1373 void ml_disable_user_jop_key(uint64_t user_jop_key, uint64_t saved_jop_state);
1374 #endif /* defined(HAS_APPLE_PAC) */
1375
1376 void ml_enable_monitor(void);
1377
1378 #endif /* KERNEL_PRIVATE */
1379
1380 boolean_t machine_timeout_suspended(void);
1381 void ml_get_power_state(boolean_t *, boolean_t *);
1382
1383 uint32_t get_arm_cpu_version(void);
1384 boolean_t user_cont_hwclock_allowed(void);
1385 uint8_t user_timebase_type(void);
1386 boolean_t ml_thread_is64bit(thread_t thread);
1387
1388 #ifdef __arm64__
1389 bool ml_feature_supported(uint64_t feature_bit);
1390 void ml_set_align_checking(void);
1391 extern void wfe_timeout_configure(void);
1392 extern void wfe_timeout_init(void);
1393 #endif /* __arm64__ */
1394
1395 void ml_timer_evaluate(void);
1396 boolean_t ml_timer_forced_evaluation(void);
1397 void ml_gpu_stat_update(uint64_t);
1398 uint64_t ml_gpu_stat(thread_t);
1399 #endif /* __APPLE_API_PRIVATE */
1400
1401
1402
1403 #if __arm64__ && defined(CONFIG_XNUPOST) && defined(XNU_KERNEL_PRIVATE)
1404 extern void ml_expect_fault_begin(expected_fault_handler_t, uintptr_t);
1405 extern void ml_expect_fault_pc_begin(expected_fault_handler_t, uintptr_t);
1406 extern void ml_expect_fault_end(void);
1407 #endif /* __arm64__ && defined(CONFIG_XNUPOST) && defined(XNU_KERNEL_PRIVATE) */
1408
1409 #if defined(HAS_OBJC_BP_HELPER) && defined(XNU_KERNEL_PRIVATE)
1410 kern_return_t objc_bp_assist_cfg(uint64_t adr, uint64_t ctl);
1411 #endif /* defined(HAS_OBJC_BP_HELPER) && defined(XNU_KERNEL_PRIVATE) */
1412
1413 extern uint32_t phy_read_panic;
1414 extern uint32_t phy_write_panic;
1415 #if DEVELOPMENT || DEBUG
1416 extern uint64_t simulate_stretched_io;
1417 #endif
1418
1419 void ml_hibernate_active_pre(void);
1420 void ml_hibernate_active_post(void);
1421
1422 void ml_report_minor_badness(uint32_t badness_id);
1423 #define ML_MINOR_BADNESS_CONSOLE_BUFFER_FULL 0
1424 #define ML_MINOR_BADNESS_MEMFAULT_REPORTING_NOT_ENABLED 1
1425 #define ML_MINOR_BADNESS_PIO_WRITTEN_FROM_USERSPACE 2
1426
1427 #ifdef XNU_KERNEL_PRIVATE
1428 /**
1429 * Depending on the system, by the time a backtracer starts inspecting an
1430 * interrupted CPU's register state, the value of the PC might have been
1431 * modified. In those cases, the original PC value is placed into a different
1432 * register. This function abstracts out those differences for a backtracer
1433 * wanting the PC of an interrupted CPU.
1434 *
1435 * @param state The ARM register state to parse.
1436 *
1437 * @return The original PC of the interrupted CPU.
1438 */
1439 uint64_t ml_get_backtrace_pc(struct arm_saved_state *state);
1440
1441 /**
1442 * Returns whether a secure hibernation flow is supported.
1443 *
1444 * @note Hibernation itself might still be supported even if this function
1445 * returns false. This function just denotes whether a hibernation process
1446 * which securely hashes and stores the hibernation image is supported.
1447 *
1448 * @return True if the kernel supports a secure hibernation process, false
1449 * otherwise.
1450 */
1451 bool ml_is_secure_hib_supported(void);
1452
1453 /**
1454 * Returns whether the task should use 1 GHz timebase.
1455 *
1456 * @return True if the task should use 1 GHz timebase, false
1457 * otherwise.
1458 */
1459 bool ml_task_uses_1ghz_timebase(const task_t task);
1460 #endif /* XNU_KERNEL_PRIVATE */
1461
1462 #ifdef KERNEL_PRIVATE
1463 /**
1464 * Given a physical address, return whether that address is owned by the secure
1465 * world.
1466 *
1467 * @note This does not include memory shared between XNU and the secure world.
1468 *
1469 * @param paddr The physical address to check.
1470 *
1471 * @return True if the physical address is owned and being used exclusively by
1472 * the secure world, false otherwise.
1473 */
1474 bool ml_paddr_is_exclaves_owned(vm_offset_t paddr);
1475 #endif /* KERNEL_PRIVATE */
1476
1477 __END_DECLS
1478
1479 #endif /* _ARM_MACHINE_ROUTINES_H_ */
1480