1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2018 Intel Corporation 3 */ 4 #ifndef _QAT_DEVICE_H_ 5 #define _QAT_DEVICE_H_ 6 7 #include <rte_bus_pci.h> 8 9 #include "qat_common.h" 10 #include "qat_logs.h" 11 #include "adf_transport_access_macros.h" 12 #include "qat_qp.h" 13 14 #define QAT_DETACHED (0) 15 #define QAT_ATTACHED (1) 16 17 #define QAT_DEV_NAME_MAX_LEN 64 18 19 #define SYM_ENQ_THRESHOLD_NAME "qat_sym_enq_threshold" 20 #define ASYM_ENQ_THRESHOLD_NAME "qat_asym_enq_threshold" 21 #define COMP_ENQ_THRESHOLD_NAME "qat_comp_enq_threshold" 22 #define MAX_QP_THRESHOLD_SIZE 32 23 24 /** 25 * Function prototypes for GENx specific device operations. 26 **/ 27 typedef int (*qat_dev_reset_ring_pairs_t) 28 (struct qat_pci_device *); 29 typedef const struct rte_mem_resource* (*qat_dev_get_transport_bar_t) 30 (struct rte_pci_device *); 31 typedef int (*qat_dev_get_misc_bar_t) 32 (struct rte_mem_resource **, struct rte_pci_device *); 33 typedef int (*qat_dev_read_config_t) 34 (struct qat_pci_device *); 35 typedef int (*qat_dev_get_extra_size_t)(void); 36 37 struct qat_dev_hw_spec_funcs { 38 qat_dev_reset_ring_pairs_t qat_dev_reset_ring_pairs; 39 qat_dev_get_transport_bar_t qat_dev_get_transport_bar; 40 qat_dev_get_misc_bar_t qat_dev_get_misc_bar; 41 qat_dev_read_config_t qat_dev_read_config; 42 qat_dev_get_extra_size_t qat_dev_get_extra_size; 43 }; 44 45 extern struct qat_dev_hw_spec_funcs *qat_dev_hw_spec[]; 46 47 struct qat_dev_cmd_param { 48 const char *name; 49 uint16_t val; 50 }; 51 52 struct qat_device_info { 53 const struct rte_memzone *mz; 54 /**< mz to store the qat_pci_device so it can be 55 * shared across processes 56 */ 57 struct rte_pci_device *pci_dev; 58 struct rte_device sym_rte_dev; 59 /**< This represents the crypto sym subset of this pci device. 60 * Register with this rather than with the one in 61 * pci_dev so that its driver can have a crypto-specific name 62 */ 63 64 struct rte_device asym_rte_dev; 65 /**< This represents the crypto asym subset of this pci device. 66 * Register with this rather than with the one in 67 * pci_dev so that its driver can have a crypto-specific name 68 */ 69 70 struct rte_device comp_rte_dev; 71 /**< This represents the compression subset of this pci device. 72 * Register with this rather than with the one in 73 * pci_dev so that its driver can have a compression-specific name 74 */ 75 }; 76 77 extern struct qat_device_info qat_pci_devs[]; 78 79 struct qat_cryptodev_private; 80 struct qat_comp_dev_private; 81 82 /* 83 * This struct holds all the data about a QAT pci device 84 * including data about all services it supports. 85 * It contains 86 * - hw_data 87 * - config data 88 * - runtime data 89 * Note: as this data can be shared in a multi-process scenario, 90 * any pointers in it must also point to shared memory. 91 */ 92 struct qat_pci_device { 93 94 /* Data used by all services */ 95 char name[QAT_DEV_NAME_MAX_LEN]; 96 /**< Name of qat pci device */ 97 uint8_t qat_dev_id; 98 /**< Id of device instance for this qat pci device */ 99 enum qat_device_gen qat_dev_gen; 100 /**< QAT device generation */ 101 rte_spinlock_t arb_csr_lock; 102 /**< lock to protect accesses to the arbiter CSR */ 103 104 struct qat_qp *qps_in_use[QAT_MAX_SERVICES][ADF_MAX_QPS_ON_ANY_SERVICE]; 105 /**< links to qps set up for each service, index same as on API */ 106 107 /* Data relating to symmetric crypto service */ 108 struct qat_cryptodev_private *sym_dev; 109 /**< link back to cryptodev private data */ 110 111 int qat_sym_driver_id; 112 /**< Symmetric driver id used by this device */ 113 114 /* Data relating to asymmetric crypto service */ 115 struct qat_cryptodev_private *asym_dev; 116 /**< link back to cryptodev private data */ 117 118 int qat_asym_driver_id; 119 /**< Symmetric driver id used by this device */ 120 121 /* Data relating to compression service */ 122 struct qat_comp_dev_private *comp_dev; 123 /**< link back to compressdev private data */ 124 void *misc_bar_io_addr; 125 /**< Address of misc bar */ 126 void *dev_private; 127 /**< Per generation specific information */ 128 }; 129 130 struct qat_gen_hw_data { 131 enum qat_device_gen dev_gen; 132 const struct qat_qp_hw_data (*qp_hw_data)[ADF_MAX_QPS_ON_ANY_SERVICE]; 133 struct qat_pf2vf_dev *pf2vf_dev; 134 }; 135 136 struct qat_pf2vf_dev { 137 uint32_t pf2vf_offset; 138 uint32_t vf2pf_offset; 139 int pf2vf_type_shift; 140 uint32_t pf2vf_type_mask; 141 int pf2vf_data_shift; 142 uint32_t pf2vf_data_mask; 143 }; 144 145 extern struct qat_gen_hw_data qat_gen_config[]; 146 147 struct qat_pci_device * 148 qat_pci_device_allocate(struct rte_pci_device *pci_dev, 149 struct qat_dev_cmd_param *qat_dev_cmd_param); 150 151 struct qat_pci_device * 152 qat_get_qat_dev_from_pci_dev(struct rte_pci_device *pci_dev); 153 154 /* declaration needed for weak functions */ 155 int 156 qat_sym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused, 157 struct qat_dev_cmd_param *qat_dev_cmd_param); 158 159 int 160 qat_asym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused, 161 struct qat_dev_cmd_param *qat_dev_cmd_param); 162 163 int 164 qat_sym_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused); 165 166 int 167 qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused); 168 169 int 170 qat_comp_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused, 171 struct qat_dev_cmd_param *qat_dev_cmd_param); 172 173 int 174 qat_comp_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused); 175 176 #endif /* _QAT_DEVICE_H_ */ 177