xref: /f-stack/dpdk/drivers/net/sfc/sfc_mae.h (revision 2d9fd380)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  *
3  * Copyright(c) 2019-2020 Xilinx, Inc.
4  * Copyright(c) 2019 Solarflare Communications Inc.
5  *
6  * This software was jointly developed between OKTET Labs (under contract
7  * for Solarflare) and Solarflare Communications, Inc.
8  */
9 
10 #ifndef _SFC_MAE_H
11 #define _SFC_MAE_H
12 
13 #include <stdbool.h>
14 
15 #include <rte_spinlock.h>
16 
17 #include "efx.h"
18 
19 #ifdef __cplusplus
20 extern "C" {
21 #endif
22 
23 /** FW-allocatable resource context */
24 struct sfc_mae_fw_rsrc {
25 	unsigned int			refcnt;
26 	RTE_STD_C11
27 	union {
28 		efx_mae_aset_id_t	aset_id;
29 		efx_mae_rule_id_t	rule_id;
30 	};
31 };
32 
33 /** Outer rule registry entry */
34 struct sfc_mae_outer_rule {
35 	TAILQ_ENTRY(sfc_mae_outer_rule)	entries;
36 	unsigned int			refcnt;
37 	efx_mae_match_spec_t		*match_spec;
38 	efx_tunnel_protocol_t		encap_type;
39 	struct sfc_mae_fw_rsrc		fw_rsrc;
40 };
41 
42 TAILQ_HEAD(sfc_mae_outer_rules, sfc_mae_outer_rule);
43 
44 /** Action set registry entry */
45 struct sfc_mae_action_set {
46 	TAILQ_ENTRY(sfc_mae_action_set)	entries;
47 	unsigned int			refcnt;
48 	efx_mae_actions_t		*spec;
49 	struct sfc_mae_fw_rsrc		fw_rsrc;
50 };
51 
52 TAILQ_HEAD(sfc_mae_action_sets, sfc_mae_action_set);
53 
54 /** Options for MAE support status */
55 enum sfc_mae_status {
56 	SFC_MAE_STATUS_UNKNOWN = 0,
57 	SFC_MAE_STATUS_UNSUPPORTED,
58 	SFC_MAE_STATUS_SUPPORTED
59 };
60 
61 struct sfc_mae {
62 	/** Assigned switch domain identifier */
63 	uint16_t			switch_domain_id;
64 	/** Assigned switch port identifier */
65 	uint16_t			switch_port_id;
66 	/** NIC support for MAE status */
67 	enum sfc_mae_status		status;
68 	/** Priority level limit for MAE outer rules */
69 	unsigned int			nb_outer_rule_prios_max;
70 	/** Priority level limit for MAE action rules */
71 	unsigned int			nb_action_rule_prios_max;
72 	/** Encapsulation support status */
73 	uint32_t			encap_types_supported;
74 	/** Outer rule registry */
75 	struct sfc_mae_outer_rules	outer_rules;
76 	/** Action set registry */
77 	struct sfc_mae_action_sets	action_sets;
78 };
79 
80 struct sfc_adapter;
81 struct sfc_flow_spec;
82 
83 /** This implementation supports double-tagging */
84 #define SFC_MAE_MATCH_VLAN_MAX_NTAGS	(2)
85 
86 /** It is possible to keep track of one item ETH and two items VLAN */
87 #define SFC_MAE_L2_MAX_NITEMS		(SFC_MAE_MATCH_VLAN_MAX_NTAGS + 1)
88 
89 /** Auxiliary entry format to keep track of L2 "type" ("inner_type") */
90 struct sfc_mae_ethertype {
91 	rte_be16_t	value;
92 	rte_be16_t	mask;
93 };
94 
95 struct sfc_mae_pattern_data {
96 	/**
97 	 * Keeps track of "type" ("inner_type") mask and value for each
98 	 * parsed L2 item in a pattern. These values/masks get filled
99 	 * in MAE match specification at the end of parsing. Also, this
100 	 * information is used to conduct consistency checks:
101 	 *
102 	 * - If an item ETH is followed by a single item VLAN,
103 	 *   the former must have "type" set to one of supported
104 	 *   TPID values (0x8100, 0x88a8, 0x9100, 0x9200, 0x9300).
105 	 *
106 	 * - If an item ETH is followed by two items VLAN, the
107 	 *   item ETH must have "type" set to one of supported TPID
108 	 *   values (0x88a8, 0x9100, 0x9200, 0x9300), and the outermost
109 	 *   VLAN item must have "inner_type" set to TPID value 0x8100.
110 	 *
111 	 * - If a L2 item is followed by a L3 one, the former must
112 	 *   indicate "type" ("inner_type") which corresponds to
113 	 *   the protocol used in the L3 item, or 0x0000/0x0000.
114 	 *
115 	 * In turn, mapping between RTE convention (above requirements) and
116 	 * MAE fields is non-trivial. The following scheme indicates
117 	 * which item EtherTypes go to which MAE fields in the case
118 	 * of single tag:
119 	 *
120 	 * ETH	(0x8100)	--> VLAN0_PROTO_BE
121 	 * VLAN	(L3 EtherType)	--> ETHER_TYPE_BE
122 	 *
123 	 * Similarly, in the case of double tagging:
124 	 *
125 	 * ETH	(0x88a8)	--> VLAN0_PROTO_BE
126 	 * VLAN	(0x8100)	--> VLAN1_PROTO_BE
127 	 * VLAN	(L3 EtherType)	--> ETHER_TYPE_BE
128 	 */
129 	struct sfc_mae_ethertype	ethertypes[SFC_MAE_L2_MAX_NITEMS];
130 	unsigned int			nb_vlan_tags;
131 
132 	/**
133 	 * L3 requirement for the innermost L2 item's "type" ("inner_type").
134 	 * This contains one of:
135 	 * - 0x0800/0xffff: IPV4
136 	 * - 0x86dd/0xffff: IPV6
137 	 * - 0x0000/0x0000: no L3 item
138 	 */
139 	struct sfc_mae_ethertype	innermost_ethertype_restriction;
140 
141 	/**
142 	 * The following two fields keep track of L3 "proto" mask and value.
143 	 * The corresponding fields get filled in MAE match specification
144 	 * at the end of parsing. Also, the information is used by a
145 	 * post-check to enforce consistency requirements:
146 	 *
147 	 * - If a L3 item is followed by an item TCP, the former has
148 	 *   its "proto" set to either 0x06/0xff or 0x00/0x00.
149 	 *
150 	 * - If a L3 item is followed by an item UDP, the former has
151 	 *   its "proto" set to either 0x11/0xff or 0x00/0x00.
152 	 */
153 	uint8_t				l3_next_proto_value;
154 	uint8_t				l3_next_proto_mask;
155 
156 	/*
157 	 * L4 requirement for L3 item's "proto".
158 	 * This contains one of:
159 	 * - 0x06/0xff: TCP
160 	 * - 0x11/0xff: UDP
161 	 * - 0x00/0x00: no L4 item
162 	 */
163 	uint8_t				l3_next_proto_restriction_value;
164 	uint8_t				l3_next_proto_restriction_mask;
165 };
166 
167 struct sfc_mae_parse_ctx {
168 	struct sfc_adapter		*sa;
169 	efx_mae_match_spec_t		*match_spec_action;
170 	efx_mae_match_spec_t		*match_spec_outer;
171 	/*
172 	 * This points to either of the above two specifications depending
173 	 * on which part of the pattern is being parsed (outer / inner).
174 	 */
175 	efx_mae_match_spec_t		*match_spec;
176 	/*
177 	 * This points to either "field_ids_remap_to_encap"
178 	 * or "field_ids_no_remap" (see sfc_mae.c) depending on
179 	 * which part of the pattern is being parsed.
180 	 */
181 	const efx_mae_field_id_t	*field_ids_remap;
182 	/* This points to a tunnel-specific default mask. */
183 	const void			*tunnel_def_mask;
184 	bool				match_mport_set;
185 	struct sfc_mae_pattern_data	pattern_data;
186 	efx_tunnel_protocol_t		encap_type;
187 	unsigned int			priority;
188 };
189 
190 int sfc_mae_attach(struct sfc_adapter *sa);
191 void sfc_mae_detach(struct sfc_adapter *sa);
192 sfc_flow_cleanup_cb_t sfc_mae_flow_cleanup;
193 int sfc_mae_rule_parse_pattern(struct sfc_adapter *sa,
194 			       const struct rte_flow_item pattern[],
195 			       struct sfc_flow_spec_mae *spec,
196 			       struct rte_flow_error *error);
197 int sfc_mae_rule_parse_actions(struct sfc_adapter *sa,
198 			       const struct rte_flow_action actions[],
199 			       struct sfc_mae_action_set **action_setp,
200 			       struct rte_flow_error *error);
201 sfc_flow_verify_cb_t sfc_mae_flow_verify;
202 sfc_flow_insert_cb_t sfc_mae_flow_insert;
203 sfc_flow_remove_cb_t sfc_mae_flow_remove;
204 
205 #ifdef __cplusplus
206 }
207 #endif
208 #endif /* _SFC_MAE_H */
209