1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2019 Mellanox Technologies, Ltd
3 */
4 #include <string.h>
5 #include <unistd.h>
6 #include <sys/mman.h>
7
8 #include <rte_malloc.h>
9 #include <rte_errno.h>
10 #include <rte_io.h>
11
12 #include <mlx5_common.h>
13
14 #include "mlx5_vdpa_utils.h"
15 #include "mlx5_vdpa.h"
16
17
18 static void
mlx5_vdpa_virtq_handler(void * cb_arg)19 mlx5_vdpa_virtq_handler(void *cb_arg)
20 {
21 struct mlx5_vdpa_virtq *virtq = cb_arg;
22 struct mlx5_vdpa_priv *priv = virtq->priv;
23 uint64_t buf;
24 int nbytes;
25
26 do {
27 nbytes = read(virtq->intr_handle.fd, &buf, 8);
28 if (nbytes < 0) {
29 if (errno == EINTR ||
30 errno == EWOULDBLOCK ||
31 errno == EAGAIN)
32 continue;
33 DRV_LOG(ERR, "Failed to read kickfd of virtq %d: %s",
34 virtq->index, strerror(errno));
35 }
36 break;
37 } while (1);
38 rte_write32(virtq->index, priv->virtq_db_addr);
39 if (virtq->notifier_state == MLX5_VDPA_NOTIFIER_STATE_DISABLED) {
40 if (rte_vhost_host_notifier_ctrl(priv->vid, virtq->index, true))
41 virtq->notifier_state = MLX5_VDPA_NOTIFIER_STATE_ERR;
42 else
43 virtq->notifier_state =
44 MLX5_VDPA_NOTIFIER_STATE_ENABLED;
45 DRV_LOG(INFO, "Virtq %u notifier state is %s.", virtq->index,
46 virtq->notifier_state ==
47 MLX5_VDPA_NOTIFIER_STATE_ENABLED ? "enabled" :
48 "disabled");
49 }
50 DRV_LOG(DEBUG, "Ring virtq %u doorbell.", virtq->index);
51 }
52
53 static int
mlx5_vdpa_virtq_unset(struct mlx5_vdpa_virtq * virtq)54 mlx5_vdpa_virtq_unset(struct mlx5_vdpa_virtq *virtq)
55 {
56 unsigned int i;
57 int retries = MLX5_VDPA_INTR_RETRIES;
58 int ret = -EAGAIN;
59
60 if (virtq->intr_handle.fd != -1) {
61 while (retries-- && ret == -EAGAIN) {
62 ret = rte_intr_callback_unregister(&virtq->intr_handle,
63 mlx5_vdpa_virtq_handler,
64 virtq);
65 if (ret == -EAGAIN) {
66 DRV_LOG(DEBUG, "Try again to unregister fd %d "
67 "of virtq %d interrupt, retries = %d.",
68 virtq->intr_handle.fd,
69 (int)virtq->index, retries);
70 usleep(MLX5_VDPA_INTR_RETRIES_USEC);
71 }
72 }
73 virtq->intr_handle.fd = -1;
74 }
75 if (virtq->virtq) {
76 ret = mlx5_vdpa_virtq_stop(virtq->priv, virtq->index);
77 if (ret)
78 DRV_LOG(WARNING, "Failed to stop virtq %d.",
79 virtq->index);
80 claim_zero(mlx5_devx_cmd_destroy(virtq->virtq));
81 }
82 virtq->virtq = NULL;
83 for (i = 0; i < RTE_DIM(virtq->umems); ++i) {
84 if (virtq->umems[i].obj)
85 claim_zero(mlx5_glue->devx_umem_dereg
86 (virtq->umems[i].obj));
87 if (virtq->umems[i].buf)
88 rte_free(virtq->umems[i].buf);
89 }
90 memset(&virtq->umems, 0, sizeof(virtq->umems));
91 if (virtq->eqp.fw_qp)
92 mlx5_vdpa_event_qp_destroy(&virtq->eqp);
93 virtq->notifier_state = MLX5_VDPA_NOTIFIER_STATE_DISABLED;
94 return 0;
95 }
96
97 void
mlx5_vdpa_virtqs_release(struct mlx5_vdpa_priv * priv)98 mlx5_vdpa_virtqs_release(struct mlx5_vdpa_priv *priv)
99 {
100 int i;
101 struct mlx5_vdpa_virtq *virtq;
102
103 for (i = 0; i < priv->nr_virtqs; i++) {
104 virtq = &priv->virtqs[i];
105 mlx5_vdpa_virtq_unset(virtq);
106 if (virtq->counters) {
107 claim_zero(mlx5_devx_cmd_destroy(virtq->counters));
108 virtq->counters = NULL;
109 memset(&virtq->reset, 0, sizeof(virtq->reset));
110 }
111 memset(virtq->err_time, 0, sizeof(virtq->err_time));
112 virtq->n_retry = 0;
113 }
114 for (i = 0; i < priv->num_lag_ports; i++) {
115 if (priv->tiss[i]) {
116 claim_zero(mlx5_devx_cmd_destroy(priv->tiss[i]));
117 priv->tiss[i] = NULL;
118 }
119 }
120 if (priv->td) {
121 claim_zero(mlx5_devx_cmd_destroy(priv->td));
122 priv->td = NULL;
123 }
124 if (priv->virtq_db_addr) {
125 claim_zero(munmap(priv->virtq_db_addr, priv->var->length));
126 priv->virtq_db_addr = NULL;
127 }
128 priv->features = 0;
129 priv->nr_virtqs = 0;
130 }
131
132 int
mlx5_vdpa_virtq_modify(struct mlx5_vdpa_virtq * virtq,int state)133 mlx5_vdpa_virtq_modify(struct mlx5_vdpa_virtq *virtq, int state)
134 {
135 struct mlx5_devx_virtq_attr attr = {
136 .type = MLX5_VIRTQ_MODIFY_TYPE_STATE,
137 .state = state ? MLX5_VIRTQ_STATE_RDY :
138 MLX5_VIRTQ_STATE_SUSPEND,
139 .queue_index = virtq->index,
140 };
141
142 return mlx5_devx_cmd_modify_virtq(virtq->virtq, &attr);
143 }
144
145 int
mlx5_vdpa_virtq_stop(struct mlx5_vdpa_priv * priv,int index)146 mlx5_vdpa_virtq_stop(struct mlx5_vdpa_priv *priv, int index)
147 {
148 struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
149 int ret;
150
151 if (virtq->stopped)
152 return 0;
153 ret = mlx5_vdpa_virtq_modify(virtq, 0);
154 if (ret)
155 return -1;
156 virtq->stopped = true;
157 DRV_LOG(DEBUG, "vid %u virtq %u was stopped.", priv->vid, index);
158 return mlx5_vdpa_virtq_query(priv, index);
159 }
160
161 int
mlx5_vdpa_virtq_query(struct mlx5_vdpa_priv * priv,int index)162 mlx5_vdpa_virtq_query(struct mlx5_vdpa_priv *priv, int index)
163 {
164 struct mlx5_devx_virtq_attr attr = {0};
165 struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
166 int ret;
167
168 if (mlx5_devx_cmd_query_virtq(virtq->virtq, &attr)) {
169 DRV_LOG(ERR, "Failed to query virtq %d.", index);
170 return -1;
171 }
172 DRV_LOG(INFO, "Query vid %d vring %d: hw_available_idx=%d, "
173 "hw_used_index=%d", priv->vid, index,
174 attr.hw_available_index, attr.hw_used_index);
175 ret = rte_vhost_set_vring_base(priv->vid, index,
176 attr.hw_available_index,
177 attr.hw_used_index);
178 if (ret) {
179 DRV_LOG(ERR, "Failed to set virtq %d base.", index);
180 return -1;
181 }
182 if (attr.state == MLX5_VIRTQ_STATE_ERROR)
183 DRV_LOG(WARNING, "vid %d vring %d hw error=%hhu",
184 priv->vid, index, attr.error_type);
185 return 0;
186 }
187
188 static uint64_t
mlx5_vdpa_hva_to_gpa(struct rte_vhost_memory * mem,uint64_t hva)189 mlx5_vdpa_hva_to_gpa(struct rte_vhost_memory *mem, uint64_t hva)
190 {
191 struct rte_vhost_mem_region *reg;
192 uint32_t i;
193 uint64_t gpa = 0;
194
195 for (i = 0; i < mem->nregions; i++) {
196 reg = &mem->regions[i];
197 if (hva >= reg->host_user_addr &&
198 hva < reg->host_user_addr + reg->size) {
199 gpa = hva - reg->host_user_addr + reg->guest_phys_addr;
200 break;
201 }
202 }
203 return gpa;
204 }
205
206 static int
mlx5_vdpa_virtq_setup(struct mlx5_vdpa_priv * priv,int index)207 mlx5_vdpa_virtq_setup(struct mlx5_vdpa_priv *priv, int index)
208 {
209 struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
210 struct rte_vhost_vring vq;
211 struct mlx5_devx_virtq_attr attr = {0};
212 uint64_t gpa;
213 int ret;
214 unsigned int i;
215 uint16_t last_avail_idx;
216 uint16_t last_used_idx;
217 uint16_t event_num = MLX5_EVENT_TYPE_OBJECT_CHANGE;
218 uint64_t cookie;
219
220 ret = rte_vhost_get_vhost_vring(priv->vid, index, &vq);
221 if (ret)
222 return -1;
223 virtq->index = index;
224 virtq->vq_size = vq.size;
225 attr.tso_ipv4 = !!(priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO4));
226 attr.tso_ipv6 = !!(priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO6));
227 attr.tx_csum = !!(priv->features & (1ULL << VIRTIO_NET_F_CSUM));
228 attr.rx_csum = !!(priv->features & (1ULL << VIRTIO_NET_F_GUEST_CSUM));
229 attr.virtio_version_1_0 = !!(priv->features & (1ULL <<
230 VIRTIO_F_VERSION_1));
231 attr.type = (priv->features & (1ULL << VIRTIO_F_RING_PACKED)) ?
232 MLX5_VIRTQ_TYPE_PACKED : MLX5_VIRTQ_TYPE_SPLIT;
233 /*
234 * No need event QPs creation when the guest in poll mode or when the
235 * capability allows it.
236 */
237 attr.event_mode = vq.callfd != -1 || !(priv->caps.event_mode & (1 <<
238 MLX5_VIRTQ_EVENT_MODE_NO_MSIX)) ?
239 MLX5_VIRTQ_EVENT_MODE_QP :
240 MLX5_VIRTQ_EVENT_MODE_NO_MSIX;
241 if (attr.event_mode == MLX5_VIRTQ_EVENT_MODE_QP) {
242 ret = mlx5_vdpa_event_qp_create(priv, vq.size, vq.callfd,
243 &virtq->eqp);
244 if (ret) {
245 DRV_LOG(ERR, "Failed to create event QPs for virtq %d.",
246 index);
247 return -1;
248 }
249 attr.qp_id = virtq->eqp.fw_qp->id;
250 } else {
251 DRV_LOG(INFO, "Virtq %d is, for sure, working by poll mode, no"
252 " need event QPs and event mechanism.", index);
253 }
254 if (priv->caps.queue_counters_valid) {
255 if (!virtq->counters)
256 virtq->counters = mlx5_devx_cmd_create_virtio_q_counters
257 (priv->ctx);
258 if (!virtq->counters) {
259 DRV_LOG(ERR, "Failed to create virtq couners for virtq"
260 " %d.", index);
261 goto error;
262 }
263 attr.counters_obj_id = virtq->counters->id;
264 }
265 /* Setup 3 UMEMs for each virtq. */
266 for (i = 0; i < RTE_DIM(virtq->umems); ++i) {
267 virtq->umems[i].size = priv->caps.umems[i].a * vq.size +
268 priv->caps.umems[i].b;
269 virtq->umems[i].buf = rte_zmalloc(__func__,
270 virtq->umems[i].size, 4096);
271 if (!virtq->umems[i].buf) {
272 DRV_LOG(ERR, "Cannot allocate umem %d memory for virtq"
273 " %u.", i, index);
274 goto error;
275 }
276 virtq->umems[i].obj = mlx5_glue->devx_umem_reg(priv->ctx,
277 virtq->umems[i].buf,
278 virtq->umems[i].size,
279 IBV_ACCESS_LOCAL_WRITE);
280 if (!virtq->umems[i].obj) {
281 DRV_LOG(ERR, "Failed to register umem %d for virtq %u.",
282 i, index);
283 goto error;
284 }
285 attr.umems[i].id = virtq->umems[i].obj->umem_id;
286 attr.umems[i].offset = 0;
287 attr.umems[i].size = virtq->umems[i].size;
288 }
289 if (attr.type == MLX5_VIRTQ_TYPE_SPLIT) {
290 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
291 (uint64_t)(uintptr_t)vq.desc);
292 if (!gpa) {
293 DRV_LOG(ERR, "Failed to get descriptor ring GPA.");
294 goto error;
295 }
296 attr.desc_addr = gpa;
297 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
298 (uint64_t)(uintptr_t)vq.used);
299 if (!gpa) {
300 DRV_LOG(ERR, "Failed to get GPA for used ring.");
301 goto error;
302 }
303 attr.used_addr = gpa;
304 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
305 (uint64_t)(uintptr_t)vq.avail);
306 if (!gpa) {
307 DRV_LOG(ERR, "Failed to get GPA for available ring.");
308 goto error;
309 }
310 attr.available_addr = gpa;
311 }
312 ret = rte_vhost_get_vring_base(priv->vid, index, &last_avail_idx,
313 &last_used_idx);
314 if (ret) {
315 last_avail_idx = 0;
316 last_used_idx = 0;
317 DRV_LOG(WARNING, "Couldn't get vring base, idx are set to 0");
318 } else {
319 DRV_LOG(INFO, "vid %d: Init last_avail_idx=%d, last_used_idx=%d for "
320 "virtq %d.", priv->vid, last_avail_idx,
321 last_used_idx, index);
322 }
323 attr.hw_available_index = last_avail_idx;
324 attr.hw_used_index = last_used_idx;
325 attr.q_size = vq.size;
326 attr.mkey = priv->gpa_mkey_index;
327 attr.tis_id = priv->tiss[(index / 2) % priv->num_lag_ports]->id;
328 attr.queue_index = index;
329 attr.pd = priv->pdn;
330 virtq->virtq = mlx5_devx_cmd_create_virtq(priv->ctx, &attr);
331 virtq->priv = priv;
332 if (!virtq->virtq)
333 goto error;
334 claim_zero(rte_vhost_enable_guest_notification(priv->vid, index, 1));
335 if (mlx5_vdpa_virtq_modify(virtq, 1))
336 goto error;
337 virtq->priv = priv;
338 rte_write32(virtq->index, priv->virtq_db_addr);
339 /* Setup doorbell mapping. */
340 virtq->intr_handle.fd = vq.kickfd;
341 if (virtq->intr_handle.fd == -1) {
342 DRV_LOG(WARNING, "Virtq %d kickfd is invalid.", index);
343 } else {
344 virtq->intr_handle.type = RTE_INTR_HANDLE_EXT;
345 if (rte_intr_callback_register(&virtq->intr_handle,
346 mlx5_vdpa_virtq_handler,
347 virtq)) {
348 virtq->intr_handle.fd = -1;
349 DRV_LOG(ERR, "Failed to register virtq %d interrupt.",
350 index);
351 goto error;
352 } else {
353 DRV_LOG(DEBUG, "Register fd %d interrupt for virtq %d.",
354 virtq->intr_handle.fd, index);
355 }
356 }
357 /* Subscribe virtq error event. */
358 virtq->version++;
359 cookie = ((uint64_t)virtq->version << 32) + index;
360 ret = mlx5_glue->devx_subscribe_devx_event(priv->err_chnl,
361 virtq->virtq->obj,
362 sizeof(event_num),
363 &event_num, cookie);
364 if (ret) {
365 DRV_LOG(ERR, "Failed to subscribe device %d virtq %d error event.",
366 priv->vid, index);
367 rte_errno = errno;
368 goto error;
369 }
370 virtq->stopped = false;
371 DRV_LOG(DEBUG, "vid %u virtq %u was created successfully.", priv->vid,
372 index);
373 return 0;
374 error:
375 mlx5_vdpa_virtq_unset(virtq);
376 return -1;
377 }
378
379 static int
mlx5_vdpa_features_validate(struct mlx5_vdpa_priv * priv)380 mlx5_vdpa_features_validate(struct mlx5_vdpa_priv *priv)
381 {
382 if (priv->features & (1ULL << VIRTIO_F_RING_PACKED)) {
383 if (!(priv->caps.virtio_queue_type & (1 <<
384 MLX5_VIRTQ_TYPE_PACKED))) {
385 DRV_LOG(ERR, "Failed to configur PACKED mode for vdev "
386 "%d - it was not reported by HW/driver"
387 " capability.", priv->vid);
388 return -ENOTSUP;
389 }
390 }
391 if (priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO4)) {
392 if (!priv->caps.tso_ipv4) {
393 DRV_LOG(ERR, "Failed to enable TSO4 for vdev %d - TSO4"
394 " was not reported by HW/driver capability.",
395 priv->vid);
396 return -ENOTSUP;
397 }
398 }
399 if (priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO6)) {
400 if (!priv->caps.tso_ipv6) {
401 DRV_LOG(ERR, "Failed to enable TSO6 for vdev %d - TSO6"
402 " was not reported by HW/driver capability.",
403 priv->vid);
404 return -ENOTSUP;
405 }
406 }
407 if (priv->features & (1ULL << VIRTIO_NET_F_CSUM)) {
408 if (!priv->caps.tx_csum) {
409 DRV_LOG(ERR, "Failed to enable CSUM for vdev %d - CSUM"
410 " was not reported by HW/driver capability.",
411 priv->vid);
412 return -ENOTSUP;
413 }
414 }
415 if (priv->features & (1ULL << VIRTIO_NET_F_GUEST_CSUM)) {
416 if (!priv->caps.rx_csum) {
417 DRV_LOG(ERR, "Failed to enable GUEST CSUM for vdev %d"
418 " GUEST CSUM was not reported by HW/driver "
419 "capability.", priv->vid);
420 return -ENOTSUP;
421 }
422 }
423 if (priv->features & (1ULL << VIRTIO_F_VERSION_1)) {
424 if (!priv->caps.virtio_version_1_0) {
425 DRV_LOG(ERR, "Failed to enable version 1 for vdev %d "
426 "version 1 was not reported by HW/driver"
427 " capability.", priv->vid);
428 return -ENOTSUP;
429 }
430 }
431 return 0;
432 }
433
434 int
mlx5_vdpa_virtqs_prepare(struct mlx5_vdpa_priv * priv)435 mlx5_vdpa_virtqs_prepare(struct mlx5_vdpa_priv *priv)
436 {
437 struct mlx5_devx_tis_attr tis_attr = {0};
438 uint32_t i;
439 uint16_t nr_vring = rte_vhost_get_vring_num(priv->vid);
440 int ret = rte_vhost_get_negotiated_features(priv->vid, &priv->features);
441
442 if (ret || mlx5_vdpa_features_validate(priv)) {
443 DRV_LOG(ERR, "Failed to configure negotiated features.");
444 return -1;
445 }
446 if (nr_vring > priv->caps.max_num_virtio_queues * 2) {
447 DRV_LOG(ERR, "Do not support more than %d virtqs(%d).",
448 (int)priv->caps.max_num_virtio_queues * 2,
449 (int)nr_vring);
450 return -1;
451 }
452 /* Always map the entire page. */
453 priv->virtq_db_addr = mmap(NULL, priv->var->length, PROT_READ |
454 PROT_WRITE, MAP_SHARED, priv->ctx->cmd_fd,
455 priv->var->mmap_off);
456 if (priv->virtq_db_addr == MAP_FAILED) {
457 DRV_LOG(ERR, "Failed to map doorbell page %u.", errno);
458 priv->virtq_db_addr = NULL;
459 goto error;
460 } else {
461 DRV_LOG(DEBUG, "VAR address of doorbell mapping is %p.",
462 priv->virtq_db_addr);
463 }
464 priv->td = mlx5_devx_cmd_create_td(priv->ctx);
465 if (!priv->td) {
466 DRV_LOG(ERR, "Failed to create transport domain.");
467 return -rte_errno;
468 }
469 tis_attr.transport_domain = priv->td->id;
470 for (i = 0; i < priv->num_lag_ports; i++) {
471 /* 0 is auto affinity, non-zero value to propose port. */
472 tis_attr.lag_tx_port_affinity = i + 1;
473 priv->tiss[i] = mlx5_devx_cmd_create_tis(priv->ctx, &tis_attr);
474 if (!priv->tiss[i]) {
475 DRV_LOG(ERR, "Failed to create TIS %u.", i);
476 goto error;
477 }
478 }
479 priv->nr_virtqs = nr_vring;
480 for (i = 0; i < nr_vring; i++)
481 if (priv->virtqs[i].enable && mlx5_vdpa_virtq_setup(priv, i))
482 goto error;
483 return 0;
484 error:
485 mlx5_vdpa_virtqs_release(priv);
486 return -1;
487 }
488
489 static int
mlx5_vdpa_virtq_is_modified(struct mlx5_vdpa_priv * priv,struct mlx5_vdpa_virtq * virtq)490 mlx5_vdpa_virtq_is_modified(struct mlx5_vdpa_priv *priv,
491 struct mlx5_vdpa_virtq *virtq)
492 {
493 struct rte_vhost_vring vq;
494 int ret = rte_vhost_get_vhost_vring(priv->vid, virtq->index, &vq);
495
496 if (ret)
497 return -1;
498 if (vq.size != virtq->vq_size || vq.kickfd != virtq->intr_handle.fd)
499 return 1;
500 if (virtq->eqp.cq.cq) {
501 if (vq.callfd != virtq->eqp.cq.callfd)
502 return 1;
503 } else if (vq.callfd != -1) {
504 return 1;
505 }
506 return 0;
507 }
508
509 int
mlx5_vdpa_virtq_enable(struct mlx5_vdpa_priv * priv,int index,int enable)510 mlx5_vdpa_virtq_enable(struct mlx5_vdpa_priv *priv, int index, int enable)
511 {
512 struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
513 int ret;
514
515 DRV_LOG(INFO, "Update virtq %d status %sable -> %sable.", index,
516 virtq->enable ? "en" : "dis", enable ? "en" : "dis");
517 if (!priv->configured) {
518 virtq->enable = !!enable;
519 return 0;
520 }
521 if (virtq->enable == !!enable) {
522 if (!enable)
523 return 0;
524 ret = mlx5_vdpa_virtq_is_modified(priv, virtq);
525 if (ret < 0) {
526 DRV_LOG(ERR, "Virtq %d modify check failed.", index);
527 return -1;
528 }
529 if (ret == 0)
530 return 0;
531 DRV_LOG(INFO, "Virtq %d was modified, recreate it.", index);
532 }
533 if (virtq->virtq) {
534 virtq->enable = 0;
535 if (is_virtq_recvq(virtq->index, priv->nr_virtqs)) {
536 ret = mlx5_vdpa_steer_update(priv);
537 if (ret)
538 DRV_LOG(WARNING, "Failed to disable steering "
539 "for virtq %d.", index);
540 }
541 mlx5_vdpa_virtq_unset(virtq);
542 }
543 if (enable) {
544 ret = mlx5_vdpa_virtq_setup(priv, index);
545 if (ret) {
546 DRV_LOG(ERR, "Failed to setup virtq %d.", index);
547 return ret;
548 }
549 virtq->enable = 1;
550 if (is_virtq_recvq(virtq->index, priv->nr_virtqs)) {
551 ret = mlx5_vdpa_steer_update(priv);
552 if (ret)
553 DRV_LOG(WARNING, "Failed to enable steering "
554 "for virtq %d.", index);
555 }
556 }
557 return 0;
558 }
559
560 int
mlx5_vdpa_virtq_stats_get(struct mlx5_vdpa_priv * priv,int qid,struct rte_vdpa_stat * stats,unsigned int n)561 mlx5_vdpa_virtq_stats_get(struct mlx5_vdpa_priv *priv, int qid,
562 struct rte_vdpa_stat *stats, unsigned int n)
563 {
564 struct mlx5_vdpa_virtq *virtq = &priv->virtqs[qid];
565 struct mlx5_devx_virtio_q_couners_attr attr = {0};
566 int ret;
567
568 if (!virtq->counters) {
569 DRV_LOG(ERR, "Failed to read virtq %d statistics - virtq "
570 "is invalid.", qid);
571 return -EINVAL;
572 }
573 ret = mlx5_devx_cmd_query_virtio_q_counters(virtq->counters, &attr);
574 if (ret) {
575 DRV_LOG(ERR, "Failed to read virtq %d stats from HW.", qid);
576 return ret;
577 }
578 ret = (int)RTE_MIN(n, (unsigned int)MLX5_VDPA_STATS_MAX);
579 if (ret == MLX5_VDPA_STATS_RECEIVED_DESCRIPTORS)
580 return ret;
581 stats[MLX5_VDPA_STATS_RECEIVED_DESCRIPTORS] = (struct rte_vdpa_stat) {
582 .id = MLX5_VDPA_STATS_RECEIVED_DESCRIPTORS,
583 .value = attr.received_desc - virtq->reset.received_desc,
584 };
585 if (ret == MLX5_VDPA_STATS_COMPLETED_DESCRIPTORS)
586 return ret;
587 stats[MLX5_VDPA_STATS_COMPLETED_DESCRIPTORS] = (struct rte_vdpa_stat) {
588 .id = MLX5_VDPA_STATS_COMPLETED_DESCRIPTORS,
589 .value = attr.completed_desc - virtq->reset.completed_desc,
590 };
591 if (ret == MLX5_VDPA_STATS_BAD_DESCRIPTOR_ERRORS)
592 return ret;
593 stats[MLX5_VDPA_STATS_BAD_DESCRIPTOR_ERRORS] = (struct rte_vdpa_stat) {
594 .id = MLX5_VDPA_STATS_BAD_DESCRIPTOR_ERRORS,
595 .value = attr.bad_desc_errors - virtq->reset.bad_desc_errors,
596 };
597 if (ret == MLX5_VDPA_STATS_EXCEED_MAX_CHAIN)
598 return ret;
599 stats[MLX5_VDPA_STATS_EXCEED_MAX_CHAIN] = (struct rte_vdpa_stat) {
600 .id = MLX5_VDPA_STATS_EXCEED_MAX_CHAIN,
601 .value = attr.exceed_max_chain - virtq->reset.exceed_max_chain,
602 };
603 if (ret == MLX5_VDPA_STATS_INVALID_BUFFER)
604 return ret;
605 stats[MLX5_VDPA_STATS_INVALID_BUFFER] = (struct rte_vdpa_stat) {
606 .id = MLX5_VDPA_STATS_INVALID_BUFFER,
607 .value = attr.invalid_buffer - virtq->reset.invalid_buffer,
608 };
609 if (ret == MLX5_VDPA_STATS_COMPLETION_ERRORS)
610 return ret;
611 stats[MLX5_VDPA_STATS_COMPLETION_ERRORS] = (struct rte_vdpa_stat) {
612 .id = MLX5_VDPA_STATS_COMPLETION_ERRORS,
613 .value = attr.error_cqes - virtq->reset.error_cqes,
614 };
615 return ret;
616 }
617
618 int
mlx5_vdpa_virtq_stats_reset(struct mlx5_vdpa_priv * priv,int qid)619 mlx5_vdpa_virtq_stats_reset(struct mlx5_vdpa_priv *priv, int qid)
620 {
621 struct mlx5_vdpa_virtq *virtq = &priv->virtqs[qid];
622 int ret;
623
624 if (!virtq->counters) {
625 DRV_LOG(ERR, "Failed to read virtq %d statistics - virtq "
626 "is invalid.", qid);
627 return -EINVAL;
628 }
629 ret = mlx5_devx_cmd_query_virtio_q_counters(virtq->counters,
630 &virtq->reset);
631 if (ret)
632 DRV_LOG(ERR, "Failed to read virtq %d reset stats from HW.",
633 qid);
634 return ret;
635 }
636