xref: /f-stack/dpdk/drivers/net/nfp/nfpcore/nfp_nsp.h (revision d30ea906)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2018 Netronome Systems, Inc.
3  * All rights reserved.
4  */
5 
6 #ifndef NSP_NSP_H
7 #define NSP_NSP_H 1
8 
9 #include "nfp_cpp.h"
10 #include "nfp_nsp.h"
11 
12 #define GENMASK_ULL(h, l) \
13 	(((~0ULL) - (1ULL << (l)) + 1) & \
14 	 (~0ULL >> (64 - 1 - (h))))
15 
16 #define __bf_shf(x) (__builtin_ffsll(x) - 1)
17 
18 #define FIELD_GET(_mask, _reg)	\
19 	(__extension__ ({ \
20 		typeof(_mask) _x = (_mask); \
21 		(typeof(_x))(((_reg) & (_x)) >> __bf_shf(_x));	\
22 	}))
23 
24 #define FIELD_FIT(_mask, _val)						\
25 	(__extension__ ({ \
26 		typeof(_mask) _x = (_mask); \
27 		!((((typeof(_x))_val) << __bf_shf(_x)) & ~(_x)); \
28 	}))
29 
30 #define FIELD_PREP(_mask, _val)						\
31 	(__extension__ ({ \
32 		typeof(_mask) _x = (_mask); \
33 		((typeof(_x))(_val) << __bf_shf(_x)) & (_x);	\
34 	}))
35 
36 /* Offsets relative to the CSR base */
37 #define NSP_STATUS		0x00
38 #define   NSP_STATUS_MAGIC	GENMASK_ULL(63, 48)
39 #define   NSP_STATUS_MAJOR	GENMASK_ULL(47, 44)
40 #define   NSP_STATUS_MINOR	GENMASK_ULL(43, 32)
41 #define   NSP_STATUS_CODE	GENMASK_ULL(31, 16)
42 #define   NSP_STATUS_RESULT	GENMASK_ULL(15, 8)
43 #define   NSP_STATUS_BUSY	BIT_ULL(0)
44 
45 #define NSP_COMMAND		0x08
46 #define   NSP_COMMAND_OPTION	GENMASK_ULL(63, 32)
47 #define   NSP_COMMAND_CODE	GENMASK_ULL(31, 16)
48 #define   NSP_COMMAND_START	BIT_ULL(0)
49 
50 /* CPP address to retrieve the data from */
51 #define NSP_BUFFER		0x10
52 #define   NSP_BUFFER_CPP	GENMASK_ULL(63, 40)
53 #define   NSP_BUFFER_PCIE	GENMASK_ULL(39, 38)
54 #define   NSP_BUFFER_ADDRESS	GENMASK_ULL(37, 0)
55 
56 #define NSP_DFLT_BUFFER		0x18
57 
58 #define NSP_DFLT_BUFFER_CONFIG	0x20
59 #define   NSP_DFLT_BUFFER_SIZE_MB	GENMASK_ULL(7, 0)
60 
61 #define NSP_MAGIC		0xab10
62 #define NSP_MAJOR		0
63 #define NSP_MINOR		8
64 
65 #define NSP_CODE_MAJOR		GENMASK(15, 12)
66 #define NSP_CODE_MINOR		GENMASK(11, 0)
67 
68 enum nfp_nsp_cmd {
69 	SPCODE_NOOP		= 0, /* No operation */
70 	SPCODE_SOFT_RESET	= 1, /* Soft reset the NFP */
71 	SPCODE_FW_DEFAULT	= 2, /* Load default (UNDI) FW */
72 	SPCODE_PHY_INIT		= 3, /* Initialize the PHY */
73 	SPCODE_MAC_INIT		= 4, /* Initialize the MAC */
74 	SPCODE_PHY_RXADAPT	= 5, /* Re-run PHY RX Adaptation */
75 	SPCODE_FW_LOAD		= 6, /* Load fw from buffer, len in option */
76 	SPCODE_ETH_RESCAN	= 7, /* Rescan ETHs, write ETH_TABLE to buf */
77 	SPCODE_ETH_CONTROL	= 8, /* Update media config from buffer */
78 	SPCODE_NSP_SENSORS	= 12, /* Read NSP sensor(s) */
79 	SPCODE_NSP_IDENTIFY	= 13, /* Read NSP version */
80 };
81 
82 static const struct {
83 	int code;
84 	const char *msg;
85 } nsp_errors[] = {
86 	{ 6010, "could not map to phy for port" },
87 	{ 6011, "not an allowed rate/lanes for port" },
88 	{ 6012, "not an allowed rate/lanes for port" },
89 	{ 6013, "high/low error, change other port first" },
90 	{ 6014, "config not found in flash" },
91 };
92 
93 struct nfp_nsp {
94 	struct nfp_cpp *cpp;
95 	struct nfp_resource *res;
96 	struct {
97 		uint16_t major;
98 		uint16_t minor;
99 	} ver;
100 
101 	/* Eth table config state */
102 	int modified;
103 	unsigned int idx;
104 	void *entries;
105 };
106 
107 struct nfp_nsp *nfp_nsp_open(struct nfp_cpp *cpp);
108 void nfp_nsp_close(struct nfp_nsp *state);
109 uint16_t nfp_nsp_get_abi_ver_major(struct nfp_nsp *state);
110 uint16_t nfp_nsp_get_abi_ver_minor(struct nfp_nsp *state);
111 int nfp_nsp_wait(struct nfp_nsp *state);
112 int nfp_nsp_device_soft_reset(struct nfp_nsp *state);
113 int nfp_nsp_load_fw(struct nfp_nsp *state, void *buf, unsigned int size);
114 int nfp_nsp_mac_reinit(struct nfp_nsp *state);
115 int nfp_nsp_read_identify(struct nfp_nsp *state, void *buf, unsigned int size);
116 int nfp_nsp_read_sensors(struct nfp_nsp *state, unsigned int sensor_mask,
117 			 void *buf, unsigned int size);
118 
nfp_nsp_has_mac_reinit(struct nfp_nsp * state)119 static inline int nfp_nsp_has_mac_reinit(struct nfp_nsp *state)
120 {
121 	return nfp_nsp_get_abi_ver_minor(state) > 20;
122 }
123 
124 enum nfp_eth_interface {
125 	NFP_INTERFACE_NONE	= 0,
126 	NFP_INTERFACE_SFP	= 1,
127 	NFP_INTERFACE_SFPP	= 10,
128 	NFP_INTERFACE_SFP28	= 28,
129 	NFP_INTERFACE_QSFP	= 40,
130 	NFP_INTERFACE_CXP	= 100,
131 	NFP_INTERFACE_QSFP28	= 112,
132 };
133 
134 enum nfp_eth_media {
135 	NFP_MEDIA_DAC_PASSIVE = 0,
136 	NFP_MEDIA_DAC_ACTIVE,
137 	NFP_MEDIA_FIBRE,
138 };
139 
140 enum nfp_eth_aneg {
141 	NFP_ANEG_AUTO = 0,
142 	NFP_ANEG_SEARCH,
143 	NFP_ANEG_25G_CONSORTIUM,
144 	NFP_ANEG_25G_IEEE,
145 	NFP_ANEG_DISABLED,
146 };
147 
148 enum nfp_eth_fec {
149 	NFP_FEC_AUTO_BIT = 0,
150 	NFP_FEC_BASER_BIT,
151 	NFP_FEC_REED_SOLOMON_BIT,
152 	NFP_FEC_DISABLED_BIT,
153 };
154 
155 #define NFP_FEC_AUTO		BIT(NFP_FEC_AUTO_BIT)
156 #define NFP_FEC_BASER		BIT(NFP_FEC_BASER_BIT)
157 #define NFP_FEC_REED_SOLOMON	BIT(NFP_FEC_REED_SOLOMON_BIT)
158 #define NFP_FEC_DISABLED	BIT(NFP_FEC_DISABLED_BIT)
159 
160 #define ETH_ALEN	6
161 
162 /**
163  * struct nfp_eth_table - ETH table information
164  * @count:	number of table entries
165  * @max_index:	max of @index fields of all @ports
166  * @ports:	table of ports
167  *
168  * @eth_index:	port index according to legacy ethX numbering
169  * @index:	chip-wide first channel index
170  * @nbi:	NBI index
171  * @base:	first channel index (within NBI)
172  * @lanes:	number of channels
173  * @speed:	interface speed (in Mbps)
174  * @interface:	interface (module) plugged in
175  * @media:	media type of the @interface
176  * @fec:	forward error correction mode
177  * @aneg:	auto negotiation mode
178  * @mac_addr:	interface MAC address
179  * @label_port:	port id
180  * @label_subport:  id of interface within port (for split ports)
181  * @enabled:	is enabled?
182  * @tx_enabled:	is TX enabled?
183  * @rx_enabled:	is RX enabled?
184  * @override_changed: is media reconfig pending?
185  *
186  * @port_type:	one of %PORT_* defines for ethtool
187  * @port_lanes:	total number of lanes on the port (sum of lanes of all subports)
188  * @is_split:	is interface part of a split port
189  * @fec_modes_supported:	bitmap of FEC modes supported
190  */
191 struct nfp_eth_table {
192 	unsigned int count;
193 	unsigned int max_index;
194 	struct nfp_eth_table_port {
195 		unsigned int eth_index;
196 		unsigned int index;
197 		unsigned int nbi;
198 		unsigned int base;
199 		unsigned int lanes;
200 		unsigned int speed;
201 
202 		unsigned int interface;
203 		enum nfp_eth_media media;
204 
205 		enum nfp_eth_fec fec;
206 		enum nfp_eth_aneg aneg;
207 
208 		uint8_t mac_addr[ETH_ALEN];
209 
210 		uint8_t label_port;
211 		uint8_t label_subport;
212 
213 		int enabled;
214 		int tx_enabled;
215 		int rx_enabled;
216 
217 		int override_changed;
218 
219 		/* Computed fields */
220 		uint8_t port_type;
221 
222 		unsigned int port_lanes;
223 
224 		int is_split;
225 
226 		unsigned int fec_modes_supported;
227 	} ports[0];
228 };
229 
230 struct nfp_eth_table *nfp_eth_read_ports(struct nfp_cpp *cpp);
231 
232 int nfp_eth_set_mod_enable(struct nfp_cpp *cpp, unsigned int idx, int enable);
233 int nfp_eth_set_configured(struct nfp_cpp *cpp, unsigned int idx,
234 			   int configed);
235 int
236 nfp_eth_set_fec(struct nfp_cpp *cpp, unsigned int idx, enum nfp_eth_fec mode);
237 
238 int nfp_nsp_read_eth_table(struct nfp_nsp *state, void *buf, unsigned int size);
239 int nfp_nsp_write_eth_table(struct nfp_nsp *state, const void *buf,
240 			    unsigned int size);
241 void nfp_nsp_config_set_state(struct nfp_nsp *state, void *entries,
242 			      unsigned int idx);
243 void nfp_nsp_config_clear_state(struct nfp_nsp *state);
244 void nfp_nsp_config_set_modified(struct nfp_nsp *state, int modified);
245 void *nfp_nsp_config_entries(struct nfp_nsp *state);
246 int nfp_nsp_config_modified(struct nfp_nsp *state);
247 unsigned int nfp_nsp_config_idx(struct nfp_nsp *state);
248 
nfp_eth_can_support_fec(struct nfp_eth_table_port * eth_port)249 static inline int nfp_eth_can_support_fec(struct nfp_eth_table_port *eth_port)
250 {
251 	return !!eth_port->fec_modes_supported;
252 }
253 
254 static inline unsigned int
nfp_eth_supported_fec_modes(struct nfp_eth_table_port * eth_port)255 nfp_eth_supported_fec_modes(struct nfp_eth_table_port *eth_port)
256 {
257 	return eth_port->fec_modes_supported;
258 }
259 
260 struct nfp_nsp *nfp_eth_config_start(struct nfp_cpp *cpp, unsigned int idx);
261 int nfp_eth_config_commit_end(struct nfp_nsp *nsp);
262 void nfp_eth_config_cleanup_end(struct nfp_nsp *nsp);
263 
264 int __nfp_eth_set_aneg(struct nfp_nsp *nsp, enum nfp_eth_aneg mode);
265 int __nfp_eth_set_speed(struct nfp_nsp *nsp, unsigned int speed);
266 int __nfp_eth_set_split(struct nfp_nsp *nsp, unsigned int lanes);
267 
268 /**
269  * struct nfp_nsp_identify - NSP static information
270  * @version:      opaque version string
271  * @flags:        version flags
272  * @br_primary:   branch id of primary bootloader
273  * @br_secondary: branch id of secondary bootloader
274  * @br_nsp:       branch id of NSP
275  * @primary:      version of primarary bootloader
276  * @secondary:    version id of secondary bootloader
277  * @nsp:          version id of NSP
278  * @sensor_mask:  mask of present sensors available on NIC
279  */
280 struct nfp_nsp_identify {
281 	char version[40];
282 	uint8_t flags;
283 	uint8_t br_primary;
284 	uint8_t br_secondary;
285 	uint8_t br_nsp;
286 	uint16_t primary;
287 	uint16_t secondary;
288 	uint16_t nsp;
289 	uint64_t sensor_mask;
290 };
291 
292 struct nfp_nsp_identify *__nfp_nsp_identify(struct nfp_nsp *nsp);
293 
294 enum nfp_nsp_sensor_id {
295 	NFP_SENSOR_CHIP_TEMPERATURE,
296 	NFP_SENSOR_ASSEMBLY_POWER,
297 	NFP_SENSOR_ASSEMBLY_12V_POWER,
298 	NFP_SENSOR_ASSEMBLY_3V3_POWER,
299 };
300 
301 int nfp_hwmon_read_sensor(struct nfp_cpp *cpp, enum nfp_nsp_sensor_id id,
302 			  long *val);
303 
304 #endif
305