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Searched defs:isPredicable (Results 1 – 9 of 9) sorted by relevance

/llvm-project-15.0.7/llvm/utils/TableGen/
H A DCodeGenInstruction.h153 bool isPredicable; variable
257 bool isPredicable : 1; variable
/llvm-project-15.0.7/llvm/include/llvm/MC/
H A DMCInstrDesc.h335 bool isPredicable() const { return Flags & (1ULL << MCID::Predicable); } in isPredicable() function
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonExpandCondsets.cpp723 bool HexagonExpandCondsets::isPredicable(MachineInstr *MI) { in isPredicable() function in HexagonExpandCondsets
H A DHexagonInstrInfo.cpp1748 bool HexagonInstrInfo::isPredicable(const MachineInstr &MI) const { in isPredicable() function in HexagonInstrInfo
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.cpp850 bool R600InstrInfo::isPredicable(const MachineInstr &MI) const { in isPredicable() function in R600InstrInfo
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.cpp677 bool SystemZInstrInfo::isPredicable(const MachineInstr &MI) const { in isPredicable() function in SystemZInstrInfo
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h1488 virtual bool isPredicable(const MachineInstr &MI) const { in isPredicable() function
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp721 bool ARMBaseInstrInfo::isPredicable(const MachineInstr &MI) const { in isPredicable() function in ARMBaseInstrInfo
/llvm-project-15.0.7/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp7020 bool isPredicable = in CDEConvertDualRegOperand() local