1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2015 Intel Corporation
3 */
4
5 #ifndef _I40E_RXTX_H_
6 #define _I40E_RXTX_H_
7
8 #define RTE_PMD_I40E_RX_MAX_BURST 32
9 #define RTE_PMD_I40E_TX_MAX_BURST 32
10
11 #define RTE_I40E_VPMD_RX_BURST 32
12 #define RTE_I40E_VPMD_TX_BURST 32
13 #define RTE_I40E_RXQ_REARM_THRESH 32
14 #define RTE_I40E_MAX_RX_BURST RTE_I40E_RXQ_REARM_THRESH
15 #define RTE_I40E_TX_MAX_FREE_BUF_SZ 64
16 #define RTE_I40E_DESCS_PER_LOOP 4
17
18 #define I40E_RXBUF_SZ_1024 1024
19 #define I40E_RXBUF_SZ_2048 2048
20
21 /* In none-PXE mode QLEN must be whole number of 32 descriptors. */
22 #define I40E_ALIGN_RING_DESC 32
23
24 #define I40E_MIN_RING_DESC 64
25 #define I40E_MAX_RING_DESC 4096
26
27 #define I40E_FDIR_NUM_TX_DESC (I40E_FDIR_PRG_PKT_CNT << 1)
28 #define I40E_FDIR_NUM_RX_DESC (I40E_FDIR_PRG_PKT_CNT << 1)
29
30 #define I40E_MIN_TSO_MSS 256
31 #define I40E_MAX_TSO_MSS 9674
32
33 #define I40E_TX_MAX_SEG UINT8_MAX
34 #define I40E_TX_MAX_MTU_SEG 8
35
36 #define I40E_TX_MIN_PKT_LEN 17
37
38 /* Shared FDIR masks between scalar / vector drivers */
39 #define I40E_RX_DESC_EXT_STATUS_FLEXBH_MASK 0x03
40 #define I40E_RX_DESC_EXT_STATUS_FLEXBH_FD_ID 0x01
41 #define I40E_RX_DESC_EXT_STATUS_FLEXBH_FLEX 0x02
42 #define I40E_RX_DESC_EXT_STATUS_FLEXBL_MASK 0x03
43 #define I40E_RX_DESC_EXT_STATUS_FLEXBL_FLEX 0x01
44
45 #undef container_of
46 #define container_of(ptr, type, member) ({ \
47 typeof(((type *)0)->member)(*__mptr) = (ptr); \
48 (type *)((char *)__mptr - offsetof(type, member)); })
49
50 #define I40E_TD_CMD (I40E_TX_DESC_CMD_ICRC |\
51 I40E_TX_DESC_CMD_EOP)
52
53 enum i40e_header_split_mode {
54 i40e_header_split_none = 0,
55 i40e_header_split_enabled = 1,
56 i40e_header_split_always = 2,
57 i40e_header_split_reserved
58 };
59
60 #define I40E_HEADER_SPLIT_NONE ((uint8_t)0)
61 #define I40E_HEADER_SPLIT_L2 ((uint8_t)(1 << 0))
62 #define I40E_HEADER_SPLIT_IP ((uint8_t)(1 << 1))
63 #define I40E_HEADER_SPLIT_UDP_TCP ((uint8_t)(1 << 2))
64 #define I40E_HEADER_SPLIT_SCTP ((uint8_t)(1 << 3))
65 #define I40E_HEADER_SPLIT_ALL (I40E_HEADER_SPLIT_L2 | \
66 I40E_HEADER_SPLIT_IP | \
67 I40E_HEADER_SPLIT_UDP_TCP | \
68 I40E_HEADER_SPLIT_SCTP)
69
70 /* HW desc structure, both 16-byte and 32-byte types are supported */
71 #ifdef RTE_LIBRTE_I40E_16BYTE_RX_DESC
72 #define i40e_rx_desc i40e_16byte_rx_desc
73 #else
74 #define i40e_rx_desc i40e_32byte_rx_desc
75 #endif
76
77 struct i40e_rx_entry {
78 struct rte_mbuf *mbuf;
79 };
80
81 /*
82 * Structure associated with each RX queue.
83 */
84 struct i40e_rx_queue {
85 struct rte_mempool *mp; /**< mbuf pool to populate RX ring */
86 volatile union i40e_rx_desc *rx_ring;/**< RX ring virtual address */
87 uint64_t rx_ring_phys_addr; /**< RX ring DMA address */
88 struct i40e_rx_entry *sw_ring; /**< address of RX soft ring */
89 uint16_t nb_rx_desc; /**< number of RX descriptors */
90 uint16_t rx_free_thresh; /**< max free RX desc to hold */
91 uint16_t rx_tail; /**< current value of tail */
92 uint16_t nb_rx_hold; /**< number of held free RX desc */
93 struct rte_mbuf *pkt_first_seg; /**< first segment of current packet */
94 struct rte_mbuf *pkt_last_seg; /**< last segment of current packet */
95 struct rte_mbuf fake_mbuf; /**< dummy mbuf */
96 #ifdef RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC
97 uint16_t rx_nb_avail; /**< number of staged packets ready */
98 uint16_t rx_next_avail; /**< index of next staged packets */
99 uint16_t rx_free_trigger; /**< triggers rx buffer allocation */
100 struct rte_mbuf *rx_stage[RTE_PMD_I40E_RX_MAX_BURST * 2];
101 #endif
102
103 uint16_t rxrearm_nb; /**< number of remaining to be re-armed */
104 uint16_t rxrearm_start; /**< the idx we start the re-arming from */
105 uint64_t mbuf_initializer; /**< value to init mbufs */
106
107 uint16_t port_id; /**< device port ID */
108 uint8_t crc_len; /**< 0 if CRC stripped, 4 otherwise */
109 uint8_t fdir_enabled; /**< 0 if FDIR disabled, 1 when enabled */
110 uint16_t queue_id; /**< RX queue index */
111 uint16_t reg_idx; /**< RX queue register index */
112 uint8_t drop_en; /**< if not 0, set register bit */
113 volatile uint8_t *qrx_tail; /**< register address of tail */
114 struct i40e_vsi *vsi; /**< the VSI this queue belongs to */
115 uint16_t rx_buf_len; /* The packet buffer size */
116 uint16_t rx_hdr_len; /* The header buffer size */
117 uint16_t max_pkt_len; /* Maximum packet length */
118 uint8_t hs_mode; /* Header Split mode */
119 bool q_set; /**< indicate if rx queue has been configured */
120 bool rx_deferred_start; /**< don't start this queue in dev start */
121 uint16_t rx_using_sse; /**<flag indicate the usage of vPMD for rx */
122 uint8_t dcb_tc; /**< Traffic class of rx queue */
123 uint64_t offloads; /**< Rx offload flags of DEV_RX_OFFLOAD_* */
124 };
125
126 struct i40e_tx_entry {
127 struct rte_mbuf *mbuf;
128 uint16_t next_id;
129 uint16_t last_id;
130 };
131
132 /*
133 * Structure associated with each TX queue.
134 */
135 struct i40e_tx_queue {
136 uint16_t nb_tx_desc; /**< number of TX descriptors */
137 uint64_t tx_ring_phys_addr; /**< TX ring DMA address */
138 volatile struct i40e_tx_desc *tx_ring; /**< TX ring virtual address */
139 struct i40e_tx_entry *sw_ring; /**< virtual address of SW ring */
140 uint16_t tx_tail; /**< current value of tail register */
141 volatile uint8_t *qtx_tail; /**< register address of tail */
142 uint16_t nb_tx_used; /**< number of TX desc used since RS bit set */
143 /**< index to last TX descriptor to have been cleaned */
144 uint16_t last_desc_cleaned;
145 /**< Total number of TX descriptors ready to be allocated. */
146 uint16_t nb_tx_free;
147 /**< Start freeing TX buffers if there are less free descriptors than
148 this value. */
149 uint16_t tx_free_thresh;
150 /** Number of TX descriptors to use before RS bit is set. */
151 uint16_t tx_rs_thresh;
152 uint8_t pthresh; /**< Prefetch threshold register. */
153 uint8_t hthresh; /**< Host threshold register. */
154 uint8_t wthresh; /**< Write-back threshold reg. */
155 uint16_t port_id; /**< Device port identifier. */
156 uint16_t queue_id; /**< TX queue index. */
157 uint16_t reg_idx;
158 struct i40e_vsi *vsi; /**< the VSI this queue belongs to */
159 uint16_t tx_next_dd;
160 uint16_t tx_next_rs;
161 bool q_set; /**< indicate if tx queue has been configured */
162 bool tx_deferred_start; /**< don't start this queue in dev start */
163 uint8_t dcb_tc; /**< Traffic class of tx queue */
164 uint64_t offloads; /**< Tx offload flags of DEV_RX_OFFLOAD_* */
165 };
166
167 /** Offload features */
168 union i40e_tx_offload {
169 uint64_t data;
170 struct {
171 uint64_t l2_len:7; /**< L2 (MAC) Header Length. */
172 uint64_t l3_len:9; /**< L3 (IP) Header Length. */
173 uint64_t l4_len:8; /**< L4 Header Length. */
174 uint64_t tso_segsz:16; /**< TCP TSO segment size */
175 uint64_t outer_l2_len:8; /**< outer L2 Header Length */
176 uint64_t outer_l3_len:16; /**< outer L3 Header Length */
177 };
178 };
179
180 int i40e_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
181 int i40e_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
182 int i40e_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
183 int i40e_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
184 const uint32_t *i40e_dev_supported_ptypes_get(struct rte_eth_dev *dev);
185 int i40e_dev_rx_queue_setup(struct rte_eth_dev *dev,
186 uint16_t queue_idx,
187 uint16_t nb_desc,
188 unsigned int socket_id,
189 const struct rte_eth_rxconf *rx_conf,
190 struct rte_mempool *mp);
191 int i40e_dev_tx_queue_setup(struct rte_eth_dev *dev,
192 uint16_t queue_idx,
193 uint16_t nb_desc,
194 unsigned int socket_id,
195 const struct rte_eth_txconf *tx_conf);
196 void i40e_dev_rx_queue_release(void *rxq);
197 void i40e_dev_tx_queue_release(void *txq);
198 uint16_t i40e_recv_pkts(void *rx_queue,
199 struct rte_mbuf **rx_pkts,
200 uint16_t nb_pkts);
201 uint16_t i40e_recv_scattered_pkts(void *rx_queue,
202 struct rte_mbuf **rx_pkts,
203 uint16_t nb_pkts);
204 uint16_t i40e_xmit_pkts(void *tx_queue,
205 struct rte_mbuf **tx_pkts,
206 uint16_t nb_pkts);
207 uint16_t i40e_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
208 uint16_t nb_pkts);
209 int i40e_tx_queue_init(struct i40e_tx_queue *txq);
210 int i40e_rx_queue_init(struct i40e_rx_queue *rxq);
211 void i40e_free_tx_resources(struct i40e_tx_queue *txq);
212 void i40e_free_rx_resources(struct i40e_rx_queue *rxq);
213 void i40e_dev_clear_queues(struct rte_eth_dev *dev);
214 void i40e_dev_free_queues(struct rte_eth_dev *dev);
215 void i40e_reset_rx_queue(struct i40e_rx_queue *rxq);
216 void i40e_reset_tx_queue(struct i40e_tx_queue *txq);
217 void i40e_tx_queue_release_mbufs(struct i40e_tx_queue *txq);
218 int i40e_tx_done_cleanup(void *txq, uint32_t free_cnt);
219 int i40e_alloc_rx_queue_mbufs(struct i40e_rx_queue *rxq);
220 void i40e_rx_queue_release_mbufs(struct i40e_rx_queue *rxq);
221
222 uint32_t i40e_dev_rx_queue_count(struct rte_eth_dev *dev,
223 uint16_t rx_queue_id);
224 int i40e_dev_rx_descriptor_done(void *rx_queue, uint16_t offset);
225 int i40e_dev_rx_descriptor_status(void *rx_queue, uint16_t offset);
226 int i40e_dev_tx_descriptor_status(void *tx_queue, uint16_t offset);
227
228 uint16_t i40e_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
229 uint16_t nb_pkts);
230 uint16_t i40e_recv_scattered_pkts_vec(void *rx_queue,
231 struct rte_mbuf **rx_pkts,
232 uint16_t nb_pkts);
233 int i40e_rx_vec_dev_conf_condition_check(struct rte_eth_dev *dev);
234 int i40e_rxq_vec_setup(struct i40e_rx_queue *rxq);
235 int i40e_txq_vec_setup(struct i40e_tx_queue *txq);
236 void i40e_rx_queue_release_mbufs_vec(struct i40e_rx_queue *rxq);
237 uint16_t i40e_xmit_fixed_burst_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
238 uint16_t nb_pkts);
239 void i40e_set_rx_function(struct rte_eth_dev *dev);
240 void i40e_set_tx_function_flag(struct rte_eth_dev *dev,
241 struct i40e_tx_queue *txq);
242 void i40e_set_tx_function(struct rte_eth_dev *dev);
243 void i40e_set_default_ptype_table(struct rte_eth_dev *dev);
244 void i40e_set_default_pctype_table(struct rte_eth_dev *dev);
245 uint16_t i40e_recv_pkts_vec_avx2(void *rx_queue, struct rte_mbuf **rx_pkts,
246 uint16_t nb_pkts);
247 uint16_t i40e_recv_scattered_pkts_vec_avx2(void *rx_queue,
248 struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
249 uint16_t i40e_xmit_pkts_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
250 uint16_t nb_pkts);
251
252 /* For each value it means, datasheet of hardware can tell more details
253 *
254 * @note: fix i40e_dev_supported_ptypes_get() if any change here.
255 */
256 static inline uint32_t
i40e_get_default_pkt_type(uint8_t ptype)257 i40e_get_default_pkt_type(uint8_t ptype)
258 {
259 static const uint32_t type_table[UINT8_MAX + 1] __rte_cache_aligned = {
260 /* L2 types */
261 /* [0] reserved */
262 [1] = RTE_PTYPE_L2_ETHER,
263 [2] = RTE_PTYPE_L2_ETHER_TIMESYNC,
264 /* [3] - [5] reserved */
265 [6] = RTE_PTYPE_L2_ETHER_LLDP,
266 /* [7] - [10] reserved */
267 [11] = RTE_PTYPE_L2_ETHER_ARP,
268 /* [12] - [21] reserved */
269
270 /* Non tunneled IPv4 */
271 [22] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
272 RTE_PTYPE_L4_FRAG,
273 [23] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
274 RTE_PTYPE_L4_NONFRAG,
275 [24] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
276 RTE_PTYPE_L4_UDP,
277 /* [25] reserved */
278 [26] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
279 RTE_PTYPE_L4_TCP,
280 [27] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
281 RTE_PTYPE_L4_SCTP,
282 [28] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
283 RTE_PTYPE_L4_ICMP,
284
285 /* IPv4 --> IPv4 */
286 [29] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
287 RTE_PTYPE_TUNNEL_IP |
288 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
289 RTE_PTYPE_INNER_L4_FRAG,
290 [30] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
291 RTE_PTYPE_TUNNEL_IP |
292 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
293 RTE_PTYPE_INNER_L4_NONFRAG,
294 [31] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
295 RTE_PTYPE_TUNNEL_IP |
296 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
297 RTE_PTYPE_INNER_L4_UDP,
298 /* [32] reserved */
299 [33] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
300 RTE_PTYPE_TUNNEL_IP |
301 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
302 RTE_PTYPE_INNER_L4_TCP,
303 [34] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
304 RTE_PTYPE_TUNNEL_IP |
305 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
306 RTE_PTYPE_INNER_L4_SCTP,
307 [35] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
308 RTE_PTYPE_TUNNEL_IP |
309 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
310 RTE_PTYPE_INNER_L4_ICMP,
311
312 /* IPv4 --> IPv6 */
313 [36] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
314 RTE_PTYPE_TUNNEL_IP |
315 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
316 RTE_PTYPE_INNER_L4_FRAG,
317 [37] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
318 RTE_PTYPE_TUNNEL_IP |
319 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
320 RTE_PTYPE_INNER_L4_NONFRAG,
321 [38] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
322 RTE_PTYPE_TUNNEL_IP |
323 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
324 RTE_PTYPE_INNER_L4_UDP,
325 /* [39] reserved */
326 [40] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
327 RTE_PTYPE_TUNNEL_IP |
328 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
329 RTE_PTYPE_INNER_L4_TCP,
330 [41] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
331 RTE_PTYPE_TUNNEL_IP |
332 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
333 RTE_PTYPE_INNER_L4_SCTP,
334 [42] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
335 RTE_PTYPE_TUNNEL_IP |
336 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
337 RTE_PTYPE_INNER_L4_ICMP,
338
339 /* IPv4 --> GRE/Teredo/VXLAN */
340 [43] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
341 RTE_PTYPE_TUNNEL_GRENAT,
342
343 /* IPv4 --> GRE/Teredo/VXLAN --> IPv4 */
344 [44] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
345 RTE_PTYPE_TUNNEL_GRENAT |
346 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
347 RTE_PTYPE_INNER_L4_FRAG,
348 [45] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
349 RTE_PTYPE_TUNNEL_GRENAT |
350 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
351 RTE_PTYPE_INNER_L4_NONFRAG,
352 [46] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
353 RTE_PTYPE_TUNNEL_GRENAT |
354 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
355 RTE_PTYPE_INNER_L4_UDP,
356 /* [47] reserved */
357 [48] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
358 RTE_PTYPE_TUNNEL_GRENAT |
359 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
360 RTE_PTYPE_INNER_L4_TCP,
361 [49] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
362 RTE_PTYPE_TUNNEL_GRENAT |
363 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
364 RTE_PTYPE_INNER_L4_SCTP,
365 [50] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
366 RTE_PTYPE_TUNNEL_GRENAT |
367 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
368 RTE_PTYPE_INNER_L4_ICMP,
369
370 /* IPv4 --> GRE/Teredo/VXLAN --> IPv6 */
371 [51] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
372 RTE_PTYPE_TUNNEL_GRENAT |
373 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
374 RTE_PTYPE_INNER_L4_FRAG,
375 [52] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
376 RTE_PTYPE_TUNNEL_GRENAT |
377 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
378 RTE_PTYPE_INNER_L4_NONFRAG,
379 [53] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
380 RTE_PTYPE_TUNNEL_GRENAT |
381 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
382 RTE_PTYPE_INNER_L4_UDP,
383 /* [54] reserved */
384 [55] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
385 RTE_PTYPE_TUNNEL_GRENAT |
386 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
387 RTE_PTYPE_INNER_L4_TCP,
388 [56] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
389 RTE_PTYPE_TUNNEL_GRENAT |
390 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
391 RTE_PTYPE_INNER_L4_SCTP,
392 [57] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
393 RTE_PTYPE_TUNNEL_GRENAT |
394 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
395 RTE_PTYPE_INNER_L4_ICMP,
396
397 /* IPv4 --> GRE/Teredo/VXLAN --> MAC */
398 [58] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
399 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER,
400
401 /* IPv4 --> GRE/Teredo/VXLAN --> MAC --> IPv4 */
402 [59] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
403 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
404 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
405 RTE_PTYPE_INNER_L4_FRAG,
406 [60] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
407 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
408 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
409 RTE_PTYPE_INNER_L4_NONFRAG,
410 [61] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
411 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
412 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
413 RTE_PTYPE_INNER_L4_UDP,
414 /* [62] reserved */
415 [63] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
416 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
417 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
418 RTE_PTYPE_INNER_L4_TCP,
419 [64] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
420 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
421 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
422 RTE_PTYPE_INNER_L4_SCTP,
423 [65] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
424 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
425 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
426 RTE_PTYPE_INNER_L4_ICMP,
427
428 /* IPv4 --> GRE/Teredo/VXLAN --> MAC --> IPv6 */
429 [66] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
430 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
431 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
432 RTE_PTYPE_INNER_L4_FRAG,
433 [67] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
434 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
435 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
436 RTE_PTYPE_INNER_L4_NONFRAG,
437 [68] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
438 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
439 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
440 RTE_PTYPE_INNER_L4_UDP,
441 /* [69] reserved */
442 [70] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
443 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
444 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
445 RTE_PTYPE_INNER_L4_TCP,
446 [71] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
447 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
448 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
449 RTE_PTYPE_INNER_L4_SCTP,
450 [72] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
451 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
452 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
453 RTE_PTYPE_INNER_L4_ICMP,
454
455 /* IPv4 --> GRE/Teredo/VXLAN --> MAC/VLAN */
456 [73] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
457 RTE_PTYPE_TUNNEL_GRENAT |
458 RTE_PTYPE_INNER_L2_ETHER_VLAN,
459
460 /* IPv4 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv4 */
461 [74] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
462 RTE_PTYPE_TUNNEL_GRENAT |
463 RTE_PTYPE_INNER_L2_ETHER_VLAN |
464 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
465 RTE_PTYPE_INNER_L4_FRAG,
466 [75] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
467 RTE_PTYPE_TUNNEL_GRENAT |
468 RTE_PTYPE_INNER_L2_ETHER_VLAN |
469 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
470 RTE_PTYPE_INNER_L4_NONFRAG,
471 [76] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
472 RTE_PTYPE_TUNNEL_GRENAT |
473 RTE_PTYPE_INNER_L2_ETHER_VLAN |
474 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
475 RTE_PTYPE_INNER_L4_UDP,
476 /* [77] reserved */
477 [78] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
478 RTE_PTYPE_TUNNEL_GRENAT |
479 RTE_PTYPE_INNER_L2_ETHER_VLAN |
480 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
481 RTE_PTYPE_INNER_L4_TCP,
482 [79] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
483 RTE_PTYPE_TUNNEL_GRENAT |
484 RTE_PTYPE_INNER_L2_ETHER_VLAN |
485 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
486 RTE_PTYPE_INNER_L4_SCTP,
487 [80] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
488 RTE_PTYPE_TUNNEL_GRENAT |
489 RTE_PTYPE_INNER_L2_ETHER_VLAN |
490 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
491 RTE_PTYPE_INNER_L4_ICMP,
492
493 /* IPv4 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv6 */
494 [81] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
495 RTE_PTYPE_TUNNEL_GRENAT |
496 RTE_PTYPE_INNER_L2_ETHER_VLAN |
497 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
498 RTE_PTYPE_INNER_L4_FRAG,
499 [82] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
500 RTE_PTYPE_TUNNEL_GRENAT |
501 RTE_PTYPE_INNER_L2_ETHER_VLAN |
502 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
503 RTE_PTYPE_INNER_L4_NONFRAG,
504 [83] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
505 RTE_PTYPE_TUNNEL_GRENAT |
506 RTE_PTYPE_INNER_L2_ETHER_VLAN |
507 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
508 RTE_PTYPE_INNER_L4_UDP,
509 /* [84] reserved */
510 [85] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
511 RTE_PTYPE_TUNNEL_GRENAT |
512 RTE_PTYPE_INNER_L2_ETHER_VLAN |
513 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
514 RTE_PTYPE_INNER_L4_TCP,
515 [86] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
516 RTE_PTYPE_TUNNEL_GRENAT |
517 RTE_PTYPE_INNER_L2_ETHER_VLAN |
518 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
519 RTE_PTYPE_INNER_L4_SCTP,
520 [87] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
521 RTE_PTYPE_TUNNEL_GRENAT |
522 RTE_PTYPE_INNER_L2_ETHER_VLAN |
523 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
524 RTE_PTYPE_INNER_L4_ICMP,
525
526 /* Non tunneled IPv6 */
527 [88] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
528 RTE_PTYPE_L4_FRAG,
529 [89] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
530 RTE_PTYPE_L4_NONFRAG,
531 [90] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
532 RTE_PTYPE_L4_UDP,
533 /* [91] reserved */
534 [92] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
535 RTE_PTYPE_L4_TCP,
536 [93] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
537 RTE_PTYPE_L4_SCTP,
538 [94] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
539 RTE_PTYPE_L4_ICMP,
540
541 /* IPv6 --> IPv4 */
542 [95] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
543 RTE_PTYPE_TUNNEL_IP |
544 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
545 RTE_PTYPE_INNER_L4_FRAG,
546 [96] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
547 RTE_PTYPE_TUNNEL_IP |
548 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
549 RTE_PTYPE_INNER_L4_NONFRAG,
550 [97] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
551 RTE_PTYPE_TUNNEL_IP |
552 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
553 RTE_PTYPE_INNER_L4_UDP,
554 /* [98] reserved */
555 [99] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
556 RTE_PTYPE_TUNNEL_IP |
557 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
558 RTE_PTYPE_INNER_L4_TCP,
559 [100] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
560 RTE_PTYPE_TUNNEL_IP |
561 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
562 RTE_PTYPE_INNER_L4_SCTP,
563 [101] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
564 RTE_PTYPE_TUNNEL_IP |
565 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
566 RTE_PTYPE_INNER_L4_ICMP,
567
568 /* IPv6 --> IPv6 */
569 [102] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
570 RTE_PTYPE_TUNNEL_IP |
571 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
572 RTE_PTYPE_INNER_L4_FRAG,
573 [103] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
574 RTE_PTYPE_TUNNEL_IP |
575 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
576 RTE_PTYPE_INNER_L4_NONFRAG,
577 [104] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
578 RTE_PTYPE_TUNNEL_IP |
579 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
580 RTE_PTYPE_INNER_L4_UDP,
581 /* [105] reserved */
582 [106] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
583 RTE_PTYPE_TUNNEL_IP |
584 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
585 RTE_PTYPE_INNER_L4_TCP,
586 [107] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
587 RTE_PTYPE_TUNNEL_IP |
588 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
589 RTE_PTYPE_INNER_L4_SCTP,
590 [108] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
591 RTE_PTYPE_TUNNEL_IP |
592 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
593 RTE_PTYPE_INNER_L4_ICMP,
594
595 /* IPv6 --> GRE/Teredo/VXLAN */
596 [109] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
597 RTE_PTYPE_TUNNEL_GRENAT,
598
599 /* IPv6 --> GRE/Teredo/VXLAN --> IPv4 */
600 [110] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
601 RTE_PTYPE_TUNNEL_GRENAT |
602 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
603 RTE_PTYPE_INNER_L4_FRAG,
604 [111] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
605 RTE_PTYPE_TUNNEL_GRENAT |
606 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
607 RTE_PTYPE_INNER_L4_NONFRAG,
608 [112] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
609 RTE_PTYPE_TUNNEL_GRENAT |
610 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
611 RTE_PTYPE_INNER_L4_UDP,
612 /* [113] reserved */
613 [114] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
614 RTE_PTYPE_TUNNEL_GRENAT |
615 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
616 RTE_PTYPE_INNER_L4_TCP,
617 [115] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
618 RTE_PTYPE_TUNNEL_GRENAT |
619 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
620 RTE_PTYPE_INNER_L4_SCTP,
621 [116] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
622 RTE_PTYPE_TUNNEL_GRENAT |
623 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
624 RTE_PTYPE_INNER_L4_ICMP,
625
626 /* IPv6 --> GRE/Teredo/VXLAN --> IPv6 */
627 [117] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
628 RTE_PTYPE_TUNNEL_GRENAT |
629 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
630 RTE_PTYPE_INNER_L4_FRAG,
631 [118] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
632 RTE_PTYPE_TUNNEL_GRENAT |
633 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
634 RTE_PTYPE_INNER_L4_NONFRAG,
635 [119] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
636 RTE_PTYPE_TUNNEL_GRENAT |
637 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
638 RTE_PTYPE_INNER_L4_UDP,
639 /* [120] reserved */
640 [121] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
641 RTE_PTYPE_TUNNEL_GRENAT |
642 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
643 RTE_PTYPE_INNER_L4_TCP,
644 [122] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
645 RTE_PTYPE_TUNNEL_GRENAT |
646 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
647 RTE_PTYPE_INNER_L4_SCTP,
648 [123] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
649 RTE_PTYPE_TUNNEL_GRENAT |
650 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
651 RTE_PTYPE_INNER_L4_ICMP,
652
653 /* IPv6 --> GRE/Teredo/VXLAN --> MAC */
654 [124] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
655 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER,
656
657 /* IPv6 --> GRE/Teredo/VXLAN --> MAC --> IPv4 */
658 [125] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
659 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
660 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
661 RTE_PTYPE_INNER_L4_FRAG,
662 [126] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
663 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
664 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
665 RTE_PTYPE_INNER_L4_NONFRAG,
666 [127] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
667 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
668 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
669 RTE_PTYPE_INNER_L4_UDP,
670 /* [128] reserved */
671 [129] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
672 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
673 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
674 RTE_PTYPE_INNER_L4_TCP,
675 [130] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
676 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
677 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
678 RTE_PTYPE_INNER_L4_SCTP,
679 [131] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
680 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
681 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
682 RTE_PTYPE_INNER_L4_ICMP,
683
684 /* IPv6 --> GRE/Teredo/VXLAN --> MAC --> IPv6 */
685 [132] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
686 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
687 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
688 RTE_PTYPE_INNER_L4_FRAG,
689 [133] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
690 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
691 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
692 RTE_PTYPE_INNER_L4_NONFRAG,
693 [134] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
694 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
695 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
696 RTE_PTYPE_INNER_L4_UDP,
697 /* [135] reserved */
698 [136] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
699 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
700 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
701 RTE_PTYPE_INNER_L4_TCP,
702 [137] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
703 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
704 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
705 RTE_PTYPE_INNER_L4_SCTP,
706 [138] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
707 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
708 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
709 RTE_PTYPE_INNER_L4_ICMP,
710
711 /* IPv6 --> GRE/Teredo/VXLAN --> MAC/VLAN */
712 [139] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
713 RTE_PTYPE_TUNNEL_GRENAT |
714 RTE_PTYPE_INNER_L2_ETHER_VLAN,
715
716 /* IPv6 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv4 */
717 [140] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
718 RTE_PTYPE_TUNNEL_GRENAT |
719 RTE_PTYPE_INNER_L2_ETHER_VLAN |
720 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
721 RTE_PTYPE_INNER_L4_FRAG,
722 [141] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
723 RTE_PTYPE_TUNNEL_GRENAT |
724 RTE_PTYPE_INNER_L2_ETHER_VLAN |
725 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
726 RTE_PTYPE_INNER_L4_NONFRAG,
727 [142] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
728 RTE_PTYPE_TUNNEL_GRENAT |
729 RTE_PTYPE_INNER_L2_ETHER_VLAN |
730 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
731 RTE_PTYPE_INNER_L4_UDP,
732 /* [143] reserved */
733 [144] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
734 RTE_PTYPE_TUNNEL_GRENAT |
735 RTE_PTYPE_INNER_L2_ETHER_VLAN |
736 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
737 RTE_PTYPE_INNER_L4_TCP,
738 [145] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
739 RTE_PTYPE_TUNNEL_GRENAT |
740 RTE_PTYPE_INNER_L2_ETHER_VLAN |
741 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
742 RTE_PTYPE_INNER_L4_SCTP,
743 [146] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
744 RTE_PTYPE_TUNNEL_GRENAT |
745 RTE_PTYPE_INNER_L2_ETHER_VLAN |
746 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
747 RTE_PTYPE_INNER_L4_ICMP,
748
749 /* IPv6 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv6 */
750 [147] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
751 RTE_PTYPE_TUNNEL_GRENAT |
752 RTE_PTYPE_INNER_L2_ETHER_VLAN |
753 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
754 RTE_PTYPE_INNER_L4_FRAG,
755 [148] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
756 RTE_PTYPE_TUNNEL_GRENAT |
757 RTE_PTYPE_INNER_L2_ETHER_VLAN |
758 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
759 RTE_PTYPE_INNER_L4_NONFRAG,
760 [149] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
761 RTE_PTYPE_TUNNEL_GRENAT |
762 RTE_PTYPE_INNER_L2_ETHER_VLAN |
763 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
764 RTE_PTYPE_INNER_L4_UDP,
765 /* [150] reserved */
766 [151] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
767 RTE_PTYPE_TUNNEL_GRENAT |
768 RTE_PTYPE_INNER_L2_ETHER_VLAN |
769 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
770 RTE_PTYPE_INNER_L4_TCP,
771 [152] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
772 RTE_PTYPE_TUNNEL_GRENAT |
773 RTE_PTYPE_INNER_L2_ETHER_VLAN |
774 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
775 RTE_PTYPE_INNER_L4_SCTP,
776 [153] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
777 RTE_PTYPE_TUNNEL_GRENAT |
778 RTE_PTYPE_INNER_L2_ETHER_VLAN |
779 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
780 RTE_PTYPE_INNER_L4_ICMP,
781
782 /* L2 NSH packet type */
783 [154] = RTE_PTYPE_L2_ETHER_NSH,
784 [155] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
785 RTE_PTYPE_L4_FRAG,
786 [156] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
787 RTE_PTYPE_L4_NONFRAG,
788 [157] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
789 RTE_PTYPE_L4_UDP,
790 [158] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
791 RTE_PTYPE_L4_TCP,
792 [159] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
793 RTE_PTYPE_L4_SCTP,
794 [160] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
795 RTE_PTYPE_L4_ICMP,
796 [161] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
797 RTE_PTYPE_L4_FRAG,
798 [162] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
799 RTE_PTYPE_L4_NONFRAG,
800 [163] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
801 RTE_PTYPE_L4_UDP,
802 [164] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
803 RTE_PTYPE_L4_TCP,
804 [165] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
805 RTE_PTYPE_L4_SCTP,
806 [166] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
807 RTE_PTYPE_L4_ICMP,
808
809 /* All others reserved */
810 };
811
812 return type_table[ptype];
813 }
814
815 #endif /* _I40E_RXTX_H_ */
816