1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2015 Intel Corporation
3 */
4
5 #ifndef _I40E_RXTX_H_
6 #define _I40E_RXTX_H_
7
8 #define RTE_PMD_I40E_RX_MAX_BURST 32
9 #define RTE_PMD_I40E_TX_MAX_BURST 32
10
11 #define RTE_I40E_VPMD_RX_BURST 32
12 #define RTE_I40E_VPMD_TX_BURST 32
13 #define RTE_I40E_RXQ_REARM_THRESH 32
14 #define RTE_I40E_MAX_RX_BURST RTE_I40E_RXQ_REARM_THRESH
15 #define RTE_I40E_TX_MAX_FREE_BUF_SZ 64
16 #define RTE_I40E_DESCS_PER_LOOP 4
17
18 #define I40E_RXBUF_SZ_1024 1024
19 #define I40E_RXBUF_SZ_2048 2048
20
21 /* In none-PXE mode QLEN must be whole number of 32 descriptors. */
22 #define I40E_ALIGN_RING_DESC 32
23
24 #define I40E_MIN_RING_DESC 64
25 #define I40E_MAX_RING_DESC 4096
26
27 #define I40E_FDIR_NUM_TX_DESC (I40E_FDIR_PRG_PKT_CNT << 1)
28 #define I40E_FDIR_NUM_RX_DESC (I40E_FDIR_PRG_PKT_CNT << 1)
29
30 #define I40E_MIN_TSO_MSS 256
31 #define I40E_MAX_TSO_MSS 9674
32
33 #define I40E_TX_MAX_SEG UINT8_MAX
34 #define I40E_TX_MAX_MTU_SEG 8
35
36 #define I40E_TX_MIN_PKT_LEN 17
37
38 /* Shared FDIR masks between scalar / vector drivers */
39 #define I40E_RX_DESC_EXT_STATUS_FLEXBH_MASK 0x03
40 #define I40E_RX_DESC_EXT_STATUS_FLEXBH_FD_ID 0x01
41 #define I40E_RX_DESC_EXT_STATUS_FLEXBH_FLEX 0x02
42 #define I40E_RX_DESC_EXT_STATUS_FLEXBL_MASK 0x03
43 #define I40E_RX_DESC_EXT_STATUS_FLEXBL_FLEX 0x01
44
45 #undef container_of
46 #define container_of(ptr, type, member) ({ \
47 typeof(((type *)0)->member)(*__mptr) = (ptr); \
48 (type *)((char *)__mptr - offsetof(type, member)); })
49
50 #define I40E_TD_CMD (I40E_TX_DESC_CMD_ICRC |\
51 I40E_TX_DESC_CMD_EOP)
52
53 enum i40e_header_split_mode {
54 i40e_header_split_none = 0,
55 i40e_header_split_enabled = 1,
56 i40e_header_split_always = 2,
57 i40e_header_split_reserved
58 };
59
60 #define I40E_HEADER_SPLIT_NONE ((uint8_t)0)
61 #define I40E_HEADER_SPLIT_L2 ((uint8_t)(1 << 0))
62 #define I40E_HEADER_SPLIT_IP ((uint8_t)(1 << 1))
63 #define I40E_HEADER_SPLIT_UDP_TCP ((uint8_t)(1 << 2))
64 #define I40E_HEADER_SPLIT_SCTP ((uint8_t)(1 << 3))
65 #define I40E_HEADER_SPLIT_ALL (I40E_HEADER_SPLIT_L2 | \
66 I40E_HEADER_SPLIT_IP | \
67 I40E_HEADER_SPLIT_UDP_TCP | \
68 I40E_HEADER_SPLIT_SCTP)
69
70 /* HW desc structure, both 16-byte and 32-byte types are supported */
71 #ifdef RTE_LIBRTE_I40E_16BYTE_RX_DESC
72 #define i40e_rx_desc i40e_16byte_rx_desc
73 #else
74 #define i40e_rx_desc i40e_32byte_rx_desc
75 #endif
76
77 struct i40e_rx_entry {
78 struct rte_mbuf *mbuf;
79 };
80
81 /*
82 * Structure associated with each RX queue.
83 */
84 struct i40e_rx_queue {
85 struct rte_mempool *mp; /**< mbuf pool to populate RX ring */
86 volatile union i40e_rx_desc *rx_ring;/**< RX ring virtual address */
87 uint64_t rx_ring_phys_addr; /**< RX ring DMA address */
88 struct i40e_rx_entry *sw_ring; /**< address of RX soft ring */
89 uint16_t nb_rx_desc; /**< number of RX descriptors */
90 uint16_t rx_free_thresh; /**< max free RX desc to hold */
91 uint16_t rx_tail; /**< current value of tail */
92 uint16_t nb_rx_hold; /**< number of held free RX desc */
93 struct rte_mbuf *pkt_first_seg; /**< first segment of current packet */
94 struct rte_mbuf *pkt_last_seg; /**< last segment of current packet */
95 struct rte_mbuf fake_mbuf; /**< dummy mbuf */
96 #ifdef RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC
97 uint16_t rx_nb_avail; /**< number of staged packets ready */
98 uint16_t rx_next_avail; /**< index of next staged packets */
99 uint16_t rx_free_trigger; /**< triggers rx buffer allocation */
100 struct rte_mbuf *rx_stage[RTE_PMD_I40E_RX_MAX_BURST * 2];
101 #endif
102
103 uint16_t rxrearm_nb; /**< number of remaining to be re-armed */
104 uint16_t rxrearm_start; /**< the idx we start the re-arming from */
105 uint64_t mbuf_initializer; /**< value to init mbufs */
106
107 uint16_t port_id; /**< device port ID */
108 uint8_t crc_len; /**< 0 if CRC stripped, 4 otherwise */
109 uint8_t fdir_enabled; /**< 0 if FDIR disabled, 1 when enabled */
110 uint16_t queue_id; /**< RX queue index */
111 uint16_t reg_idx; /**< RX queue register index */
112 uint8_t drop_en; /**< if not 0, set register bit */
113 volatile uint8_t *qrx_tail; /**< register address of tail */
114 struct i40e_vsi *vsi; /**< the VSI this queue belongs to */
115 uint16_t rx_buf_len; /* The packet buffer size */
116 uint16_t rx_hdr_len; /* The header buffer size */
117 uint16_t max_pkt_len; /* Maximum packet length */
118 uint8_t hs_mode; /* Header Split mode */
119 bool q_set; /**< indicate if rx queue has been configured */
120 bool rx_deferred_start; /**< don't start this queue in dev start */
121 uint16_t rx_using_sse; /**<flag indicate the usage of vPMD for rx */
122 uint8_t dcb_tc; /**< Traffic class of rx queue */
123 uint64_t offloads; /**< Rx offload flags of RTE_ETH_RX_OFFLOAD_* */
124 const struct rte_memzone *mz;
125 };
126
127 struct i40e_tx_entry {
128 struct rte_mbuf *mbuf;
129 uint16_t next_id;
130 uint16_t last_id;
131 };
132
133 struct i40e_vec_tx_entry {
134 struct rte_mbuf *mbuf;
135 };
136
137 /*
138 * Structure associated with each TX queue.
139 */
140 struct i40e_tx_queue {
141 uint16_t nb_tx_desc; /**< number of TX descriptors */
142 uint64_t tx_ring_phys_addr; /**< TX ring DMA address */
143 volatile struct i40e_tx_desc *tx_ring; /**< TX ring virtual address */
144 struct i40e_tx_entry *sw_ring; /**< virtual address of SW ring */
145 uint16_t tx_tail; /**< current value of tail register */
146 volatile uint8_t *qtx_tail; /**< register address of tail */
147 uint16_t nb_tx_used; /**< number of TX desc used since RS bit set */
148 /**< index to last TX descriptor to have been cleaned */
149 uint16_t last_desc_cleaned;
150 /**< Total number of TX descriptors ready to be allocated. */
151 uint16_t nb_tx_free;
152 /**< Start freeing TX buffers if there are less free descriptors than
153 this value. */
154 uint16_t tx_free_thresh;
155 /** Number of TX descriptors to use before RS bit is set. */
156 uint16_t tx_rs_thresh;
157 uint8_t pthresh; /**< Prefetch threshold register. */
158 uint8_t hthresh; /**< Host threshold register. */
159 uint8_t wthresh; /**< Write-back threshold reg. */
160 uint16_t port_id; /**< Device port identifier. */
161 uint16_t queue_id; /**< TX queue index. */
162 uint16_t reg_idx;
163 struct i40e_vsi *vsi; /**< the VSI this queue belongs to */
164 uint16_t tx_next_dd;
165 uint16_t tx_next_rs;
166 bool q_set; /**< indicate if tx queue has been configured */
167 bool tx_deferred_start; /**< don't start this queue in dev start */
168 uint8_t dcb_tc; /**< Traffic class of tx queue */
169 uint64_t offloads; /**< Tx offload flags of RTE_ETH_RX_OFFLOAD_* */
170 const struct rte_memzone *mz;
171 };
172
173 /** Offload features */
174 union i40e_tx_offload {
175 uint64_t data;
176 struct {
177 uint64_t l2_len:7; /**< L2 (MAC) Header Length. */
178 uint64_t l3_len:9; /**< L3 (IP) Header Length. */
179 uint64_t l4_len:8; /**< L4 Header Length. */
180 uint64_t tso_segsz:16; /**< TCP TSO segment size */
181 uint64_t outer_l2_len:8; /**< outer L2 Header Length */
182 uint64_t outer_l3_len:16; /**< outer L3 Header Length */
183 };
184 };
185
186 int i40e_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
187 int i40e_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
188 int i40e_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
189 int i40e_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
190 const uint32_t *i40e_dev_supported_ptypes_get(struct rte_eth_dev *dev);
191 int i40e_dev_rx_queue_setup(struct rte_eth_dev *dev,
192 uint16_t queue_idx,
193 uint16_t nb_desc,
194 unsigned int socket_id,
195 const struct rte_eth_rxconf *rx_conf,
196 struct rte_mempool *mp);
197 int i40e_dev_tx_queue_setup(struct rte_eth_dev *dev,
198 uint16_t queue_idx,
199 uint16_t nb_desc,
200 unsigned int socket_id,
201 const struct rte_eth_txconf *tx_conf);
202 void i40e_rx_queue_release(void *rxq);
203 void i40e_tx_queue_release(void *txq);
204 void i40e_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid);
205 void i40e_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid);
206 uint16_t i40e_recv_pkts(void *rx_queue,
207 struct rte_mbuf **rx_pkts,
208 uint16_t nb_pkts);
209 uint16_t i40e_recv_scattered_pkts(void *rx_queue,
210 struct rte_mbuf **rx_pkts,
211 uint16_t nb_pkts);
212 uint16_t i40e_xmit_pkts(void *tx_queue,
213 struct rte_mbuf **tx_pkts,
214 uint16_t nb_pkts);
215 uint16_t i40e_simple_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
216 uint16_t nb_pkts);
217 uint16_t i40e_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
218 uint16_t nb_pkts);
219 int i40e_tx_queue_init(struct i40e_tx_queue *txq);
220 int i40e_rx_queue_init(struct i40e_rx_queue *rxq);
221 void i40e_free_tx_resources(struct i40e_tx_queue *txq);
222 void i40e_free_rx_resources(struct i40e_rx_queue *rxq);
223 void i40e_dev_clear_queues(struct rte_eth_dev *dev);
224 void i40e_dev_free_queues(struct rte_eth_dev *dev);
225 void i40e_reset_rx_queue(struct i40e_rx_queue *rxq);
226 void i40e_reset_tx_queue(struct i40e_tx_queue *txq);
227 void i40e_tx_queue_release_mbufs(struct i40e_tx_queue *txq);
228 int i40e_tx_done_cleanup(void *txq, uint32_t free_cnt);
229 int i40e_alloc_rx_queue_mbufs(struct i40e_rx_queue *rxq);
230 void i40e_rx_queue_release_mbufs(struct i40e_rx_queue *rxq);
231
232 uint32_t i40e_dev_rx_queue_count(void *rx_queue);
233 int i40e_dev_rx_descriptor_status(void *rx_queue, uint16_t offset);
234 int i40e_dev_tx_descriptor_status(void *tx_queue, uint16_t offset);
235
236 uint16_t i40e_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
237 uint16_t nb_pkts);
238 uint16_t i40e_recv_scattered_pkts_vec(void *rx_queue,
239 struct rte_mbuf **rx_pkts,
240 uint16_t nb_pkts);
241 int i40e_rx_vec_dev_conf_condition_check(struct rte_eth_dev *dev);
242 int i40e_rxq_vec_setup(struct i40e_rx_queue *rxq);
243 int i40e_txq_vec_setup(struct i40e_tx_queue *txq);
244 void i40e_rx_queue_release_mbufs_vec(struct i40e_rx_queue *rxq);
245 uint16_t i40e_xmit_fixed_burst_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
246 uint16_t nb_pkts);
247 void i40e_set_rx_function(struct rte_eth_dev *dev);
248 void i40e_set_tx_function_flag(struct rte_eth_dev *dev,
249 struct i40e_tx_queue *txq);
250 void i40e_set_tx_function(struct rte_eth_dev *dev);
251 void i40e_set_default_ptype_table(struct rte_eth_dev *dev);
252 void i40e_set_default_pctype_table(struct rte_eth_dev *dev);
253 uint16_t i40e_recv_pkts_vec_avx2(void *rx_queue, struct rte_mbuf **rx_pkts,
254 uint16_t nb_pkts);
255 uint16_t i40e_recv_scattered_pkts_vec_avx2(void *rx_queue,
256 struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
257 uint16_t i40e_xmit_pkts_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
258 uint16_t nb_pkts);
259 int i40e_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc);
260 uint16_t i40e_recv_pkts_vec_avx512(void *rx_queue,
261 struct rte_mbuf **rx_pkts,
262 uint16_t nb_pkts);
263 uint16_t i40e_recv_scattered_pkts_vec_avx512(void *rx_queue,
264 struct rte_mbuf **rx_pkts,
265 uint16_t nb_pkts);
266 uint16_t i40e_xmit_pkts_vec_avx512(void *tx_queue,
267 struct rte_mbuf **tx_pkts,
268 uint16_t nb_pkts);
269
270 /* For each value it means, datasheet of hardware can tell more details
271 *
272 * @note: fix i40e_dev_supported_ptypes_get() if any change here.
273 */
274 static inline uint32_t
i40e_get_default_pkt_type(uint8_t ptype)275 i40e_get_default_pkt_type(uint8_t ptype)
276 {
277 static const uint32_t type_table[UINT8_MAX + 1] __rte_cache_aligned = {
278 /* L2 types */
279 /* [0] reserved */
280 [1] = RTE_PTYPE_L2_ETHER,
281 [2] = RTE_PTYPE_L2_ETHER_TIMESYNC,
282 /* [3] - [5] reserved */
283 [6] = RTE_PTYPE_L2_ETHER_LLDP,
284 /* [7] - [10] reserved */
285 [11] = RTE_PTYPE_L2_ETHER_ARP,
286 /* [12] - [21] reserved */
287
288 /* Non tunneled IPv4 */
289 [22] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
290 RTE_PTYPE_L4_FRAG,
291 [23] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
292 RTE_PTYPE_L4_NONFRAG,
293 [24] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
294 RTE_PTYPE_L4_UDP,
295 /* [25] reserved */
296 [26] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
297 RTE_PTYPE_L4_TCP,
298 [27] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
299 RTE_PTYPE_L4_SCTP,
300 [28] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
301 RTE_PTYPE_L4_ICMP,
302
303 /* IPv4 --> IPv4 */
304 [29] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
305 RTE_PTYPE_TUNNEL_IP |
306 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
307 RTE_PTYPE_INNER_L4_FRAG,
308 [30] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
309 RTE_PTYPE_TUNNEL_IP |
310 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
311 RTE_PTYPE_INNER_L4_NONFRAG,
312 [31] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
313 RTE_PTYPE_TUNNEL_IP |
314 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
315 RTE_PTYPE_INNER_L4_UDP,
316 /* [32] reserved */
317 [33] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
318 RTE_PTYPE_TUNNEL_IP |
319 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
320 RTE_PTYPE_INNER_L4_TCP,
321 [34] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
322 RTE_PTYPE_TUNNEL_IP |
323 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
324 RTE_PTYPE_INNER_L4_SCTP,
325 [35] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
326 RTE_PTYPE_TUNNEL_IP |
327 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
328 RTE_PTYPE_INNER_L4_ICMP,
329
330 /* IPv4 --> IPv6 */
331 [36] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
332 RTE_PTYPE_TUNNEL_IP |
333 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
334 RTE_PTYPE_INNER_L4_FRAG,
335 [37] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
336 RTE_PTYPE_TUNNEL_IP |
337 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
338 RTE_PTYPE_INNER_L4_NONFRAG,
339 [38] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
340 RTE_PTYPE_TUNNEL_IP |
341 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
342 RTE_PTYPE_INNER_L4_UDP,
343 /* [39] reserved */
344 [40] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
345 RTE_PTYPE_TUNNEL_IP |
346 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
347 RTE_PTYPE_INNER_L4_TCP,
348 [41] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
349 RTE_PTYPE_TUNNEL_IP |
350 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
351 RTE_PTYPE_INNER_L4_SCTP,
352 [42] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
353 RTE_PTYPE_TUNNEL_IP |
354 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
355 RTE_PTYPE_INNER_L4_ICMP,
356
357 /* IPv4 --> GRE/Teredo/VXLAN */
358 [43] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
359 RTE_PTYPE_TUNNEL_GRENAT,
360
361 /* IPv4 --> GRE/Teredo/VXLAN --> IPv4 */
362 [44] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
363 RTE_PTYPE_TUNNEL_GRENAT |
364 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
365 RTE_PTYPE_INNER_L4_FRAG,
366 [45] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
367 RTE_PTYPE_TUNNEL_GRENAT |
368 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
369 RTE_PTYPE_INNER_L4_NONFRAG,
370 [46] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
371 RTE_PTYPE_TUNNEL_GRENAT |
372 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
373 RTE_PTYPE_INNER_L4_UDP,
374 /* [47] reserved */
375 [48] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
376 RTE_PTYPE_TUNNEL_GRENAT |
377 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
378 RTE_PTYPE_INNER_L4_TCP,
379 [49] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
380 RTE_PTYPE_TUNNEL_GRENAT |
381 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
382 RTE_PTYPE_INNER_L4_SCTP,
383 [50] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
384 RTE_PTYPE_TUNNEL_GRENAT |
385 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
386 RTE_PTYPE_INNER_L4_ICMP,
387
388 /* IPv4 --> GRE/Teredo/VXLAN --> IPv6 */
389 [51] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
390 RTE_PTYPE_TUNNEL_GRENAT |
391 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
392 RTE_PTYPE_INNER_L4_FRAG,
393 [52] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
394 RTE_PTYPE_TUNNEL_GRENAT |
395 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
396 RTE_PTYPE_INNER_L4_NONFRAG,
397 [53] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
398 RTE_PTYPE_TUNNEL_GRENAT |
399 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
400 RTE_PTYPE_INNER_L4_UDP,
401 /* [54] reserved */
402 [55] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
403 RTE_PTYPE_TUNNEL_GRENAT |
404 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
405 RTE_PTYPE_INNER_L4_TCP,
406 [56] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
407 RTE_PTYPE_TUNNEL_GRENAT |
408 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
409 RTE_PTYPE_INNER_L4_SCTP,
410 [57] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
411 RTE_PTYPE_TUNNEL_GRENAT |
412 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
413 RTE_PTYPE_INNER_L4_ICMP,
414
415 /* IPv4 --> GRE/Teredo/VXLAN --> MAC */
416 [58] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
417 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER,
418
419 /* IPv4 --> GRE/Teredo/VXLAN --> MAC --> IPv4 */
420 [59] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
421 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
422 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
423 RTE_PTYPE_INNER_L4_FRAG,
424 [60] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
425 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
426 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
427 RTE_PTYPE_INNER_L4_NONFRAG,
428 [61] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
429 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
430 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
431 RTE_PTYPE_INNER_L4_UDP,
432 /* [62] reserved */
433 [63] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
434 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
435 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
436 RTE_PTYPE_INNER_L4_TCP,
437 [64] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
438 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
439 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
440 RTE_PTYPE_INNER_L4_SCTP,
441 [65] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
442 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
443 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
444 RTE_PTYPE_INNER_L4_ICMP,
445
446 /* IPv4 --> GRE/Teredo/VXLAN --> MAC --> IPv6 */
447 [66] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
448 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
449 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
450 RTE_PTYPE_INNER_L4_FRAG,
451 [67] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
452 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
453 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
454 RTE_PTYPE_INNER_L4_NONFRAG,
455 [68] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
456 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
457 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
458 RTE_PTYPE_INNER_L4_UDP,
459 /* [69] reserved */
460 [70] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
461 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
462 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
463 RTE_PTYPE_INNER_L4_TCP,
464 [71] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
465 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
466 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
467 RTE_PTYPE_INNER_L4_SCTP,
468 [72] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
469 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
470 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
471 RTE_PTYPE_INNER_L4_ICMP,
472
473 /* IPv4 --> GRE/Teredo/VXLAN --> MAC/VLAN */
474 [73] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
475 RTE_PTYPE_TUNNEL_GRENAT |
476 RTE_PTYPE_INNER_L2_ETHER_VLAN,
477
478 /* IPv4 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv4 */
479 [74] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
480 RTE_PTYPE_TUNNEL_GRENAT |
481 RTE_PTYPE_INNER_L2_ETHER_VLAN |
482 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
483 RTE_PTYPE_INNER_L4_FRAG,
484 [75] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
485 RTE_PTYPE_TUNNEL_GRENAT |
486 RTE_PTYPE_INNER_L2_ETHER_VLAN |
487 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
488 RTE_PTYPE_INNER_L4_NONFRAG,
489 [76] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
490 RTE_PTYPE_TUNNEL_GRENAT |
491 RTE_PTYPE_INNER_L2_ETHER_VLAN |
492 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
493 RTE_PTYPE_INNER_L4_UDP,
494 /* [77] reserved */
495 [78] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
496 RTE_PTYPE_TUNNEL_GRENAT |
497 RTE_PTYPE_INNER_L2_ETHER_VLAN |
498 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
499 RTE_PTYPE_INNER_L4_TCP,
500 [79] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
501 RTE_PTYPE_TUNNEL_GRENAT |
502 RTE_PTYPE_INNER_L2_ETHER_VLAN |
503 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
504 RTE_PTYPE_INNER_L4_SCTP,
505 [80] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
506 RTE_PTYPE_TUNNEL_GRENAT |
507 RTE_PTYPE_INNER_L2_ETHER_VLAN |
508 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
509 RTE_PTYPE_INNER_L4_ICMP,
510
511 /* IPv4 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv6 */
512 [81] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
513 RTE_PTYPE_TUNNEL_GRENAT |
514 RTE_PTYPE_INNER_L2_ETHER_VLAN |
515 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
516 RTE_PTYPE_INNER_L4_FRAG,
517 [82] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
518 RTE_PTYPE_TUNNEL_GRENAT |
519 RTE_PTYPE_INNER_L2_ETHER_VLAN |
520 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
521 RTE_PTYPE_INNER_L4_NONFRAG,
522 [83] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
523 RTE_PTYPE_TUNNEL_GRENAT |
524 RTE_PTYPE_INNER_L2_ETHER_VLAN |
525 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
526 RTE_PTYPE_INNER_L4_UDP,
527 /* [84] reserved */
528 [85] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
529 RTE_PTYPE_TUNNEL_GRENAT |
530 RTE_PTYPE_INNER_L2_ETHER_VLAN |
531 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
532 RTE_PTYPE_INNER_L4_TCP,
533 [86] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
534 RTE_PTYPE_TUNNEL_GRENAT |
535 RTE_PTYPE_INNER_L2_ETHER_VLAN |
536 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
537 RTE_PTYPE_INNER_L4_SCTP,
538 [87] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
539 RTE_PTYPE_TUNNEL_GRENAT |
540 RTE_PTYPE_INNER_L2_ETHER_VLAN |
541 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
542 RTE_PTYPE_INNER_L4_ICMP,
543
544 /* Non tunneled IPv6 */
545 [88] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
546 RTE_PTYPE_L4_FRAG,
547 [89] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
548 RTE_PTYPE_L4_NONFRAG,
549 [90] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
550 RTE_PTYPE_L4_UDP,
551 /* [91] reserved */
552 [92] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
553 RTE_PTYPE_L4_TCP,
554 [93] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
555 RTE_PTYPE_L4_SCTP,
556 [94] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
557 RTE_PTYPE_L4_ICMP,
558
559 /* IPv6 --> IPv4 */
560 [95] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
561 RTE_PTYPE_TUNNEL_IP |
562 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
563 RTE_PTYPE_INNER_L4_FRAG,
564 [96] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
565 RTE_PTYPE_TUNNEL_IP |
566 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
567 RTE_PTYPE_INNER_L4_NONFRAG,
568 [97] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
569 RTE_PTYPE_TUNNEL_IP |
570 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
571 RTE_PTYPE_INNER_L4_UDP,
572 /* [98] reserved */
573 [99] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
574 RTE_PTYPE_TUNNEL_IP |
575 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
576 RTE_PTYPE_INNER_L4_TCP,
577 [100] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
578 RTE_PTYPE_TUNNEL_IP |
579 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
580 RTE_PTYPE_INNER_L4_SCTP,
581 [101] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
582 RTE_PTYPE_TUNNEL_IP |
583 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
584 RTE_PTYPE_INNER_L4_ICMP,
585
586 /* IPv6 --> IPv6 */
587 [102] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
588 RTE_PTYPE_TUNNEL_IP |
589 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
590 RTE_PTYPE_INNER_L4_FRAG,
591 [103] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
592 RTE_PTYPE_TUNNEL_IP |
593 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
594 RTE_PTYPE_INNER_L4_NONFRAG,
595 [104] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
596 RTE_PTYPE_TUNNEL_IP |
597 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
598 RTE_PTYPE_INNER_L4_UDP,
599 /* [105] reserved */
600 [106] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
601 RTE_PTYPE_TUNNEL_IP |
602 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
603 RTE_PTYPE_INNER_L4_TCP,
604 [107] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
605 RTE_PTYPE_TUNNEL_IP |
606 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
607 RTE_PTYPE_INNER_L4_SCTP,
608 [108] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
609 RTE_PTYPE_TUNNEL_IP |
610 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
611 RTE_PTYPE_INNER_L4_ICMP,
612
613 /* IPv6 --> GRE/Teredo/VXLAN */
614 [109] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
615 RTE_PTYPE_TUNNEL_GRENAT,
616
617 /* IPv6 --> GRE/Teredo/VXLAN --> IPv4 */
618 [110] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
619 RTE_PTYPE_TUNNEL_GRENAT |
620 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
621 RTE_PTYPE_INNER_L4_FRAG,
622 [111] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
623 RTE_PTYPE_TUNNEL_GRENAT |
624 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
625 RTE_PTYPE_INNER_L4_NONFRAG,
626 [112] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
627 RTE_PTYPE_TUNNEL_GRENAT |
628 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
629 RTE_PTYPE_INNER_L4_UDP,
630 /* [113] reserved */
631 [114] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
632 RTE_PTYPE_TUNNEL_GRENAT |
633 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
634 RTE_PTYPE_INNER_L4_TCP,
635 [115] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
636 RTE_PTYPE_TUNNEL_GRENAT |
637 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
638 RTE_PTYPE_INNER_L4_SCTP,
639 [116] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
640 RTE_PTYPE_TUNNEL_GRENAT |
641 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
642 RTE_PTYPE_INNER_L4_ICMP,
643
644 /* IPv6 --> GRE/Teredo/VXLAN --> IPv6 */
645 [117] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
646 RTE_PTYPE_TUNNEL_GRENAT |
647 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
648 RTE_PTYPE_INNER_L4_FRAG,
649 [118] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
650 RTE_PTYPE_TUNNEL_GRENAT |
651 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
652 RTE_PTYPE_INNER_L4_NONFRAG,
653 [119] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
654 RTE_PTYPE_TUNNEL_GRENAT |
655 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
656 RTE_PTYPE_INNER_L4_UDP,
657 /* [120] reserved */
658 [121] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
659 RTE_PTYPE_TUNNEL_GRENAT |
660 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
661 RTE_PTYPE_INNER_L4_TCP,
662 [122] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
663 RTE_PTYPE_TUNNEL_GRENAT |
664 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
665 RTE_PTYPE_INNER_L4_SCTP,
666 [123] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
667 RTE_PTYPE_TUNNEL_GRENAT |
668 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
669 RTE_PTYPE_INNER_L4_ICMP,
670
671 /* IPv6 --> GRE/Teredo/VXLAN --> MAC */
672 [124] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
673 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER,
674
675 /* IPv6 --> GRE/Teredo/VXLAN --> MAC --> IPv4 */
676 [125] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
677 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
678 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
679 RTE_PTYPE_INNER_L4_FRAG,
680 [126] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
681 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
682 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
683 RTE_PTYPE_INNER_L4_NONFRAG,
684 [127] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
685 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
686 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
687 RTE_PTYPE_INNER_L4_UDP,
688 /* [128] reserved */
689 [129] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
690 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
691 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
692 RTE_PTYPE_INNER_L4_TCP,
693 [130] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
694 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
695 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
696 RTE_PTYPE_INNER_L4_SCTP,
697 [131] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
698 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
699 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
700 RTE_PTYPE_INNER_L4_ICMP,
701
702 /* IPv6 --> GRE/Teredo/VXLAN --> MAC --> IPv6 */
703 [132] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
704 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
705 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
706 RTE_PTYPE_INNER_L4_FRAG,
707 [133] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
708 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
709 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
710 RTE_PTYPE_INNER_L4_NONFRAG,
711 [134] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
712 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
713 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
714 RTE_PTYPE_INNER_L4_UDP,
715 /* [135] reserved */
716 [136] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
717 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
718 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
719 RTE_PTYPE_INNER_L4_TCP,
720 [137] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
721 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
722 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
723 RTE_PTYPE_INNER_L4_SCTP,
724 [138] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
725 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
726 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
727 RTE_PTYPE_INNER_L4_ICMP,
728
729 /* IPv6 --> GRE/Teredo/VXLAN --> MAC/VLAN */
730 [139] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
731 RTE_PTYPE_TUNNEL_GRENAT |
732 RTE_PTYPE_INNER_L2_ETHER_VLAN,
733
734 /* IPv6 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv4 */
735 [140] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
736 RTE_PTYPE_TUNNEL_GRENAT |
737 RTE_PTYPE_INNER_L2_ETHER_VLAN |
738 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
739 RTE_PTYPE_INNER_L4_FRAG,
740 [141] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
741 RTE_PTYPE_TUNNEL_GRENAT |
742 RTE_PTYPE_INNER_L2_ETHER_VLAN |
743 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
744 RTE_PTYPE_INNER_L4_NONFRAG,
745 [142] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
746 RTE_PTYPE_TUNNEL_GRENAT |
747 RTE_PTYPE_INNER_L2_ETHER_VLAN |
748 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
749 RTE_PTYPE_INNER_L4_UDP,
750 /* [143] reserved */
751 [144] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
752 RTE_PTYPE_TUNNEL_GRENAT |
753 RTE_PTYPE_INNER_L2_ETHER_VLAN |
754 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
755 RTE_PTYPE_INNER_L4_TCP,
756 [145] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
757 RTE_PTYPE_TUNNEL_GRENAT |
758 RTE_PTYPE_INNER_L2_ETHER_VLAN |
759 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
760 RTE_PTYPE_INNER_L4_SCTP,
761 [146] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
762 RTE_PTYPE_TUNNEL_GRENAT |
763 RTE_PTYPE_INNER_L2_ETHER_VLAN |
764 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
765 RTE_PTYPE_INNER_L4_ICMP,
766
767 /* IPv6 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv6 */
768 [147] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
769 RTE_PTYPE_TUNNEL_GRENAT |
770 RTE_PTYPE_INNER_L2_ETHER_VLAN |
771 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
772 RTE_PTYPE_INNER_L4_FRAG,
773 [148] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
774 RTE_PTYPE_TUNNEL_GRENAT |
775 RTE_PTYPE_INNER_L2_ETHER_VLAN |
776 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
777 RTE_PTYPE_INNER_L4_NONFRAG,
778 [149] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
779 RTE_PTYPE_TUNNEL_GRENAT |
780 RTE_PTYPE_INNER_L2_ETHER_VLAN |
781 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
782 RTE_PTYPE_INNER_L4_UDP,
783 /* [150] reserved */
784 [151] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
785 RTE_PTYPE_TUNNEL_GRENAT |
786 RTE_PTYPE_INNER_L2_ETHER_VLAN |
787 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
788 RTE_PTYPE_INNER_L4_TCP,
789 [152] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
790 RTE_PTYPE_TUNNEL_GRENAT |
791 RTE_PTYPE_INNER_L2_ETHER_VLAN |
792 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
793 RTE_PTYPE_INNER_L4_SCTP,
794 [153] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
795 RTE_PTYPE_TUNNEL_GRENAT |
796 RTE_PTYPE_INNER_L2_ETHER_VLAN |
797 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
798 RTE_PTYPE_INNER_L4_ICMP,
799
800 /* L2 NSH packet type */
801 [154] = RTE_PTYPE_L2_ETHER_NSH,
802 [155] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
803 RTE_PTYPE_L4_FRAG,
804 [156] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
805 RTE_PTYPE_L4_NONFRAG,
806 [157] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
807 RTE_PTYPE_L4_UDP,
808 [158] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
809 RTE_PTYPE_L4_TCP,
810 [159] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
811 RTE_PTYPE_L4_SCTP,
812 [160] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
813 RTE_PTYPE_L4_ICMP,
814 [161] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
815 RTE_PTYPE_L4_FRAG,
816 [162] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
817 RTE_PTYPE_L4_NONFRAG,
818 [163] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
819 RTE_PTYPE_L4_UDP,
820 [164] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
821 RTE_PTYPE_L4_TCP,
822 [165] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
823 RTE_PTYPE_L4_SCTP,
824 [166] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
825 RTE_PTYPE_L4_ICMP,
826
827 /* All others reserved */
828 };
829
830 return type_table[ptype];
831 }
832
833 #endif /* _I40E_RXTX_H_ */
834