1 //===--- RISCV.cpp - RISCV Helpers for Tools --------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "RISCV.h"
10 #include "../Clang.h"
11 #include "ToolChains/CommonArgs.h"
12 #include "clang/Basic/CharInfo.h"
13 #include "clang/Driver/Driver.h"
14 #include "clang/Driver/DriverDiagnostic.h"
15 #include "clang/Driver/Options.h"
16 #include "llvm/ADT/Optional.h"
17 #include "llvm/Option/ArgList.h"
18 #include "llvm/Support/Error.h"
19 #include "llvm/Support/RISCVISAInfo.h"
20 #include "llvm/Support/TargetParser.h"
21 #include "llvm/Support/raw_ostream.h"
22 
23 using namespace clang::driver;
24 using namespace clang::driver::tools;
25 using namespace clang;
26 using namespace llvm::opt;
27 
28 // Returns false if an error is diagnosed.
getArchFeatures(const Driver & D,StringRef Arch,std::vector<StringRef> & Features,const ArgList & Args)29 static bool getArchFeatures(const Driver &D, StringRef Arch,
30                             std::vector<StringRef> &Features,
31                             const ArgList &Args) {
32   bool EnableExperimentalExtensions =
33       Args.hasArg(options::OPT_menable_experimental_extensions);
34   auto ISAInfo =
35       llvm::RISCVISAInfo::parseArchString(Arch, EnableExperimentalExtensions);
36   if (!ISAInfo) {
37     handleAllErrors(ISAInfo.takeError(), [&](llvm::StringError &ErrMsg) {
38       D.Diag(diag::err_drv_invalid_riscv_arch_name)
39           << Arch << ErrMsg.getMessage();
40     });
41 
42     return false;
43   }
44 
45   (*ISAInfo)->toFeatures(
46       Features, [&Args](const Twine &Str) { return Args.MakeArgString(Str); });
47   return true;
48 }
49 
50 // Get features except standard extension feature
getRISCFeaturesFromMcpu(const Driver & D,const llvm::Triple & Triple,const llvm::opt::ArgList & Args,const llvm::opt::Arg * A,StringRef Mcpu,std::vector<StringRef> & Features)51 static void getRISCFeaturesFromMcpu(const Driver &D, const llvm::Triple &Triple,
52                                     const llvm::opt::ArgList &Args,
53                                     const llvm::opt::Arg *A, StringRef Mcpu,
54                                     std::vector<StringRef> &Features) {
55   bool Is64Bit = (Triple.getArch() == llvm::Triple::riscv64);
56   llvm::RISCV::CPUKind CPUKind = llvm::RISCV::parseCPUKind(Mcpu);
57   if (!llvm::RISCV::checkCPUKind(CPUKind, Is64Bit) ||
58       !llvm::RISCV::getCPUFeaturesExceptStdExt(CPUKind, Features)) {
59     D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
60   }
61 }
62 
getRISCVTargetFeatures(const Driver & D,const llvm::Triple & Triple,const ArgList & Args,std::vector<StringRef> & Features)63 void riscv::getRISCVTargetFeatures(const Driver &D, const llvm::Triple &Triple,
64                                    const ArgList &Args,
65                                    std::vector<StringRef> &Features) {
66   StringRef MArch = getRISCVArch(Args, Triple);
67 
68   if (!getArchFeatures(D, MArch, Features, Args))
69     return;
70 
71   // If users give march and mcpu, get std extension feature from MArch
72   // and other features (ex. mirco architecture feature) from mcpu
73   if (Arg *A = Args.getLastArg(options::OPT_mcpu_EQ))
74     getRISCFeaturesFromMcpu(D, Triple, Args, A, A->getValue(), Features);
75 
76   // Handle features corresponding to "-ffixed-X" options
77   if (Args.hasArg(options::OPT_ffixed_x1))
78     Features.push_back("+reserve-x1");
79   if (Args.hasArg(options::OPT_ffixed_x2))
80     Features.push_back("+reserve-x2");
81   if (Args.hasArg(options::OPT_ffixed_x3))
82     Features.push_back("+reserve-x3");
83   if (Args.hasArg(options::OPT_ffixed_x4))
84     Features.push_back("+reserve-x4");
85   if (Args.hasArg(options::OPT_ffixed_x5))
86     Features.push_back("+reserve-x5");
87   if (Args.hasArg(options::OPT_ffixed_x6))
88     Features.push_back("+reserve-x6");
89   if (Args.hasArg(options::OPT_ffixed_x7))
90     Features.push_back("+reserve-x7");
91   if (Args.hasArg(options::OPT_ffixed_x8))
92     Features.push_back("+reserve-x8");
93   if (Args.hasArg(options::OPT_ffixed_x9))
94     Features.push_back("+reserve-x9");
95   if (Args.hasArg(options::OPT_ffixed_x10))
96     Features.push_back("+reserve-x10");
97   if (Args.hasArg(options::OPT_ffixed_x11))
98     Features.push_back("+reserve-x11");
99   if (Args.hasArg(options::OPT_ffixed_x12))
100     Features.push_back("+reserve-x12");
101   if (Args.hasArg(options::OPT_ffixed_x13))
102     Features.push_back("+reserve-x13");
103   if (Args.hasArg(options::OPT_ffixed_x14))
104     Features.push_back("+reserve-x14");
105   if (Args.hasArg(options::OPT_ffixed_x15))
106     Features.push_back("+reserve-x15");
107   if (Args.hasArg(options::OPT_ffixed_x16))
108     Features.push_back("+reserve-x16");
109   if (Args.hasArg(options::OPT_ffixed_x17))
110     Features.push_back("+reserve-x17");
111   if (Args.hasArg(options::OPT_ffixed_x18))
112     Features.push_back("+reserve-x18");
113   if (Args.hasArg(options::OPT_ffixed_x19))
114     Features.push_back("+reserve-x19");
115   if (Args.hasArg(options::OPT_ffixed_x20))
116     Features.push_back("+reserve-x20");
117   if (Args.hasArg(options::OPT_ffixed_x21))
118     Features.push_back("+reserve-x21");
119   if (Args.hasArg(options::OPT_ffixed_x22))
120     Features.push_back("+reserve-x22");
121   if (Args.hasArg(options::OPT_ffixed_x23))
122     Features.push_back("+reserve-x23");
123   if (Args.hasArg(options::OPT_ffixed_x24))
124     Features.push_back("+reserve-x24");
125   if (Args.hasArg(options::OPT_ffixed_x25))
126     Features.push_back("+reserve-x25");
127   if (Args.hasArg(options::OPT_ffixed_x26))
128     Features.push_back("+reserve-x26");
129   if (Args.hasArg(options::OPT_ffixed_x27))
130     Features.push_back("+reserve-x27");
131   if (Args.hasArg(options::OPT_ffixed_x28))
132     Features.push_back("+reserve-x28");
133   if (Args.hasArg(options::OPT_ffixed_x29))
134     Features.push_back("+reserve-x29");
135   if (Args.hasArg(options::OPT_ffixed_x30))
136     Features.push_back("+reserve-x30");
137   if (Args.hasArg(options::OPT_ffixed_x31))
138     Features.push_back("+reserve-x31");
139 
140   // -mrelax is default, unless -mno-relax is specified.
141   if (Args.hasFlag(options::OPT_mrelax, options::OPT_mno_relax, true)) {
142     Features.push_back("+relax");
143     // -gsplit-dwarf -mrelax requires DW_AT_high_pc/DW_AT_ranges/... indexing
144     // into .debug_addr, which is currently not implemented.
145     Arg *A;
146     if (getDebugFissionKind(D, Args, A) != DwarfFissionKind::None)
147       D.Diag(clang::diag::err_drv_riscv_unsupported_with_linker_relaxation)
148           << A->getAsString(Args);
149   } else {
150     Features.push_back("-relax");
151   }
152 
153   // GCC Compatibility: -mno-save-restore is default, unless -msave-restore is
154   // specified.
155   if (Args.hasFlag(options::OPT_msave_restore, options::OPT_mno_save_restore, false))
156     Features.push_back("+save-restore");
157   else
158     Features.push_back("-save-restore");
159 
160   // Now add any that the user explicitly requested on the command line,
161   // which may override the defaults.
162   handleTargetFeaturesGroup(Args, Features, options::OPT_m_riscv_Features_Group);
163 }
164 
getRISCVABI(const ArgList & Args,const llvm::Triple & Triple)165 StringRef riscv::getRISCVABI(const ArgList &Args, const llvm::Triple &Triple) {
166   assert((Triple.getArch() == llvm::Triple::riscv32 ||
167           Triple.getArch() == llvm::Triple::riscv64) &&
168          "Unexpected triple");
169 
170   // GCC's logic around choosing a default `-mabi=` is complex. If GCC is not
171   // configured using `--with-abi=`, then the logic for the default choice is
172   // defined in config.gcc. This function is based on the logic in GCC 9.2.0.
173   //
174   // The logic used in GCC 9.2.0 is the following, in order:
175   // 1. Explicit choices using `--with-abi=`
176   // 2. A default based on `--with-arch=`, if provided
177   // 3. A default based on the target triple's arch
178   //
179   // The logic in config.gcc is a little circular but it is not inconsistent.
180   //
181   // Clang does not have `--with-arch=` or `--with-abi=`, so we use `-march=`
182   // and `-mabi=` respectively instead.
183   //
184   // In order to make chosing logic more clear, Clang uses the following logic,
185   // in order:
186   // 1. Explicit choices using `-mabi=`
187   // 2. A default based on the architecture as determined by getRISCVArch
188   // 3. Choose a default based on the triple
189 
190   // 1. If `-mabi=` is specified, use it.
191   if (const Arg *A = Args.getLastArg(options::OPT_mabi_EQ))
192     return A->getValue();
193 
194   // 2. Choose a default based on the target architecture.
195   //
196   // rv32g | rv32*d -> ilp32d
197   // rv32e -> ilp32e
198   // rv32* -> ilp32
199   // rv64g | rv64*d -> lp64d
200   // rv64* -> lp64
201   StringRef Arch = getRISCVArch(Args, Triple);
202 
203   auto ParseResult = llvm::RISCVISAInfo::parseArchString(
204       Arch, /* EnableExperimentalExtension */ true);
205   if (!ParseResult)
206     // Ignore parsing error, just go 3rd step.
207     consumeError(ParseResult.takeError());
208   else
209     return (*ParseResult)->computeDefaultABI();
210 
211   // 3. Choose a default based on the triple
212   //
213   // We deviate from GCC's defaults here:
214   // - On `riscv{XLEN}-unknown-elf` we use the integer calling convention only.
215   // - On all other OSs we use the double floating point calling convention.
216   if (Triple.getArch() == llvm::Triple::riscv32) {
217     if (Triple.getOS() == llvm::Triple::UnknownOS)
218       return "ilp32";
219     else
220       return "ilp32d";
221   } else {
222     if (Triple.getOS() == llvm::Triple::UnknownOS)
223       return "lp64";
224     else
225       return "lp64d";
226   }
227 }
228 
getRISCVArch(const llvm::opt::ArgList & Args,const llvm::Triple & Triple)229 StringRef riscv::getRISCVArch(const llvm::opt::ArgList &Args,
230                               const llvm::Triple &Triple) {
231   assert((Triple.getArch() == llvm::Triple::riscv32 ||
232           Triple.getArch() == llvm::Triple::riscv64) &&
233          "Unexpected triple");
234 
235   // GCC's logic around choosing a default `-march=` is complex. If GCC is not
236   // configured using `--with-arch=`, then the logic for the default choice is
237   // defined in config.gcc. This function is based on the logic in GCC 9.2.0. We
238   // deviate from GCC's default on additional `-mcpu` option (GCC does not
239   // support `-mcpu`) and baremetal targets (UnknownOS) where neither `-march`
240   // nor `-mabi` is specified.
241   //
242   // The logic used in GCC 9.2.0 is the following, in order:
243   // 1. Explicit choices using `--with-arch=`
244   // 2. A default based on `--with-abi=`, if provided
245   // 3. A default based on the target triple's arch
246   //
247   // The logic in config.gcc is a little circular but it is not inconsistent.
248   //
249   // Clang does not have `--with-arch=` or `--with-abi=`, so we use `-march=`
250   // and `-mabi=` respectively instead.
251   //
252   // Clang uses the following logic, in order:
253   // 1. Explicit choices using `-march=`
254   // 2. Based on `-mcpu` if the target CPU has a default ISA string
255   // 3. A default based on `-mabi`, if provided
256   // 4. A default based on the target triple's arch
257   //
258   // Clang does not yet support MULTILIB_REUSE, so we use `rv{XLEN}imafdc`
259   // instead of `rv{XLEN}gc` though they are (currently) equivalent.
260 
261   // 1. If `-march=` is specified, use it.
262   if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
263     return A->getValue();
264 
265   // 2. Get march (isa string) based on `-mcpu=`
266   if (const Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) {
267     StringRef MArch = llvm::RISCV::getMArchFromMcpu(A->getValue());
268     // Bypass if target cpu's default march is empty.
269     if (MArch != "")
270       return MArch;
271   }
272 
273   // 3. Choose a default based on `-mabi=`
274   //
275   // ilp32e -> rv32e
276   // ilp32 | ilp32f | ilp32d -> rv32imafdc
277   // lp64 | lp64f | lp64d -> rv64imafdc
278   if (const Arg *A = Args.getLastArg(options::OPT_mabi_EQ)) {
279     StringRef MABI = A->getValue();
280 
281     if (MABI.equals_insensitive("ilp32e"))
282       return "rv32e";
283     else if (MABI.startswith_insensitive("ilp32"))
284       return "rv32imafdc";
285     else if (MABI.startswith_insensitive("lp64"))
286       return "rv64imafdc";
287   }
288 
289   // 4. Choose a default based on the triple
290   //
291   // We deviate from GCC's defaults here:
292   // - On `riscv{XLEN}-unknown-elf` we default to `rv{XLEN}imac`
293   // - On all other OSs we use `rv{XLEN}imafdc` (equivalent to `rv{XLEN}gc`)
294   if (Triple.getArch() == llvm::Triple::riscv32) {
295     if (Triple.getOS() == llvm::Triple::UnknownOS)
296       return "rv32imac";
297     else
298       return "rv32imafdc";
299   } else {
300     if (Triple.getOS() == llvm::Triple::UnknownOS)
301       return "rv64imac";
302     else
303       return "rv64imafdc";
304   }
305 }
306