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Searched defs:fpga_queue (Results 1 – 2 of 2) sorted by relevance

/f-stack/dpdk/drivers/baseband/fpga_5gnr_fec/
H A Dfpga_5gnr_fec.h258 struct __rte_cache_aligned fpga_queue { struct
259 struct fpga_ring_ctrl_reg ring_ctrl_reg; /* Ring Control Register */
261 uint64_t *ring_head_addr; /* Virtual address of completion_head */
262 uint64_t shadow_completion_head; /* Shadow completion head value */
263 uint16_t head_free_desc; /* Ring head */
264 uint16_t tail; /* Ring tail */
266 uint32_t sw_ring_wrap_mask;
267 uint32_t irq_enable; /* Enable ops dequeue interrupts if set to 1 */
268 uint8_t q_idx; /* Queue index */
269 struct fpga_5gnr_fec_device *d;
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/f-stack/dpdk/drivers/baseband/fpga_lte_fec/
H A Dfpga_lte_fec.c251 struct __rte_cache_aligned fpga_queue { struct
252 struct fpga_ring_ctrl_reg ring_ctrl_reg; /* Ring Control Register */
254 uint64_t *ring_head_addr; /* Virtual address of completion_head */
255 uint64_t shadow_completion_head; /* Shadow completion head value */
256 uint16_t head_free_desc; /* Ring head */
257 uint16_t tail; /* Ring tail */
259 uint32_t sw_ring_wrap_mask;
260 uint32_t irq_enable; /* Enable ops dequeue interrupts if set to 1 */
261 uint8_t q_idx; /* Queue index */
262 struct fpga_lte_fec_device *d;
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