1 //===-- ArchSpec.h ----------------------------------------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #ifndef LLDB_UTILITY_ARCHSPEC_H 11 #define LLDB_UTILITY_ARCHSPEC_H 12 13 #include "lldb/Utility/CompletionRequest.h" 14 #include "lldb/Utility/ConstString.h" 15 #include "lldb/lldb-enumerations.h" 16 #include "lldb/lldb-forward.h" 17 #include "lldb/lldb-private-enumerations.h" 18 #include "llvm/ADT/StringRef.h" 19 #include "llvm/ADT/Triple.h" 20 #include <cstddef> 21 #include <cstdint> 22 #include <string> 23 24 namespace lldb_private { 25 26 //---------------------------------------------------------------------- 27 /// @class ArchSpec ArchSpec.h "lldb/Utility/ArchSpec.h" An architecture 28 /// specification class. 29 /// 30 /// A class designed to be created from a cpu type and subtype, a 31 /// string representation, or an llvm::Triple. Keeping all of the conversions 32 /// of strings to architecture enumeration values confined to this class 33 /// allows new architecture support to be added easily. 34 //---------------------------------------------------------------------- 35 class ArchSpec { 36 public: 37 enum MIPSSubType { 38 eMIPSSubType_unknown, 39 eMIPSSubType_mips32, 40 eMIPSSubType_mips32r2, 41 eMIPSSubType_mips32r6, 42 eMIPSSubType_mips32el, 43 eMIPSSubType_mips32r2el, 44 eMIPSSubType_mips32r6el, 45 eMIPSSubType_mips64, 46 eMIPSSubType_mips64r2, 47 eMIPSSubType_mips64r6, 48 eMIPSSubType_mips64el, 49 eMIPSSubType_mips64r2el, 50 eMIPSSubType_mips64r6el, 51 }; 52 53 // Masks for the ases word of an ABI flags structure. 54 enum MIPSASE { 55 eMIPSAse_dsp = 0x00000001, // DSP ASE 56 eMIPSAse_dspr2 = 0x00000002, // DSP R2 ASE 57 eMIPSAse_eva = 0x00000004, // Enhanced VA Scheme 58 eMIPSAse_mcu = 0x00000008, // MCU (MicroController) ASE 59 eMIPSAse_mdmx = 0x00000010, // MDMX ASE 60 eMIPSAse_mips3d = 0x00000020, // MIPS-3D ASE 61 eMIPSAse_mt = 0x00000040, // MT ASE 62 eMIPSAse_smartmips = 0x00000080, // SmartMIPS ASE 63 eMIPSAse_virt = 0x00000100, // VZ ASE 64 eMIPSAse_msa = 0x00000200, // MSA ASE 65 eMIPSAse_mips16 = 0x00000400, // MIPS16 ASE 66 eMIPSAse_micromips = 0x00000800, // MICROMIPS ASE 67 eMIPSAse_xpa = 0x00001000, // XPA ASE 68 eMIPSAse_mask = 0x00001fff, 69 eMIPSABI_O32 = 0x00002000, 70 eMIPSABI_N32 = 0x00004000, 71 eMIPSABI_N64 = 0x00008000, 72 eMIPSABI_O64 = 0x00020000, 73 eMIPSABI_EABI32 = 0x00040000, 74 eMIPSABI_EABI64 = 0x00080000, 75 eMIPSABI_mask = 0x000ff000 76 }; 77 78 // MIPS Floating point ABI Values 79 enum MIPS_ABI_FP { 80 eMIPS_ABI_FP_ANY = 0x00000000, 81 eMIPS_ABI_FP_DOUBLE = 0x00100000, // hard float / -mdouble-float 82 eMIPS_ABI_FP_SINGLE = 0x00200000, // hard float / -msingle-float 83 eMIPS_ABI_FP_SOFT = 0x00300000, // soft float 84 eMIPS_ABI_FP_OLD_64 = 0x00400000, // -mips32r2 -mfp64 85 eMIPS_ABI_FP_XX = 0x00500000, // -mfpxx 86 eMIPS_ABI_FP_64 = 0x00600000, // -mips32r2 -mfp64 87 eMIPS_ABI_FP_64A = 0x00700000, // -mips32r2 -mfp64 -mno-odd-spreg 88 eMIPS_ABI_FP_mask = 0x00700000 89 }; 90 91 // ARM specific e_flags 92 enum ARMeflags { 93 eARM_abi_soft_float = 0x00000200, 94 eARM_abi_hard_float = 0x00000400 95 }; 96 97 enum Core { 98 eCore_arm_generic, 99 eCore_arm_armv4, 100 eCore_arm_armv4t, 101 eCore_arm_armv5, 102 eCore_arm_armv5e, 103 eCore_arm_armv5t, 104 eCore_arm_armv6, 105 eCore_arm_armv6m, 106 eCore_arm_armv7, 107 eCore_arm_armv7f, 108 eCore_arm_armv7s, 109 eCore_arm_armv7k, 110 eCore_arm_armv7m, 111 eCore_arm_armv7em, 112 eCore_arm_xscale, 113 114 eCore_thumb, 115 eCore_thumbv4t, 116 eCore_thumbv5, 117 eCore_thumbv5e, 118 eCore_thumbv6, 119 eCore_thumbv6m, 120 eCore_thumbv7, 121 eCore_thumbv7s, 122 eCore_thumbv7k, 123 eCore_thumbv7f, 124 eCore_thumbv7m, 125 eCore_thumbv7em, 126 eCore_arm_arm64, 127 eCore_arm_armv8, 128 eCore_arm_aarch64, 129 130 eCore_mips32, 131 eCore_mips32r2, 132 eCore_mips32r3, 133 eCore_mips32r5, 134 eCore_mips32r6, 135 eCore_mips32el, 136 eCore_mips32r2el, 137 eCore_mips32r3el, 138 eCore_mips32r5el, 139 eCore_mips32r6el, 140 eCore_mips64, 141 eCore_mips64r2, 142 eCore_mips64r3, 143 eCore_mips64r5, 144 eCore_mips64r6, 145 eCore_mips64el, 146 eCore_mips64r2el, 147 eCore_mips64r3el, 148 eCore_mips64r5el, 149 eCore_mips64r6el, 150 151 eCore_ppc_generic, 152 eCore_ppc_ppc601, 153 eCore_ppc_ppc602, 154 eCore_ppc_ppc603, 155 eCore_ppc_ppc603e, 156 eCore_ppc_ppc603ev, 157 eCore_ppc_ppc604, 158 eCore_ppc_ppc604e, 159 eCore_ppc_ppc620, 160 eCore_ppc_ppc750, 161 eCore_ppc_ppc7400, 162 eCore_ppc_ppc7450, 163 eCore_ppc_ppc970, 164 165 eCore_ppc64le_generic, 166 eCore_ppc64_generic, 167 eCore_ppc64_ppc970_64, 168 169 eCore_s390x_generic, 170 171 eCore_sparc_generic, 172 173 eCore_sparc9_generic, 174 175 eCore_x86_32_i386, 176 eCore_x86_32_i486, 177 eCore_x86_32_i486sx, 178 eCore_x86_32_i686, 179 180 eCore_x86_64_x86_64, 181 eCore_x86_64_x86_64h, // Haswell enabled x86_64 182 eCore_hexagon_generic, 183 eCore_hexagon_hexagonv4, 184 eCore_hexagon_hexagonv5, 185 186 eCore_uknownMach32, 187 eCore_uknownMach64, 188 189 eCore_kalimba3, 190 eCore_kalimba4, 191 eCore_kalimba5, 192 193 kNumCores, 194 195 kCore_invalid, 196 // The following constants are used for wildcard matching only 197 kCore_any, 198 kCore_arm_any, 199 kCore_ppc_any, 200 kCore_ppc64_any, 201 kCore_x86_32_any, 202 kCore_x86_64_any, 203 kCore_hexagon_any, 204 205 kCore_arm_first = eCore_arm_generic, 206 kCore_arm_last = eCore_arm_xscale, 207 208 kCore_thumb_first = eCore_thumb, 209 kCore_thumb_last = eCore_thumbv7em, 210 211 kCore_ppc_first = eCore_ppc_generic, 212 kCore_ppc_last = eCore_ppc_ppc970, 213 214 kCore_ppc64_first = eCore_ppc64_generic, 215 kCore_ppc64_last = eCore_ppc64_ppc970_64, 216 217 kCore_x86_32_first = eCore_x86_32_i386, 218 kCore_x86_32_last = eCore_x86_32_i686, 219 220 kCore_x86_64_first = eCore_x86_64_x86_64, 221 kCore_x86_64_last = eCore_x86_64_x86_64h, 222 223 kCore_hexagon_first = eCore_hexagon_generic, 224 kCore_hexagon_last = eCore_hexagon_hexagonv5, 225 226 kCore_kalimba_first = eCore_kalimba3, 227 kCore_kalimba_last = eCore_kalimba5, 228 229 kCore_mips32_first = eCore_mips32, 230 kCore_mips32_last = eCore_mips32r6, 231 232 kCore_mips32el_first = eCore_mips32el, 233 kCore_mips32el_last = eCore_mips32r6el, 234 235 kCore_mips64_first = eCore_mips64, 236 kCore_mips64_last = eCore_mips64r6, 237 238 kCore_mips64el_first = eCore_mips64el, 239 kCore_mips64el_last = eCore_mips64r6el, 240 241 kCore_mips_first = eCore_mips32, 242 kCore_mips_last = eCore_mips64r6el 243 244 }; 245 246 //------------------------------------------------------------------ 247 /// Default constructor. 248 /// 249 /// Default constructor that initializes the object with invalid cpu type 250 /// and subtype values. 251 //------------------------------------------------------------------ 252 ArchSpec(); 253 254 //------------------------------------------------------------------ 255 /// Constructor over triple. 256 /// 257 /// Constructs an ArchSpec with properties consistent with the given Triple. 258 //------------------------------------------------------------------ 259 explicit ArchSpec(const llvm::Triple &triple); 260 explicit ArchSpec(const char *triple_cstr); 261 explicit ArchSpec(llvm::StringRef triple_str); 262 //------------------------------------------------------------------ 263 /// Constructor over architecture name. 264 /// 265 /// Constructs an ArchSpec with properties consistent with the given object 266 /// type and architecture name. 267 //------------------------------------------------------------------ 268 explicit ArchSpec(ArchitectureType arch_type, uint32_t cpu_type, 269 uint32_t cpu_subtype); 270 271 //------------------------------------------------------------------ 272 /// Destructor. 273 //------------------------------------------------------------------ 274 ~ArchSpec(); 275 276 //------------------------------------------------------------------ 277 /// Assignment operator. 278 /// 279 /// @param[in] rhs another ArchSpec object to copy. 280 /// 281 /// @return A const reference to this object. 282 //------------------------------------------------------------------ 283 const ArchSpec &operator=(const ArchSpec &rhs); 284 285 //--------------------------------------------------------------------------- 286 /// Returns true if the OS, vendor and environment fields of the triple are 287 /// unset. The triple is expected to be normalized 288 /// (llvm::Triple::normalize). 289 //--------------------------------------------------------------------------- 290 static bool ContainsOnlyArch(const llvm::Triple &normalized_triple); 291 292 static void ListSupportedArchNames(StringList &list); 293 static size_t AutoComplete(CompletionRequest &request); 294 295 //------------------------------------------------------------------ 296 /// Returns a static string representing the current architecture. 297 /// 298 /// @return A static string corresponding to the current 299 /// architecture. 300 //------------------------------------------------------------------ 301 const char *GetArchitectureName() const; 302 303 //----------------------------------------------------------------- 304 /// if MIPS architecture return true. 305 /// 306 /// @return a boolean value. 307 //----------------------------------------------------------------- 308 bool IsMIPS() const; 309 310 //------------------------------------------------------------------ 311 /// Returns a string representing current architecture as a target CPU for 312 /// tools like compiler, disassembler etc. 313 /// 314 /// @return A string representing target CPU for the current 315 /// architecture. 316 //------------------------------------------------------------------ 317 std::string GetClangTargetCPU() const; 318 319 //------------------------------------------------------------------ 320 /// Return a string representing target application ABI. 321 /// 322 /// @return A string representing target application ABI. 323 //------------------------------------------------------------------ 324 std::string GetTargetABI() const; 325 326 //------------------------------------------------------------------ 327 /// Clears the object state. 328 /// 329 /// Clears the object state back to a default invalid state. 330 //------------------------------------------------------------------ 331 void Clear(); 332 333 //------------------------------------------------------------------ 334 /// Returns the size in bytes of an address of the current architecture. 335 /// 336 /// @return The byte size of an address of the current architecture. 337 //------------------------------------------------------------------ 338 uint32_t GetAddressByteSize() const; 339 340 //------------------------------------------------------------------ 341 /// Returns a machine family for the current architecture. 342 /// 343 /// @return An LLVM arch type. 344 //------------------------------------------------------------------ 345 llvm::Triple::ArchType GetMachine() const; 346 347 //------------------------------------------------------------------ 348 /// Returns the distribution id of the architecture. 349 /// 350 /// This will be something like "ubuntu", "fedora", etc. on Linux. 351 /// 352 /// @return A ConstString ref containing the distribution id, 353 /// potentially empty. 354 //------------------------------------------------------------------ 355 const ConstString &GetDistributionId() const; 356 357 //------------------------------------------------------------------ 358 /// Set the distribution id of the architecture. 359 /// 360 /// This will be something like "ubuntu", "fedora", etc. on Linux. This 361 /// should be the same value returned by HostInfo::GetDistributionId (). 362 ///------------------------------------------------------------------ 363 void SetDistributionId(const char *distribution_id); 364 365 //------------------------------------------------------------------ 366 /// Tests if this ArchSpec is valid. 367 /// 368 /// @return True if the current architecture is valid, false 369 /// otherwise. 370 //------------------------------------------------------------------ IsValid()371 bool IsValid() const { 372 return m_core >= eCore_arm_generic && m_core < kNumCores; 373 } 374 explicit operator bool() const { return IsValid(); } 375 TripleVendorWasSpecified()376 bool TripleVendorWasSpecified() const { 377 return !m_triple.getVendorName().empty(); 378 } 379 TripleVendorIsUnspecifiedUnknown()380 bool TripleVendorIsUnspecifiedUnknown() const { 381 return m_triple.getVendor() == llvm::Triple::UnknownVendor && 382 m_triple.getVendorName().empty(); 383 } 384 TripleOSWasSpecified()385 bool TripleOSWasSpecified() const { return !m_triple.getOSName().empty(); } 386 TripleEnvironmentWasSpecified()387 bool TripleEnvironmentWasSpecified() const { 388 return !m_triple.getEnvironmentName().empty(); 389 } 390 TripleOSIsUnspecifiedUnknown()391 bool TripleOSIsUnspecifiedUnknown() const { 392 return m_triple.getOS() == llvm::Triple::UnknownOS && 393 m_triple.getOSName().empty(); 394 } 395 396 //------------------------------------------------------------------ 397 /// Merges fields from another ArchSpec into this ArchSpec. 398 /// 399 /// This will use the supplied ArchSpec to fill in any fields of the triple 400 /// in this ArchSpec which were unspecified. This can be used to refine a 401 /// generic ArchSpec with a more specific one. For example, if this 402 /// ArchSpec's triple is something like i386-unknown-unknown-unknown, and we 403 /// have a triple which is x64-pc-windows-msvc, then merging that triple 404 /// into this one will result in the triple i386-pc-windows-msvc. 405 /// 406 //------------------------------------------------------------------ 407 void MergeFrom(const ArchSpec &other); 408 409 //------------------------------------------------------------------ 410 /// Change the architecture object type, CPU type and OS type. 411 /// 412 /// @param[in] arch_type The object type of this ArchSpec. 413 /// 414 /// @param[in] cpu The required CPU type. 415 /// 416 /// @param[in] os The optional OS type 417 /// The default value of 0 was chosen to from the ELF spec value 418 /// ELFOSABI_NONE. ELF is the only one using this parameter. If another 419 /// format uses this parameter and 0 does not work, use a value over 420 /// 255 because in the ELF header this is value is only a byte. 421 /// 422 /// @return True if the object, and CPU were successfully set. 423 /// 424 /// As a side effect, the vendor value is usually set to unknown. The 425 /// exceptions are 426 /// aarch64-apple-ios 427 /// arm-apple-ios 428 /// thumb-apple-ios 429 /// x86-apple- 430 /// x86_64-apple- 431 /// 432 /// As a side effect, the os value is usually set to unknown The exceptions 433 /// are 434 /// *-*-aix 435 /// aarch64-apple-ios 436 /// arm-apple-ios 437 /// thumb-apple-ios 438 /// powerpc-apple-darwin 439 /// *-*-freebsd 440 /// *-*-linux 441 /// *-*-netbsd 442 /// *-*-openbsd 443 /// *-*-solaris 444 //------------------------------------------------------------------ 445 bool SetArchitecture(ArchitectureType arch_type, uint32_t cpu, uint32_t sub, 446 uint32_t os = 0); 447 448 //------------------------------------------------------------------ 449 /// Returns the byte order for the architecture specification. 450 /// 451 /// @return The endian enumeration for the current endianness of 452 /// the architecture specification 453 //------------------------------------------------------------------ 454 lldb::ByteOrder GetByteOrder() const; 455 456 //------------------------------------------------------------------ 457 /// Sets this ArchSpec's byte order. 458 /// 459 /// In the common case there is no need to call this method as the byte 460 /// order can almost always be determined by the architecture. However, many 461 /// CPU's are bi-endian (ARM, Alpha, PowerPC, etc) and the default/assumed 462 /// byte order may be incorrect. 463 //------------------------------------------------------------------ SetByteOrder(lldb::ByteOrder byte_order)464 void SetByteOrder(lldb::ByteOrder byte_order) { m_byte_order = byte_order; } 465 466 uint32_t GetMinimumOpcodeByteSize() const; 467 468 uint32_t GetMaximumOpcodeByteSize() const; 469 GetCore()470 Core GetCore() const { return m_core; } 471 472 uint32_t GetMachOCPUType() const; 473 474 uint32_t GetMachOCPUSubType() const; 475 476 //------------------------------------------------------------------ 477 /// Architecture data byte width accessor 478 /// 479 /// @return the size in 8-bit (host) bytes of a minimum addressable unit 480 /// from the Architecture's data bus 481 //------------------------------------------------------------------ 482 uint32_t GetDataByteSize() const; 483 484 //------------------------------------------------------------------ 485 /// Architecture code byte width accessor 486 /// 487 /// @return the size in 8-bit (host) bytes of a minimum addressable unit 488 /// from the Architecture's code bus 489 //------------------------------------------------------------------ 490 uint32_t GetCodeByteSize() const; 491 492 //------------------------------------------------------------------ 493 /// Architecture triple accessor. 494 /// 495 /// @return A triple describing this ArchSpec. 496 //------------------------------------------------------------------ GetTriple()497 llvm::Triple &GetTriple() { return m_triple; } 498 499 //------------------------------------------------------------------ 500 /// Architecture triple accessor. 501 /// 502 /// @return A triple describing this ArchSpec. 503 //------------------------------------------------------------------ GetTriple()504 const llvm::Triple &GetTriple() const { return m_triple; } 505 506 void DumpTriple(Stream &s) const; 507 508 //------------------------------------------------------------------ 509 /// Architecture triple setter. 510 /// 511 /// Configures this ArchSpec according to the given triple. If the triple 512 /// has unknown components in all of the vendor, OS, and the optional 513 /// environment field (i.e. "i386-unknown-unknown") then default values are 514 /// taken from the host. Architecture and environment components are used 515 /// to further resolve the CPU type and subtype, endian characteristics, 516 /// etc. 517 /// 518 /// @return A triple describing this ArchSpec. 519 //------------------------------------------------------------------ 520 bool SetTriple(const llvm::Triple &triple); 521 522 bool SetTriple(llvm::StringRef triple_str); 523 524 //------------------------------------------------------------------ 525 /// Returns the default endianness of the architecture. 526 /// 527 /// @return The endian enumeration for the default endianness of 528 /// the architecture. 529 //------------------------------------------------------------------ 530 lldb::ByteOrder GetDefaultEndian() const; 531 532 //------------------------------------------------------------------ 533 /// Returns true if 'char' is a signed type by default in the architecture 534 /// false otherwise 535 /// 536 /// @return True if 'char' is a signed type by default on the 537 /// architecture and false otherwise. 538 //------------------------------------------------------------------ 539 bool CharIsSignedByDefault() const; 540 541 //------------------------------------------------------------------ 542 /// Compare an ArchSpec to another ArchSpec, requiring an exact cpu type 543 /// match between them. e.g. armv7s is not an exact match with armv7 - this 544 /// would return false 545 /// 546 /// @return true if the two ArchSpecs match. 547 //------------------------------------------------------------------ 548 bool IsExactMatch(const ArchSpec &rhs) const; 549 550 //------------------------------------------------------------------ 551 /// Compare an ArchSpec to another ArchSpec, requiring a compatible cpu type 552 /// match between them. e.g. armv7s is compatible with armv7 - this method 553 /// would return true 554 /// 555 /// @return true if the two ArchSpecs are compatible 556 //------------------------------------------------------------------ 557 bool IsCompatibleMatch(const ArchSpec &rhs) const; 558 559 bool IsFullySpecifiedTriple() const; 560 561 void PiecewiseTripleCompare(const ArchSpec &other, bool &arch_different, 562 bool &vendor_different, bool &os_different, 563 bool &os_version_different, 564 bool &env_different) const; 565 566 //------------------------------------------------------------------ 567 /// Detect whether this architecture uses thumb code exclusively 568 /// 569 /// Some embedded ARM chips (e.g. the ARM Cortex M0-7 line) can only execute 570 /// the Thumb instructions, never Arm. We should normally pick up 571 /// arm/thumbness from their the processor status bits (cpsr/xpsr) or hints 572 /// on each function - but when doing bare-boards low level debugging 573 /// (especially common with these embedded processors), we may not have 574 /// those things easily accessible. 575 /// 576 /// @return true if this is an arm ArchSpec which can only execute Thumb 577 /// instructions 578 //------------------------------------------------------------------ 579 bool IsAlwaysThumbInstructions() const; 580 GetFlags()581 uint32_t GetFlags() const { return m_flags; } 582 SetFlags(uint32_t flags)583 void SetFlags(uint32_t flags) { m_flags = flags; } 584 585 void SetFlags(std::string elf_abi); 586 587 protected: 588 bool IsEqualTo(const ArchSpec &rhs, bool exact_match) const; 589 void UpdateCore(); 590 591 llvm::Triple m_triple; 592 Core m_core = kCore_invalid; 593 lldb::ByteOrder m_byte_order = lldb::eByteOrderInvalid; 594 595 // Additional arch flags which we cannot get from triple and core For MIPS 596 // these are application specific extensions like micromips, mips16 etc. 597 uint32_t m_flags = 0; 598 599 ConstString m_distribution_id; 600 601 // Called when m_def or m_entry are changed. Fills in all remaining members 602 // with default values. 603 void CoreUpdated(bool update_triple); 604 }; 605 606 //------------------------------------------------------------------ 607 /// @fn bool operator< (const ArchSpec& lhs, const ArchSpec& rhs) Less than 608 /// operator. 609 /// 610 /// Tests two ArchSpec objects to see if \a lhs is less than \a rhs. 611 /// 612 /// @param[in] lhs The Left Hand Side ArchSpec object to compare. @param[in] 613 /// rhs The Left Hand Side ArchSpec object to compare. 614 /// 615 /// @return true if \a lhs is less than \a rhs 616 //------------------------------------------------------------------ 617 bool operator<(const ArchSpec &lhs, const ArchSpec &rhs); 618 bool operator==(const ArchSpec &lhs, const ArchSpec &rhs); 619 620 bool ParseMachCPUDashSubtypeTriple(llvm::StringRef triple_str, ArchSpec &arch); 621 622 } // namespace lldb_private 623 624 #endif // #ifndef LLDB_UTILITY_ARCHSPEC_H 625