1 /*-
2 * Copyright (c) 2015 Semihalf
3 * Copyright (c) 2015 Stormshield
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30
31 #include <sys/param.h>
32 #include <sys/bus.h>
33 #include <sys/errno.h>
34 #include <sys/kernel.h>
35 #include <sys/kthread.h>
36 #include <sys/module.h>
37 #include <sys/socket.h>
38 #include <sys/sockio.h>
39
40 #include <net/if.h>
41 #include <net/if_media.h>
42 #include <net/if_types.h>
43
44 #include <dev/etherswitch/etherswitch.h>
45 #include <dev/mii/mii.h>
46 #include <dev/mii/miivar.h>
47
48 #include <dev/fdt/fdt_common.h>
49 #include <dev/ofw/ofw_bus.h>
50
51 #include "e6000swreg.h"
52 #include "etherswitch_if.h"
53 #include "miibus_if.h"
54 #include "mdio_if.h"
55
56 MALLOC_DECLARE(M_E6000SW);
57 MALLOC_DEFINE(M_E6000SW, "e6000sw", "e6000sw switch");
58
59 #define E6000SW_LOCK(_sc) sx_xlock(&(_sc)->sx)
60 #define E6000SW_UNLOCK(_sc) sx_unlock(&(_sc)->sx)
61 #define E6000SW_LOCK_ASSERT(_sc, _what) sx_assert(&(_sc)->sx, (_what))
62 #define E6000SW_TRYLOCK(_sc) sx_tryxlock(&(_sc)->sx)
63
64 typedef struct e6000sw_softc {
65 device_t dev;
66 phandle_t node;
67
68 struct sx sx;
69 struct ifnet *ifp[E6000SW_MAX_PORTS];
70 char *ifname[E6000SW_MAX_PORTS];
71 device_t miibus[E6000SW_MAX_PORTS];
72 struct proc *kproc;
73
74 uint32_t swid;
75 uint32_t vlan_mode;
76 uint32_t cpuports_mask;
77 uint32_t fixed_mask;
78 uint32_t fixed25_mask;
79 uint32_t ports_mask;
80 int phy_base;
81 int sw_addr;
82 int num_ports;
83 boolean_t multi_chip;
84 } e6000sw_softc_t;
85
86 static etherswitch_info_t etherswitch_info = {
87 .es_nports = 0,
88 .es_nvlangroups = 0,
89 .es_vlan_caps = ETHERSWITCH_VLAN_PORT,
90 .es_name = "Marvell 6000 series switch"
91 };
92
93 static void e6000sw_identify(driver_t *, device_t);
94 static int e6000sw_probe(device_t);
95 static int e6000sw_attach(device_t);
96 static int e6000sw_detach(device_t);
97 static int e6000sw_readphy(device_t, int, int);
98 static int e6000sw_writephy(device_t, int, int, int);
99 static etherswitch_info_t* e6000sw_getinfo(device_t);
100 static int e6000sw_getconf(device_t, etherswitch_conf_t *);
101 static void e6000sw_lock(device_t);
102 static void e6000sw_unlock(device_t);
103 static int e6000sw_getport(device_t, etherswitch_port_t *);
104 static int e6000sw_setport(device_t, etherswitch_port_t *);
105 static int e6000sw_readreg_wrapper(device_t, int);
106 static int e6000sw_writereg_wrapper(device_t, int, int);
107 static int e6000sw_readphy_wrapper(device_t, int, int);
108 static int e6000sw_writephy_wrapper(device_t, int, int, int);
109 static int e6000sw_getvgroup_wrapper(device_t, etherswitch_vlangroup_t *);
110 static int e6000sw_setvgroup_wrapper(device_t, etherswitch_vlangroup_t *);
111 static int e6000sw_setvgroup(device_t, etherswitch_vlangroup_t *);
112 static int e6000sw_getvgroup(device_t, etherswitch_vlangroup_t *);
113 static void e6000sw_setup(device_t, e6000sw_softc_t *);
114 static void e6000sw_port_vlan_conf(e6000sw_softc_t *);
115 static void e6000sw_tick(void *);
116 static void e6000sw_set_atustat(device_t, e6000sw_softc_t *, int, int);
117 static int e6000sw_atu_flush(device_t, e6000sw_softc_t *, int);
118 static __inline void e6000sw_writereg(e6000sw_softc_t *, int, int, int);
119 static __inline uint32_t e6000sw_readreg(e6000sw_softc_t *, int, int);
120 static int e6000sw_ifmedia_upd(struct ifnet *);
121 static void e6000sw_ifmedia_sts(struct ifnet *, struct ifmediareq *);
122 static int e6000sw_atu_mac_table(device_t, e6000sw_softc_t *, struct atu_opt *,
123 int);
124 static int e6000sw_get_pvid(e6000sw_softc_t *, int, int *);
125 static int e6000sw_set_pvid(e6000sw_softc_t *, int, int);
126 static __inline bool e6000sw_is_cpuport(e6000sw_softc_t *, int);
127 static __inline bool e6000sw_is_fixedport(e6000sw_softc_t *, int);
128 static __inline bool e6000sw_is_fixed25port(e6000sw_softc_t *, int);
129 static __inline bool e6000sw_is_phyport(e6000sw_softc_t *, int);
130 static __inline bool e6000sw_is_portenabled(e6000sw_softc_t *, int);
131 static __inline struct mii_data *e6000sw_miiforphy(e6000sw_softc_t *,
132 unsigned int);
133
134 static device_method_t e6000sw_methods[] = {
135 /* device interface */
136 DEVMETHOD(device_identify, e6000sw_identify),
137 DEVMETHOD(device_probe, e6000sw_probe),
138 DEVMETHOD(device_attach, e6000sw_attach),
139 DEVMETHOD(device_detach, e6000sw_detach),
140
141 /* bus interface */
142 DEVMETHOD(bus_add_child, device_add_child_ordered),
143
144 /* mii interface */
145 DEVMETHOD(miibus_readreg, e6000sw_readphy),
146 DEVMETHOD(miibus_writereg, e6000sw_writephy),
147
148 /* etherswitch interface */
149 DEVMETHOD(etherswitch_getinfo, e6000sw_getinfo),
150 DEVMETHOD(etherswitch_getconf, e6000sw_getconf),
151 DEVMETHOD(etherswitch_lock, e6000sw_lock),
152 DEVMETHOD(etherswitch_unlock, e6000sw_unlock),
153 DEVMETHOD(etherswitch_getport, e6000sw_getport),
154 DEVMETHOD(etherswitch_setport, e6000sw_setport),
155 DEVMETHOD(etherswitch_readreg, e6000sw_readreg_wrapper),
156 DEVMETHOD(etherswitch_writereg, e6000sw_writereg_wrapper),
157 DEVMETHOD(etherswitch_readphyreg, e6000sw_readphy_wrapper),
158 DEVMETHOD(etherswitch_writephyreg, e6000sw_writephy_wrapper),
159 DEVMETHOD(etherswitch_setvgroup, e6000sw_setvgroup_wrapper),
160 DEVMETHOD(etherswitch_getvgroup, e6000sw_getvgroup_wrapper),
161
162 DEVMETHOD_END
163 };
164
165 static devclass_t e6000sw_devclass;
166
167 DEFINE_CLASS_0(e6000sw, e6000sw_driver, e6000sw_methods,
168 sizeof(e6000sw_softc_t));
169
170 DRIVER_MODULE(e6000sw, mdio, e6000sw_driver, e6000sw_devclass, 0, 0);
171 DRIVER_MODULE(etherswitch, e6000sw, etherswitch_driver, etherswitch_devclass, 0,
172 0);
173 DRIVER_MODULE(miibus, e6000sw, miibus_driver, miibus_devclass, 0, 0);
174 MODULE_DEPEND(e6000sw, mdio, 1, 1, 1);
175
176 #define SMI_CMD 0
177 #define SMI_CMD_BUSY (1 << 15)
178 #define SMI_CMD_OP_READ ((2 << 10) | SMI_CMD_BUSY | (1 << 12))
179 #define SMI_CMD_OP_WRITE ((1 << 10) | SMI_CMD_BUSY | (1 << 12))
180 #define SMI_DATA 1
181
182 #define MDIO_READ(dev, addr, reg) \
183 MDIO_READREG(device_get_parent(dev), (addr), (reg))
184 #define MDIO_WRITE(dev, addr, reg, val) \
185 MDIO_WRITEREG(device_get_parent(dev), (addr), (reg), (val))
186
187 static void
e6000sw_identify(driver_t * driver,device_t parent)188 e6000sw_identify(driver_t *driver, device_t parent)
189 {
190
191 if (device_find_child(parent, "e6000sw", -1) == NULL)
192 BUS_ADD_CHILD(parent, 0, "e6000sw", -1);
193 }
194
195 static int
e6000sw_probe(device_t dev)196 e6000sw_probe(device_t dev)
197 {
198 e6000sw_softc_t *sc;
199 const char *description;
200 phandle_t dsa_node, switch_node;
201
202 dsa_node = fdt_find_compatible(OF_finddevice("/"),
203 "marvell,dsa", 0);
204 switch_node = OF_child(dsa_node);
205
206 if (switch_node == 0)
207 return (ENXIO);
208
209 sc = device_get_softc(dev);
210 sc->dev = dev;
211 sc->node = switch_node;
212
213 if (OF_getencprop(sc->node, "reg", &sc->sw_addr,
214 sizeof(sc->sw_addr)) < 0)
215 return (ENXIO);
216
217 if (!OF_hasprop(sc->node, "single-chip-addressing") &&
218 (sc->sw_addr != 0 && (sc->sw_addr % 2) == 0))
219 sc->multi_chip = true;
220
221 /*
222 * Create temporary lock, just to satisfy assertions,
223 * when obtaining the switch ID. Destroy immediately afterwards.
224 */
225 sx_init(&sc->sx, "e6000sw_tmp");
226 E6000SW_LOCK(sc);
227 sc->swid = e6000sw_readreg(sc, REG_PORT(0), SWITCH_ID) & 0xfff0;
228 E6000SW_UNLOCK(sc);
229 sx_destroy(&sc->sx);
230
231 switch (sc->swid) {
232 case MV88E6141:
233 description = "Marvell 88E6141";
234 sc->phy_base = 0x10;
235 sc->num_ports = 6;
236 break;
237 case MV88E6341:
238 description = "Marvell 88E6341";
239 sc->phy_base = 0x10;
240 sc->num_ports = 6;
241 break;
242 case MV88E6352:
243 description = "Marvell 88E6352";
244 sc->num_ports = 7;
245 break;
246 case MV88E6172:
247 description = "Marvell 88E6172";
248 sc->num_ports = 7;
249 break;
250 case MV88E6176:
251 description = "Marvell 88E6176";
252 sc->num_ports = 7;
253 break;
254 default:
255 device_printf(dev, "Unrecognized device, id 0x%x.\n", sc->swid);
256 return (ENXIO);
257 }
258
259 device_set_desc(dev, description);
260
261 return (BUS_PROBE_DEFAULT);
262 }
263
264 static int
e6000sw_parse_child_fdt(e6000sw_softc_t * sc,phandle_t child,int * pport)265 e6000sw_parse_child_fdt(e6000sw_softc_t *sc, phandle_t child, int *pport)
266 {
267 char *name, *portlabel;
268 int speed;
269 phandle_t fixed_link;
270 uint32_t port;
271
272 if (pport == NULL)
273 return (ENXIO);
274
275 if (OF_getencprop(child, "reg", (void *)&port, sizeof(port)) < 0)
276 return (ENXIO);
277 if (port >= sc->num_ports)
278 return (ENXIO);
279 *pport = port;
280
281 if (OF_getprop_alloc(child, "label", (void **)&portlabel) > 0) {
282 if (strncmp(portlabel, "cpu", 3) == 0) {
283 device_printf(sc->dev, "CPU port at %d\n", port);
284 sc->cpuports_mask |= (1 << port);
285 sc->fixed_mask |= (1 << port);
286 }
287 free(portlabel, M_OFWPROP);
288 }
289
290 fixed_link = OF_child(child);
291 if (fixed_link != 0 &&
292 OF_getprop_alloc(fixed_link, "name", (void **)&name) > 0) {
293 if (strncmp(name, "fixed-link", 10) == 0) {
294 /* Assume defaults: 1g - full-duplex. */
295 sc->fixed_mask |= (1 << port);
296 if (OF_getencprop(fixed_link, "speed", &speed,
297 sizeof(speed)) > 0) {
298 if (speed == 2500 &&
299 (MVSWITCH(sc, MV88E6141) ||
300 MVSWITCH(sc, MV88E6341))) {
301 sc->fixed25_mask |= (1 << port);
302 }
303 }
304 }
305 free(name, M_OFWPROP);
306 }
307 if ((sc->fixed_mask & (1 << port)) != 0)
308 device_printf(sc->dev, "fixed port at %d\n", port);
309 else
310 device_printf(sc->dev, "PHY at port %d\n", port);
311
312 return (0);
313 }
314
315 static int
e6000sw_init_interface(e6000sw_softc_t * sc,int port)316 e6000sw_init_interface(e6000sw_softc_t *sc, int port)
317 {
318 char name[IFNAMSIZ];
319
320 snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->dev));
321
322 sc->ifp[port] = if_alloc(IFT_ETHER);
323 if (sc->ifp[port] == NULL)
324 return (ENOMEM);
325 sc->ifp[port]->if_softc = sc;
326 sc->ifp[port]->if_flags |= IFF_UP | IFF_BROADCAST |
327 IFF_DRV_RUNNING | IFF_SIMPLEX;
328 sc->ifname[port] = malloc(strlen(name) + 1, M_E6000SW, M_NOWAIT);
329 if (sc->ifname[port] == NULL) {
330 if_free(sc->ifp[port]);
331 return (ENOMEM);
332 }
333 memcpy(sc->ifname[port], name, strlen(name) + 1);
334 if_initname(sc->ifp[port], sc->ifname[port], port);
335
336 return (0);
337 }
338
339 static int
e6000sw_attach_miibus(e6000sw_softc_t * sc,int port)340 e6000sw_attach_miibus(e6000sw_softc_t *sc, int port)
341 {
342 int err;
343
344 err = mii_attach(sc->dev, &sc->miibus[port], sc->ifp[port],
345 e6000sw_ifmedia_upd, e6000sw_ifmedia_sts, BMSR_DEFCAPMASK,
346 port + sc->phy_base, MII_OFFSET_ANY, 0);
347 if (err != 0)
348 return (err);
349
350 return (0);
351 }
352
353 static int
e6000sw_attach(device_t dev)354 e6000sw_attach(device_t dev)
355 {
356 e6000sw_softc_t *sc;
357 phandle_t child;
358 int err, port;
359 uint32_t reg;
360
361 err = 0;
362 sc = device_get_softc(dev);
363
364 if (sc->multi_chip)
365 device_printf(dev, "multi-chip addressing mode\n");
366 else
367 device_printf(dev, "single-chip addressing mode\n");
368
369 sx_init(&sc->sx, "e6000sw");
370
371 E6000SW_LOCK(sc);
372 e6000sw_setup(dev, sc);
373
374 for (child = OF_child(sc->node); child != 0; child = OF_peer(child)) {
375 err = e6000sw_parse_child_fdt(sc, child, &port);
376 if (err != 0) {
377 device_printf(sc->dev, "failed to parse DTS\n");
378 goto out_fail;
379 }
380
381 /* Port is in use. */
382 sc->ports_mask |= (1 << port);
383
384 err = e6000sw_init_interface(sc, port);
385 if (err != 0) {
386 device_printf(sc->dev, "failed to init interface\n");
387 goto out_fail;
388 }
389
390 if (e6000sw_is_fixedport(sc, port)) {
391 /* Link must be down to change speed force value. */
392 reg = e6000sw_readreg(sc, REG_PORT(port), PSC_CONTROL);
393 reg &= ~PSC_CONTROL_LINK_UP;
394 reg |= PSC_CONTROL_FORCED_LINK;
395 e6000sw_writereg(sc, REG_PORT(port), PSC_CONTROL, reg);
396
397 /*
398 * Force speed, full-duplex, EEE off and flow-control
399 * on.
400 */
401 if (e6000sw_is_fixed25port(sc, port))
402 reg = PSC_CONTROL_SPD2500;
403 else
404 reg = PSC_CONTROL_SPD1000;
405 reg |= PSC_CONTROL_FORCED_DPX | PSC_CONTROL_FULLDPX |
406 PSC_CONTROL_FORCED_LINK | PSC_CONTROL_LINK_UP |
407 PSC_CONTROL_FORCED_FC | PSC_CONTROL_FC_ON |
408 PSC_CONTROL_FORCED_SPD;
409 if (MVSWITCH(sc, MV88E6141) || MVSWITCH(sc, MV88E6341))
410 reg |= PSC_CONTROL_FORCED_EEE;
411 e6000sw_writereg(sc, REG_PORT(port), PSC_CONTROL, reg);
412 }
413
414 /* Don't attach miibus at CPU/fixed ports */
415 if (!e6000sw_is_phyport(sc, port))
416 continue;
417
418 err = e6000sw_attach_miibus(sc, port);
419 if (err != 0) {
420 device_printf(sc->dev, "failed to attach miibus\n");
421 goto out_fail;
422 }
423 }
424
425 etherswitch_info.es_nports = sc->num_ports;
426
427 /* Default to port vlan. */
428 e6000sw_port_vlan_conf(sc);
429 E6000SW_UNLOCK(sc);
430
431 bus_generic_probe(dev);
432 bus_generic_attach(dev);
433
434 kproc_create(e6000sw_tick, sc, &sc->kproc, 0, 0, "e6000sw tick kproc");
435
436 return (0);
437
438 out_fail:
439 E6000SW_UNLOCK(sc);
440 e6000sw_detach(dev);
441
442 return (err);
443 }
444
445 static __inline int
e6000sw_poll_done(e6000sw_softc_t * sc)446 e6000sw_poll_done(e6000sw_softc_t *sc)
447 {
448 int i;
449
450 for (i = 0; i < E6000SW_SMI_TIMEOUT; i++) {
451
452 if ((e6000sw_readreg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG) &
453 (1 << PHY_CMD_SMI_BUSY)) == 0)
454 return (0);
455
456 pause("e6000sw PHY poll", hz/1000);
457 }
458
459 return (ETIMEDOUT);
460 }
461
462 /*
463 * PHY registers are paged. Put page index in reg 22 (accessible from every
464 * page), then access specific register.
465 */
466 static int
e6000sw_readphy(device_t dev,int phy,int reg)467 e6000sw_readphy(device_t dev, int phy, int reg)
468 {
469 e6000sw_softc_t *sc;
470 uint32_t val;
471 int err;
472
473 sc = device_get_softc(dev);
474 if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) {
475 device_printf(dev, "Wrong register address.\n");
476 return (EINVAL);
477 }
478
479 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
480
481 err = e6000sw_poll_done(sc);
482 if (err != 0) {
483 device_printf(dev, "Timeout while waiting for switch\n");
484 return (err);
485 }
486
487 val = 1 << PHY_CMD_SMI_BUSY;
488 val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE;
489 val |= PHY_CMD_OPCODE_READ << PHY_CMD_OPCODE;
490 val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK;
491 val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK;
492 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val);
493
494 err = e6000sw_poll_done(sc);
495 if (err != 0) {
496 device_printf(dev, "Timeout while waiting for switch\n");
497 return (err);
498 }
499
500 val = e6000sw_readreg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG);
501
502 return (val & PHY_DATA_MASK);
503 }
504
505 static int
e6000sw_writephy(device_t dev,int phy,int reg,int data)506 e6000sw_writephy(device_t dev, int phy, int reg, int data)
507 {
508 e6000sw_softc_t *sc;
509 uint32_t val;
510 int err;
511
512 sc = device_get_softc(dev);
513 if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) {
514 device_printf(dev, "Wrong register address.\n");
515 return (EINVAL);
516 }
517
518 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
519
520 err = e6000sw_poll_done(sc);
521 if (err != 0) {
522 device_printf(dev, "Timeout while waiting for switch\n");
523 return (err);
524 }
525
526 val = 1 << PHY_CMD_SMI_BUSY;
527 val |= PHY_CMD_MODE_MDIO << PHY_CMD_MODE;
528 val |= PHY_CMD_OPCODE_WRITE << PHY_CMD_OPCODE;
529 val |= (reg << PHY_CMD_REG_ADDR) & PHY_CMD_REG_ADDR_MASK;
530 val |= (phy << PHY_CMD_DEV_ADDR) & PHY_CMD_DEV_ADDR_MASK;
531 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG,
532 data & PHY_DATA_MASK);
533 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG, val);
534
535 err = e6000sw_poll_done(sc);
536 if (err != 0)
537 device_printf(dev, "Timeout while waiting for switch\n");
538
539 return (err);
540 }
541
542 static int
e6000sw_detach(device_t dev)543 e6000sw_detach(device_t dev)
544 {
545 int phy;
546 e6000sw_softc_t *sc;
547
548 sc = device_get_softc(dev);
549 bus_generic_detach(dev);
550 sx_destroy(&sc->sx);
551 for (phy = 0; phy < sc->num_ports; phy++) {
552 if (sc->miibus[phy] != NULL)
553 device_delete_child(dev, sc->miibus[phy]);
554 if (sc->ifp[phy] != NULL)
555 if_free(sc->ifp[phy]);
556 if (sc->ifname[phy] != NULL)
557 free(sc->ifname[phy], M_E6000SW);
558 }
559
560 return (0);
561 }
562
563 static etherswitch_info_t*
e6000sw_getinfo(device_t dev)564 e6000sw_getinfo(device_t dev)
565 {
566
567 return (ðerswitch_info);
568 }
569
570 static int
e6000sw_getconf(device_t dev,etherswitch_conf_t * conf)571 e6000sw_getconf(device_t dev, etherswitch_conf_t *conf)
572 {
573 struct e6000sw_softc *sc;
574
575 /* Return the VLAN mode. */
576 sc = device_get_softc(dev);
577 conf->cmd = ETHERSWITCH_CONF_VLAN_MODE;
578 conf->vlan_mode = sc->vlan_mode;
579
580 return (0);
581 }
582
583 static void
e6000sw_lock(device_t dev)584 e6000sw_lock(device_t dev)
585 {
586 struct e6000sw_softc *sc;
587
588 sc = device_get_softc(dev);
589
590 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
591 E6000SW_LOCK(sc);
592 }
593
594 static void
e6000sw_unlock(device_t dev)595 e6000sw_unlock(device_t dev)
596 {
597 struct e6000sw_softc *sc;
598
599 sc = device_get_softc(dev);
600
601 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
602 E6000SW_UNLOCK(sc);
603 }
604
605 static int
e6000sw_getport(device_t dev,etherswitch_port_t * p)606 e6000sw_getport(device_t dev, etherswitch_port_t *p)
607 {
608 struct mii_data *mii;
609 int err;
610 struct ifmediareq *ifmr;
611
612 e6000sw_softc_t *sc = device_get_softc(dev);
613 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
614
615 if (p->es_port >= sc->num_ports || p->es_port < 0)
616 return (EINVAL);
617 if (!e6000sw_is_portenabled(sc, p->es_port))
618 return (0);
619
620 err = 0;
621 E6000SW_LOCK(sc);
622 e6000sw_get_pvid(sc, p->es_port, &p->es_pvid);
623
624 if (e6000sw_is_fixedport(sc, p->es_port)) {
625 if (e6000sw_is_cpuport(sc, p->es_port))
626 p->es_flags |= ETHERSWITCH_PORT_CPU;
627 ifmr = &p->es_ifmr;
628 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
629 ifmr->ifm_count = 0;
630 if (e6000sw_is_fixed25port(sc, p->es_port))
631 ifmr->ifm_active = IFM_2500_T;
632 else
633 ifmr->ifm_active = IFM_1000_T;
634 ifmr->ifm_active |= IFM_ETHER | IFM_FDX;
635 ifmr->ifm_current = ifmr->ifm_active;
636 ifmr->ifm_mask = 0;
637 } else {
638 mii = e6000sw_miiforphy(sc, p->es_port);
639 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr,
640 &mii->mii_media, SIOCGIFMEDIA);
641 }
642 E6000SW_UNLOCK(sc);
643
644 return (err);
645 }
646
647 static int
e6000sw_setport(device_t dev,etherswitch_port_t * p)648 e6000sw_setport(device_t dev, etherswitch_port_t *p)
649 {
650 e6000sw_softc_t *sc;
651 int err;
652 struct mii_data *mii;
653
654 sc = device_get_softc(dev);
655 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
656
657 if (p->es_port >= sc->num_ports || p->es_port < 0)
658 return (EINVAL);
659 if (!e6000sw_is_portenabled(sc, p->es_port))
660 return (0);
661
662 err = 0;
663 E6000SW_LOCK(sc);
664 if (p->es_pvid != 0)
665 e6000sw_set_pvid(sc, p->es_port, p->es_pvid);
666 if (e6000sw_is_phyport(sc, p->es_port)) {
667 mii = e6000sw_miiforphy(sc, p->es_port);
668 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr, &mii->mii_media,
669 SIOCSIFMEDIA);
670 }
671 E6000SW_UNLOCK(sc);
672
673 return (err);
674 }
675
676 /*
677 * Registers in this switch are divided into sections, specified in
678 * documentation. So as to access any of them, section index and reg index
679 * is necessary. etherswitchcfg uses only one variable, so indexes were
680 * compressed into addr_reg: 32 * section_index + reg_index.
681 */
682 static int
e6000sw_readreg_wrapper(device_t dev,int addr_reg)683 e6000sw_readreg_wrapper(device_t dev, int addr_reg)
684 {
685
686 if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) ||
687 (addr_reg < (REG_PORT(0) * 32))) {
688 device_printf(dev, "Wrong register address.\n");
689 return (EINVAL);
690 }
691
692 return (e6000sw_readreg(device_get_softc(dev), addr_reg / 32,
693 addr_reg % 32));
694 }
695
696 static int
e6000sw_writereg_wrapper(device_t dev,int addr_reg,int val)697 e6000sw_writereg_wrapper(device_t dev, int addr_reg, int val)
698 {
699
700 if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) ||
701 (addr_reg < (REG_PORT(0) * 32))) {
702 device_printf(dev, "Wrong register address.\n");
703 return (EINVAL);
704 }
705 e6000sw_writereg(device_get_softc(dev), addr_reg / 5,
706 addr_reg % 32, val);
707
708 return (0);
709 }
710
711 /*
712 * These wrappers are necessary because PHY accesses from etherswitchcfg
713 * need to be synchronized with locks, while miibus PHY accesses do not.
714 */
715 static int
e6000sw_readphy_wrapper(device_t dev,int phy,int reg)716 e6000sw_readphy_wrapper(device_t dev, int phy, int reg)
717 {
718 e6000sw_softc_t *sc;
719 int ret;
720
721 sc = device_get_softc(dev);
722 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
723
724 E6000SW_LOCK(sc);
725 ret = e6000sw_readphy(dev, phy, reg);
726 E6000SW_UNLOCK(sc);
727
728 return (ret);
729 }
730
731 static int
e6000sw_writephy_wrapper(device_t dev,int phy,int reg,int data)732 e6000sw_writephy_wrapper(device_t dev, int phy, int reg, int data)
733 {
734 e6000sw_softc_t *sc;
735 int ret;
736
737 sc = device_get_softc(dev);
738 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
739
740 E6000SW_LOCK(sc);
741 ret = e6000sw_writephy(dev, phy, reg, data);
742 E6000SW_UNLOCK(sc);
743
744 return (ret);
745 }
746
747 /*
748 * setvgroup/getvgroup called from etherswitchfcg need to be locked,
749 * while internal calls do not.
750 */
751 static int
e6000sw_setvgroup_wrapper(device_t dev,etherswitch_vlangroup_t * vg)752 e6000sw_setvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg)
753 {
754 e6000sw_softc_t *sc;
755 int ret;
756
757 sc = device_get_softc(dev);
758 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
759
760 E6000SW_LOCK(sc);
761 ret = e6000sw_setvgroup(dev, vg);
762 E6000SW_UNLOCK(sc);
763
764 return (ret);
765 }
766
767 static int
e6000sw_getvgroup_wrapper(device_t dev,etherswitch_vlangroup_t * vg)768 e6000sw_getvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg)
769 {
770 e6000sw_softc_t *sc;
771 int ret;
772
773 sc = device_get_softc(dev);
774 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
775
776 E6000SW_LOCK(sc);
777 ret = e6000sw_getvgroup(dev, vg);
778 E6000SW_UNLOCK(sc);
779
780 return (ret);
781 }
782
783 static __inline void
e6000sw_port_vlan_assign(e6000sw_softc_t * sc,int port,uint32_t fid,uint32_t members)784 e6000sw_port_vlan_assign(e6000sw_softc_t *sc, int port, uint32_t fid,
785 uint32_t members)
786 {
787 uint32_t reg;
788
789 reg = e6000sw_readreg(sc, REG_PORT(port), PORT_VLAN_MAP);
790 reg &= ~PORT_VLAN_MAP_TABLE_MASK;
791 reg &= ~PORT_VLAN_MAP_FID_MASK;
792 reg |= members & PORT_VLAN_MAP_TABLE_MASK & ~(1 << port);
793 reg |= (fid << PORT_VLAN_MAP_FID) & PORT_VLAN_MAP_FID_MASK;
794 e6000sw_writereg(sc, REG_PORT(port), PORT_VLAN_MAP, reg);
795 reg = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL_1);
796 reg &= ~PORT_CONTROL_1_FID_MASK;
797 reg |= (fid >> 4) & PORT_CONTROL_1_FID_MASK;
798 e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL_1, reg);
799 }
800
801 static int
e6000sw_set_port_vlan(e6000sw_softc_t * sc,etherswitch_vlangroup_t * vg)802 e6000sw_set_port_vlan(e6000sw_softc_t *sc, etherswitch_vlangroup_t *vg)
803 {
804 uint32_t port;
805
806 port = vg->es_vlangroup;
807 if (port > sc->num_ports)
808 return (EINVAL);
809
810 if (vg->es_member_ports != vg->es_untagged_ports) {
811 device_printf(sc->dev, "Tagged ports not supported.\n");
812 return (EINVAL);
813 }
814
815 e6000sw_port_vlan_assign(sc, port, port + 1, vg->es_untagged_ports);
816 vg->es_vid = port | ETHERSWITCH_VID_VALID;
817
818 return (0);
819 }
820
821 static int
e6000sw_setvgroup(device_t dev,etherswitch_vlangroup_t * vg)822 e6000sw_setvgroup(device_t dev, etherswitch_vlangroup_t *vg)
823 {
824 e6000sw_softc_t *sc;
825
826 sc = device_get_softc(dev);
827 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
828
829 if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT)
830 return (e6000sw_set_port_vlan(sc, vg));
831
832 return (EINVAL);
833 }
834
835 static int
e6000sw_get_port_vlan(e6000sw_softc_t * sc,etherswitch_vlangroup_t * vg)836 e6000sw_get_port_vlan(e6000sw_softc_t *sc, etherswitch_vlangroup_t *vg)
837 {
838 uint32_t port, reg;
839
840 port = vg->es_vlangroup;
841 if (port > sc->num_ports)
842 return (EINVAL);
843
844 if (!e6000sw_is_portenabled(sc, port)) {
845 vg->es_vid = port;
846 return (0);
847 }
848
849 reg = e6000sw_readreg(sc, REG_PORT(port), PORT_VLAN_MAP);
850 vg->es_untagged_ports = vg->es_member_ports =
851 reg & PORT_VLAN_MAP_TABLE_MASK;
852 vg->es_vid = port | ETHERSWITCH_VID_VALID;
853 vg->es_fid = (reg & PORT_VLAN_MAP_FID_MASK) >> PORT_VLAN_MAP_FID;
854 reg = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL_1);
855 vg->es_fid |= (reg & PORT_CONTROL_1_FID_MASK) << 4;
856
857 return (0);
858 }
859
860 static int
e6000sw_getvgroup(device_t dev,etherswitch_vlangroup_t * vg)861 e6000sw_getvgroup(device_t dev, etherswitch_vlangroup_t *vg)
862 {
863 e6000sw_softc_t *sc;
864
865 sc = device_get_softc(dev);
866 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
867
868 if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT)
869 return (e6000sw_get_port_vlan(sc, vg));
870
871 return (EINVAL);
872 }
873
874 static __inline struct mii_data*
e6000sw_miiforphy(e6000sw_softc_t * sc,unsigned int phy)875 e6000sw_miiforphy(e6000sw_softc_t *sc, unsigned int phy)
876 {
877
878 if (!e6000sw_is_phyport(sc, phy))
879 return (NULL);
880
881 return (device_get_softc(sc->miibus[phy]));
882 }
883
884 static int
e6000sw_ifmedia_upd(struct ifnet * ifp)885 e6000sw_ifmedia_upd(struct ifnet *ifp)
886 {
887 e6000sw_softc_t *sc;
888 struct mii_data *mii;
889
890 sc = ifp->if_softc;
891 mii = e6000sw_miiforphy(sc, ifp->if_dunit);
892 if (mii == NULL)
893 return (ENXIO);
894 mii_mediachg(mii);
895
896 return (0);
897 }
898
899 static void
e6000sw_ifmedia_sts(struct ifnet * ifp,struct ifmediareq * ifmr)900 e6000sw_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
901 {
902 e6000sw_softc_t *sc;
903 struct mii_data *mii;
904
905 sc = ifp->if_softc;
906 mii = e6000sw_miiforphy(sc, ifp->if_dunit);
907
908 if (mii == NULL)
909 return;
910
911 mii_pollstat(mii);
912 ifmr->ifm_active = mii->mii_media_active;
913 ifmr->ifm_status = mii->mii_media_status;
914 }
915
916 static int
e6000sw_smi_waitready(e6000sw_softc_t * sc,int phy)917 e6000sw_smi_waitready(e6000sw_softc_t *sc, int phy)
918 {
919 int i;
920
921 for (i = 0; i < E6000SW_SMI_TIMEOUT; i++) {
922 if ((MDIO_READ(sc->dev, phy, SMI_CMD) & SMI_CMD_BUSY) == 0)
923 return (0);
924 DELAY(1);
925 }
926
927 return (1);
928 }
929
930 static __inline uint32_t
e6000sw_readreg(e6000sw_softc_t * sc,int addr,int reg)931 e6000sw_readreg(e6000sw_softc_t *sc, int addr, int reg)
932 {
933
934 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
935
936 if (!sc->multi_chip)
937 return (MDIO_READ(sc->dev, addr, reg) & 0xffff);
938
939 if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
940 printf("e6000sw: readreg timeout\n");
941 return (0xffff);
942 }
943 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD,
944 SMI_CMD_OP_READ | (addr << 5) | reg);
945 if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
946 printf("e6000sw: readreg timeout\n");
947 return (0xffff);
948 }
949
950 return (MDIO_READ(sc->dev, sc->sw_addr, SMI_DATA) & 0xffff);
951 }
952
953 static __inline void
e6000sw_writereg(e6000sw_softc_t * sc,int addr,int reg,int val)954 e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg, int val)
955 {
956
957 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
958
959 if (!sc->multi_chip) {
960 MDIO_WRITE(sc->dev, addr, reg, val);
961 return;
962 }
963
964 if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
965 printf("e6000sw: readreg timeout\n");
966 return;
967 }
968 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_DATA, val);
969 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD,
970 SMI_CMD_OP_WRITE | (addr << 5) | reg);
971 if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
972 printf("e6000sw: readreg timeout\n");
973 return;
974 }
975 }
976
977 static __inline bool
e6000sw_is_cpuport(e6000sw_softc_t * sc,int port)978 e6000sw_is_cpuport(e6000sw_softc_t *sc, int port)
979 {
980
981 return ((sc->cpuports_mask & (1 << port)) ? true : false);
982 }
983
984 static __inline bool
e6000sw_is_fixedport(e6000sw_softc_t * sc,int port)985 e6000sw_is_fixedport(e6000sw_softc_t *sc, int port)
986 {
987
988 return ((sc->fixed_mask & (1 << port)) ? true : false);
989 }
990
991 static __inline bool
e6000sw_is_fixed25port(e6000sw_softc_t * sc,int port)992 e6000sw_is_fixed25port(e6000sw_softc_t *sc, int port)
993 {
994
995 return ((sc->fixed25_mask & (1 << port)) ? true : false);
996 }
997
998 static __inline bool
e6000sw_is_phyport(e6000sw_softc_t * sc,int port)999 e6000sw_is_phyport(e6000sw_softc_t *sc, int port)
1000 {
1001 uint32_t phy_mask;
1002 phy_mask = ~(sc->fixed_mask | sc->cpuports_mask);
1003
1004 return ((phy_mask & (1 << port)) ? true : false);
1005 }
1006
1007 static __inline bool
e6000sw_is_portenabled(e6000sw_softc_t * sc,int port)1008 e6000sw_is_portenabled(e6000sw_softc_t *sc, int port)
1009 {
1010
1011 return ((sc->ports_mask & (1 << port)) ? true : false);
1012 }
1013
1014 static __inline int
e6000sw_set_pvid(e6000sw_softc_t * sc,int port,int pvid)1015 e6000sw_set_pvid(e6000sw_softc_t *sc, int port, int pvid)
1016 {
1017
1018 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, pvid &
1019 PORT_VID_DEF_VID_MASK);
1020
1021 return (0);
1022 }
1023
1024 static __inline int
e6000sw_get_pvid(e6000sw_softc_t * sc,int port,int * pvid)1025 e6000sw_get_pvid(e6000sw_softc_t *sc, int port, int *pvid)
1026 {
1027
1028 if (pvid == NULL)
1029 return (ENXIO);
1030
1031 *pvid = e6000sw_readreg(sc, REG_PORT(port), PORT_VID) &
1032 PORT_VID_DEF_VID_MASK;
1033
1034 return (0);
1035 }
1036
1037 /*
1038 * Convert port status to ifmedia.
1039 */
1040 static void
e6000sw_update_ifmedia(uint16_t portstatus,u_int * media_status,u_int * media_active)1041 e6000sw_update_ifmedia(uint16_t portstatus, u_int *media_status, u_int *media_active)
1042 {
1043 *media_active = IFM_ETHER;
1044 *media_status = IFM_AVALID;
1045
1046 if ((portstatus & PORT_STATUS_LINK_MASK) != 0)
1047 *media_status |= IFM_ACTIVE;
1048 else {
1049 *media_active |= IFM_NONE;
1050 return;
1051 }
1052
1053 switch (portstatus & PORT_STATUS_SPEED_MASK) {
1054 case PORT_STATUS_SPEED_10:
1055 *media_active |= IFM_10_T;
1056 break;
1057 case PORT_STATUS_SPEED_100:
1058 *media_active |= IFM_100_TX;
1059 break;
1060 case PORT_STATUS_SPEED_1000:
1061 *media_active |= IFM_1000_T;
1062 break;
1063 }
1064
1065 if ((portstatus & PORT_STATUS_DUPLEX_MASK) == 0)
1066 *media_active |= IFM_FDX;
1067 else
1068 *media_active |= IFM_HDX;
1069 }
1070
1071 static void
e6000sw_tick(void * arg)1072 e6000sw_tick (void *arg)
1073 {
1074 e6000sw_softc_t *sc;
1075 struct mii_data *mii;
1076 struct mii_softc *miisc;
1077 uint16_t portstatus;
1078 int port;
1079
1080 sc = arg;
1081
1082 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
1083
1084 for (;;) {
1085 E6000SW_LOCK(sc);
1086 for (port = 0; port < sc->num_ports; port++) {
1087 /* Tick only on PHY ports */
1088 if (!e6000sw_is_portenabled(sc, port) ||
1089 !e6000sw_is_phyport(sc, port))
1090 continue;
1091
1092 mii = e6000sw_miiforphy(sc, port);
1093 if (mii == NULL)
1094 continue;
1095
1096 portstatus = e6000sw_readreg(sc, REG_PORT(port),
1097 PORT_STATUS);
1098
1099 e6000sw_update_ifmedia(portstatus,
1100 &mii->mii_media_status, &mii->mii_media_active);
1101
1102 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
1103 if (IFM_INST(mii->mii_media.ifm_cur->ifm_media)
1104 != miisc->mii_inst)
1105 continue;
1106 mii_phy_update(miisc, MII_POLLSTAT);
1107 }
1108 }
1109 E6000SW_UNLOCK(sc);
1110 pause("e6000sw tick", 1000);
1111 }
1112 }
1113
1114 static void
e6000sw_setup(device_t dev,e6000sw_softc_t * sc)1115 e6000sw_setup(device_t dev, e6000sw_softc_t *sc)
1116 {
1117 uint16_t atu_ctrl, atu_age;
1118
1119 /* Set aging time */
1120 e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL,
1121 (E6000SW_DEFAULT_AGETIME << ATU_CONTROL_AGETIME) |
1122 (1 << ATU_CONTROL_LEARN2ALL));
1123
1124 /* Send all with specific mac address to cpu port */
1125 e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_2x, MGMT_EN_ALL);
1126 e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_0x, MGMT_EN_ALL);
1127
1128 /* Disable Remote Management */
1129 e6000sw_writereg(sc, REG_GLOBAL, SWITCH_GLOBAL_CONTROL2, 0);
1130
1131 /* Disable loopback filter and flow control messages */
1132 e6000sw_writereg(sc, REG_GLOBAL2, SWITCH_MGMT,
1133 SWITCH_MGMT_PRI_MASK |
1134 (1 << SWITCH_MGMT_RSVD2CPU) |
1135 SWITCH_MGMT_FC_PRI_MASK |
1136 (1 << SWITCH_MGMT_FORCEFLOW));
1137
1138 e6000sw_atu_flush(dev, sc, NO_OPERATION);
1139 e6000sw_atu_mac_table(dev, sc, NULL, NO_OPERATION);
1140 e6000sw_set_atustat(dev, sc, 0, COUNT_ALL);
1141
1142 /* Set ATU AgeTime to 15 seconds */
1143 atu_age = 1;
1144
1145 atu_ctrl = e6000sw_readreg(sc, REG_GLOBAL, ATU_CONTROL);
1146
1147 /* Set new AgeTime field */
1148 atu_ctrl &= ~ATU_CONTROL_AGETIME_MASK;
1149 e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL, atu_ctrl |
1150 (atu_age << ATU_CONTROL_AGETIME));
1151 }
1152
1153 static void
e6000sw_port_vlan_conf(e6000sw_softc_t * sc)1154 e6000sw_port_vlan_conf(e6000sw_softc_t *sc)
1155 {
1156 int i, port, ret;
1157 uint32_t members;
1158
1159 /* Disable all ports */
1160 for (port = 0; port < sc->num_ports; port++) {
1161 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL);
1162 e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL,
1163 (ret & ~PORT_CONTROL_ENABLE));
1164 }
1165
1166 /* Set port priority */
1167 for (port = 0; port < sc->num_ports; port++) {
1168 if (!e6000sw_is_portenabled(sc, port))
1169 continue;
1170 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID);
1171 ret &= ~PORT_VID_PRIORITY_MASK;
1172 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret);
1173 }
1174
1175 /* Set VID map */
1176 for (port = 0; port < sc->num_ports; port++) {
1177 if (!e6000sw_is_portenabled(sc, port))
1178 continue;
1179 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_VID);
1180 ret &= ~PORT_VID_DEF_VID_MASK;
1181 ret |= (port + 1);
1182 e6000sw_writereg(sc, REG_PORT(port), PORT_VID, ret);
1183 }
1184
1185 /* Enable all ports */
1186 for (port = 0; port < sc->num_ports; port++) {
1187 if (!e6000sw_is_portenabled(sc, port))
1188 continue;
1189 ret = e6000sw_readreg(sc, REG_PORT(port), PORT_CONTROL);
1190 e6000sw_writereg(sc, REG_PORT(port), PORT_CONTROL,
1191 (ret | PORT_CONTROL_ENABLE));
1192 }
1193
1194 /* Set VLAN mode. */
1195 sc->vlan_mode = ETHERSWITCH_VLAN_PORT;
1196 etherswitch_info.es_nvlangroups = sc->num_ports;
1197 for (port = 0; port < sc->num_ports; port++) {
1198 members = 0;
1199 if (e6000sw_is_portenabled(sc, port)) {
1200 for (i = 0; i < sc->num_ports; i++) {
1201 if (i == port || !e6000sw_is_portenabled(sc, i))
1202 continue;
1203 members |= (1 << i);
1204 }
1205 }
1206 e6000sw_port_vlan_assign(sc, port, port + 1, members);
1207 }
1208 }
1209
1210 static void
e6000sw_set_atustat(device_t dev,e6000sw_softc_t * sc,int bin,int flag)1211 e6000sw_set_atustat(device_t dev, e6000sw_softc_t *sc, int bin, int flag)
1212 {
1213 uint16_t ret;
1214
1215 ret = e6000sw_readreg(sc, REG_GLOBAL2, ATU_STATS);
1216 e6000sw_writereg(sc, REG_GLOBAL2, ATU_STATS, (bin << ATU_STATS_BIN ) |
1217 (flag << ATU_STATS_FLAG));
1218 }
1219
1220 static int
e6000sw_atu_mac_table(device_t dev,e6000sw_softc_t * sc,struct atu_opt * atu,int flag)1221 e6000sw_atu_mac_table(device_t dev, e6000sw_softc_t *sc, struct atu_opt *atu,
1222 int flag)
1223 {
1224 uint16_t ret_opt;
1225 uint16_t ret_data;
1226 int retries;
1227
1228 if (flag == NO_OPERATION)
1229 return (0);
1230 else if ((flag & (LOAD_FROM_FIB | PURGE_FROM_FIB | GET_NEXT_IN_FIB |
1231 GET_VIOLATION_DATA | CLEAR_VIOLATION_DATA)) == 0) {
1232 device_printf(dev, "Wrong Opcode for ATU operation\n");
1233 return (EINVAL);
1234 }
1235
1236 ret_opt = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION);
1237
1238 if (ret_opt & ATU_UNIT_BUSY) {
1239 device_printf(dev, "ATU unit is busy, cannot access"
1240 "register\n");
1241 return (EBUSY);
1242 } else {
1243 if(flag & LOAD_FROM_FIB) {
1244 ret_data = e6000sw_readreg(sc, REG_GLOBAL, ATU_DATA);
1245 e6000sw_writereg(sc, REG_GLOBAL2, ATU_DATA, (ret_data &
1246 ~ENTRY_STATE));
1247 }
1248 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR01, atu->mac_01);
1249 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR23, atu->mac_23);
1250 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR45, atu->mac_45);
1251 e6000sw_writereg(sc, REG_GLOBAL, ATU_FID, atu->fid);
1252
1253 e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret_opt |
1254 ATU_UNIT_BUSY | flag));
1255
1256 retries = E6000SW_RETRIES;
1257 while (--retries & (e6000sw_readreg(sc, REG_GLOBAL,
1258 ATU_OPERATION) & ATU_UNIT_BUSY))
1259 DELAY(1);
1260
1261 if (retries == 0)
1262 device_printf(dev, "Timeout while flushing\n");
1263 else if (flag & GET_NEXT_IN_FIB) {
1264 atu->mac_01 = e6000sw_readreg(sc, REG_GLOBAL,
1265 ATU_MAC_ADDR01);
1266 atu->mac_23 = e6000sw_readreg(sc, REG_GLOBAL,
1267 ATU_MAC_ADDR23);
1268 atu->mac_45 = e6000sw_readreg(sc, REG_GLOBAL,
1269 ATU_MAC_ADDR45);
1270 }
1271 }
1272
1273 return (0);
1274 }
1275
1276 static int
e6000sw_atu_flush(device_t dev,e6000sw_softc_t * sc,int flag)1277 e6000sw_atu_flush(device_t dev, e6000sw_softc_t *sc, int flag)
1278 {
1279 uint16_t ret;
1280 int retries;
1281
1282 if (flag == NO_OPERATION)
1283 return (0);
1284
1285 ret = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION);
1286 if (ret & ATU_UNIT_BUSY) {
1287 device_printf(dev, "Atu unit is busy, cannot flush\n");
1288 return (EBUSY);
1289 } else {
1290 e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION, (ret |
1291 ATU_UNIT_BUSY | flag));
1292 retries = E6000SW_RETRIES;
1293 while (--retries & (e6000sw_readreg(sc, REG_GLOBAL,
1294 ATU_OPERATION) & ATU_UNIT_BUSY))
1295 DELAY(1);
1296
1297 if (retries == 0)
1298 device_printf(dev, "Timeout while flushing\n");
1299 }
1300
1301 return (0);
1302 }
1303