1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
3 */
4
5 #ifndef _ROC_DEV_PRIV_H
6 #define _ROC_DEV_PRIV_H
7
8 #define DEV_HWCAP_F_VF BIT_ULL(0) /* VF device */
9
10 #define RVU_PFVF_PF_SHIFT 10
11 #define RVU_PFVF_PF_MASK 0x3F
12 #define RVU_PFVF_FUNC_SHIFT 0
13 #define RVU_PFVF_FUNC_MASK 0x3FF
14 #define RVU_MAX_VF 64 /* RVU_PF_VFPF_MBOX_INT(0..1) */
15 #define RVU_MAX_INT_RETRY 3
16
17 /* PF/VF message handling timer */
18 #define VF_PF_MBOX_TIMER_MS (20 * 1000)
19
20 typedef struct {
21 /* 128 devices translate to two 64 bits dwords */
22 #define MAX_VFPF_DWORD_BITS 2
23 uint64_t bits[MAX_VFPF_DWORD_BITS];
24 } dev_intr_t;
25
26 /* Link status update callback */
27 typedef void (*link_info_t)(void *roc_nix,
28 struct cgx_link_user_info *link);
29
30 /* PTP info callback */
31 typedef int (*ptp_info_t)(void *roc_nix, bool enable);
32
33 /* Link status get callback */
34 typedef void (*link_status_get_t)(void *roc_nix,
35 struct cgx_link_user_info *link);
36
37 struct dev_ops {
38 link_info_t link_status_update;
39 ptp_info_t ptp_info_update;
40 link_status_get_t link_status_get;
41 };
42
43 #define dev_is_vf(dev) ((dev)->hwcap & DEV_HWCAP_F_VF)
44
45 static inline int
dev_get_vf(uint16_t pf_func)46 dev_get_vf(uint16_t pf_func)
47 {
48 return (((pf_func >> RVU_PFVF_FUNC_SHIFT) & RVU_PFVF_FUNC_MASK) - 1);
49 }
50
51 static inline int
dev_get_pf(uint16_t pf_func)52 dev_get_pf(uint16_t pf_func)
53 {
54 return (pf_func >> RVU_PFVF_PF_SHIFT) & RVU_PFVF_PF_MASK;
55 }
56
57 static inline int
dev_pf_func(int pf,int vf)58 dev_pf_func(int pf, int vf)
59 {
60 return (pf << RVU_PFVF_PF_SHIFT) | ((vf << RVU_PFVF_FUNC_SHIFT) + 1);
61 }
62
63 static inline int
dev_is_afvf(uint16_t pf_func)64 dev_is_afvf(uint16_t pf_func)
65 {
66 return !(pf_func & ~RVU_PFVF_FUNC_MASK);
67 }
68
69 struct dev {
70 uint16_t pf;
71 int16_t vf;
72 uint16_t pf_func;
73 uint8_t mbox_active;
74 bool drv_inited;
75 uint64_t active_vfs[MAX_VFPF_DWORD_BITS];
76 uintptr_t bar2;
77 uintptr_t bar4;
78 uintptr_t lmt_base;
79 struct mbox mbox_local;
80 struct mbox mbox_up;
81 struct mbox mbox_vfpf;
82 struct mbox mbox_vfpf_up;
83 dev_intr_t intr;
84 int timer_set; /* ~0 : no alarm handling */
85 uint64_t hwcap;
86 struct npa_lf npa;
87 struct mbox *mbox;
88 uint16_t maxvf;
89 struct dev_ops *ops;
90 void *roc_nix;
91 void *roc_cpt;
92 bool disable_shared_lmt; /* false(default): shared lmt mode enabled */
93 const struct plt_memzone *lmt_mz;
94 } __plt_cache_aligned;
95
96 struct npa {
97 struct plt_pci_device *pci_dev;
98 struct dev dev;
99 } __plt_cache_aligned;
100
101 extern uint16_t dev_rclk_freq;
102 extern uint16_t dev_sclk_freq;
103
104 int dev_init(struct dev *dev, struct plt_pci_device *pci_dev);
105 int dev_fini(struct dev *dev, struct plt_pci_device *pci_dev);
106 int dev_active_vfs(struct dev *dev);
107
108 int dev_irq_register(struct plt_intr_handle *intr_handle,
109 plt_intr_callback_fn cb, void *data, unsigned int vec);
110 void dev_irq_unregister(struct plt_intr_handle *intr_handle,
111 plt_intr_callback_fn cb, void *data, unsigned int vec);
112 int dev_irqs_disable(struct plt_intr_handle *intr_handle);
113
114 #endif /* _ROC_DEV_PRIV_H */
115