1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2010 Juli Mallett <[email protected]>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD$
29 */
30
31 /*
32 * Interface to the Marvell 88E61XX SMI/MDIO.
33 */
34
35 #include <sys/cdefs.h>
36 __FBSDID("$FreeBSD$");
37
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/bus.h>
41 #include <sys/endian.h>
42 #include <sys/kernel.h>
43 #include <sys/mbuf.h>
44 #include <sys/socket.h>
45
46 #include <dev/mii/mii.h>
47
48 #include <net/ethernet.h>
49 #include <net/if.h>
50 #include <net/if_var.h>
51
52 #include "wrapper-cvmx-includes.h"
53 #include "ethernet-headers.h"
54
55 #define MV88E61XX_SMI_REG_CMD 0x00 /* Indirect command register. */
56 #define MV88E61XX_SMI_CMD_BUSY 0x8000 /* Busy bit. */
57 #define MV88E61XX_SMI_CMD_22 0x1000 /* Clause 22 (default 45.) */
58 #define MV88E61XX_SMI_CMD_READ 0x0800 /* Read command. */
59 #define MV88E61XX_SMI_CMD_WRITE 0x0400 /* Write command. */
60 #define MV88E61XX_SMI_CMD_PHY(phy) (((phy) & 0x1f) << 5)
61 #define MV88E61XX_SMI_CMD_REG(reg) ((reg) & 0x1f)
62
63 #define MV88E61XX_SMI_REG_DAT 0x01 /* Indirect data register. */
64
65 static int cvm_oct_mv88e61xx_smi_read(struct ifnet *, int, int);
66 static void cvm_oct_mv88e61xx_smi_write(struct ifnet *, int, int, int);
67 static int cvm_oct_mv88e61xx_smi_wait(struct ifnet *);
68
69 int
cvm_oct_mv88e61xx_setup_device(struct ifnet * ifp)70 cvm_oct_mv88e61xx_setup_device(struct ifnet *ifp)
71 {
72 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
73
74 priv->mdio_read = cvm_oct_mv88e61xx_smi_read;
75 priv->mdio_write = cvm_oct_mv88e61xx_smi_write;
76 priv->phy_device = "mv88e61xxphy";
77
78 return (0);
79 }
80
81 static int
cvm_oct_mv88e61xx_smi_read(struct ifnet * ifp,int phy_id,int location)82 cvm_oct_mv88e61xx_smi_read(struct ifnet *ifp, int phy_id, int location)
83 {
84 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
85 int error;
86
87 error = cvm_oct_mv88e61xx_smi_wait(ifp);
88 if (error != 0)
89 return (0);
90
91 cvm_oct_mdio_write(ifp, priv->phy_id, MV88E61XX_SMI_REG_CMD,
92 MV88E61XX_SMI_CMD_BUSY | MV88E61XX_SMI_CMD_22 |
93 MV88E61XX_SMI_CMD_READ | MV88E61XX_SMI_CMD_PHY(phy_id) |
94 MV88E61XX_SMI_CMD_REG(location));
95
96 error = cvm_oct_mv88e61xx_smi_wait(ifp);
97 if (error != 0)
98 return (0);
99
100 return (cvm_oct_mdio_read(ifp, priv->phy_id, MV88E61XX_SMI_REG_DAT));
101 }
102
103 static void
cvm_oct_mv88e61xx_smi_write(struct ifnet * ifp,int phy_id,int location,int val)104 cvm_oct_mv88e61xx_smi_write(struct ifnet *ifp, int phy_id, int location, int val)
105 {
106 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
107
108 cvm_oct_mv88e61xx_smi_wait(ifp);
109 cvm_oct_mdio_write(ifp, priv->phy_id, MV88E61XX_SMI_REG_DAT, val);
110 cvm_oct_mdio_write(ifp, priv->phy_id, MV88E61XX_SMI_REG_CMD,
111 MV88E61XX_SMI_CMD_BUSY | MV88E61XX_SMI_CMD_22 |
112 MV88E61XX_SMI_CMD_WRITE | MV88E61XX_SMI_CMD_PHY(phy_id) |
113 MV88E61XX_SMI_CMD_REG(location));
114 cvm_oct_mv88e61xx_smi_wait(ifp);
115 }
116
117 static int
cvm_oct_mv88e61xx_smi_wait(struct ifnet * ifp)118 cvm_oct_mv88e61xx_smi_wait(struct ifnet *ifp)
119 {
120 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
121 uint16_t cmd;
122 unsigned i;
123
124 for (i = 0; i < 10000; i++) {
125 cmd = cvm_oct_mdio_read(ifp, priv->phy_id, MV88E61XX_SMI_REG_CMD);
126 if ((cmd & MV88E61XX_SMI_CMD_BUSY) == 0)
127 return (0);
128 }
129 return (ETIMEDOUT);
130 }
131