1 /*
2 * Copyright (c) 2000-2023 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28 /*
29 * @OSF_COPYRIGHT@
30 *
31 */
32
33 #ifndef I386_CPU_DATA
34 #define I386_CPU_DATA
35
36 #include <mach_assert.h>
37 #include <machine/atomic.h>
38 #include <machine/monotonic.h>
39
40 #include <kern/assert.h>
41 #include <kern/kern_types.h>
42 #include <kern/mpqueue.h>
43 #include <kern/queue.h>
44 #include <kern/processor.h>
45 #include <kern/pms.h>
46 #include <pexpert/pexpert.h>
47 #include <mach/i386/thread_status.h>
48 #include <mach/i386/vm_param.h>
49 #include <i386/locks.h>
50 #include <i386/rtclock_protos.h>
51 #include <i386/pmCPU.h>
52 #include <i386/cpu_topology.h>
53 #include <i386/seg.h>
54 #include <i386/mp.h>
55
56 #if CONFIG_VMX
57 #include <i386/vmx/vmx_cpu.h>
58 #endif
59
60 #include <san/kcov_data.h>
61
62 #include <machine/pal_routines.h>
63
64 /*
65 * Data structures referenced (anonymously) from per-cpu data:
66 */
67 struct cpu_cons_buffer;
68 struct cpu_desc_table;
69 struct mca_state;
70 struct prngContext;
71
72 /*
73 * Data structures embedded in per-cpu data:
74 */
75 typedef struct rtclock_timer {
76 mpqueue_head_t queue;
77 uint64_t deadline;
78 uint64_t when_set;
79 boolean_t has_expired;
80 } rtclock_timer_t;
81
82 typedef struct {
83 /* The 'u' suffixed fields store the double-mapped descriptor addresses */
84 struct x86_64_tss *cdi_ktssu;
85 struct x86_64_tss *cdi_ktssb;
86 x86_64_desc_register_t cdi_gdtu;
87 x86_64_desc_register_t cdi_gdtb;
88 x86_64_desc_register_t cdi_idtu;
89 x86_64_desc_register_t cdi_idtb;
90 struct real_descriptor *cdi_ldtu;
91 struct real_descriptor *cdi_ldtb;
92 vm_offset_t cdi_sstku;
93 vm_offset_t cdi_sstkb;
94 } cpu_desc_index_t;
95
96 typedef enum {
97 TASK_MAP_32BIT, /* 32-bit user, compatibility mode */
98 TASK_MAP_64BIT, /* 64-bit user thread, shared space */
99 } task_map_t;
100
101
102 /*
103 * This structure is used on entry into the (uber-)kernel on syscall from
104 * a 64-bit user. It contains the address of the machine state save area
105 * for the current thread and a temporary place to save the user's rsp
106 * before loading this address into rsp.
107 */
108 typedef struct {
109 addr64_t cu_isf; /* thread->pcb->iss.isf */
110 uint64_t cu_tmp; /* temporary scratch */
111 addr64_t cu_user_gs_base;
112 } cpu_uber_t;
113
114 typedef uint16_t pcid_t;
115 typedef uint8_t pcid_ref_t;
116
117 #define CPU_RTIME_BINS (12)
118 #define CPU_ITIME_BINS (CPU_RTIME_BINS)
119
120 #define MAX_TRACE_BTFRAMES (16)
121 typedef struct {
122 boolean_t pltype;
123 int plevel;
124 uint64_t plbt[MAX_TRACE_BTFRAMES];
125 } plrecord_t;
126
127 #if DEVELOPMENT || DEBUG
128
129 typedef struct {
130 int vector; /* Vector number of interrupt */
131 thread_t curthread; /* Current thread at the time of the interrupt */
132 uint64_t interrupted_pc;
133 int curpl; /* Current preemption level */
134 int curil; /* Current interrupt level */
135 uint64_t start_time_abs;
136 uint64_t duration;
137 uint64_t backtrace[MAX_TRACE_BTFRAMES];
138 } traptrace_entry_t;
139
140 #define TRAPTRACE_INVALID_INDEX (~0U)
141 #define DEFAULT_TRAPTRACE_ENTRIES_PER_CPU (16)
142 #define TRAPTRACE_MAX_ENTRIES_PER_CPU (256)
143 extern volatile int traptrace_enabled;
144 extern uint32_t traptrace_entries_per_cpu;
145 PERCPU_DECL(uint32_t, traptrace_next);
146 PERCPU_DECL(traptrace_entry_t * __unsafe_indexable, traptrace_ring);
147 #endif /* DEVELOPMENT || DEBUG */
148
149 /*
150 * Per-cpu data.
151 *
152 * Each processor has a per-cpu data area which is dereferenced through the
153 * current_cpu_datap() macro. For speed, the %gs segment is based here, and
154 * using this, inlines provides single-instruction access to frequently used
155 * members - such as get_cpu_number()/cpu_number(), and get_active_thread()/
156 * current_thread().
157 *
158 * Cpu data owned by another processor can be accessed using the
159 * cpu_datap(cpu_number) macro which uses the cpu_data_ptr[] array of per-cpu
160 * pointers.
161 */
162 typedef struct {
163 pcid_t cpu_pcid_free_hint;
164 #define PMAP_PCID_MAX_PCID (0x800)
165 pcid_ref_t cpu_pcid_refcounts[PMAP_PCID_MAX_PCID];
166 pmap_t cpu_pcid_last_pmap_dispatched[PMAP_PCID_MAX_PCID];
167 } pcid_cdata_t;
168
169 typedef struct cpu_data {
170 struct pal_cpu_data cpu_pal_data; /* PAL-specific data */
171 #define cpu_pd cpu_pal_data /* convenience alias */
172 struct cpu_data *cpu_this; /* pointer to myself */
173 vm_offset_t cpu_pcpu_base;
174 thread_t cpu_active_thread;
175 thread_t cpu_nthread;
176 int cpu_number; /* Logical CPU */
177 void *cpu_int_state; /* interrupt state */
178 vm_offset_t cpu_active_stack; /* kernel stack base */
179 vm_offset_t cpu_kernel_stack; /* kernel stack top */
180 vm_offset_t cpu_int_stack_top;
181 volatile int cpu_signals; /* IPI events */
182 volatile int cpu_prior_signals; /* Last set of events,
183 * debugging
184 */
185 ast_t cpu_pending_ast;
186 /*
187 * Note if rearranging fields:
188 * We want cpu_preemption_level on a different
189 * cache line than cpu_active_thread
190 * for optimizing mtx_spin phase.
191 */
192 int cpu_interrupt_level;
193 volatile int cpu_preemption_level;
194 volatile int cpu_running;
195 #if !CONFIG_CPU_COUNTERS
196 boolean_t cpu_fixed_pmcs_enabled;
197 #endif /* !CONFIG_CPU_COUNTERS */
198 rtclock_timer_t rtclock_timer;
199 volatile addr64_t cpu_active_cr3 __attribute((aligned(64)));
200 union {
201 volatile uint32_t cpu_tlb_invalid;
202 struct {
203 volatile uint16_t cpu_tlb_invalid_local;
204 volatile uint16_t cpu_tlb_invalid_global;
205 };
206 };
207 uint64_t cpu_ip_desc[2];
208 volatile task_map_t cpu_task_map;
209 volatile addr64_t cpu_task_cr3;
210 addr64_t cpu_kernel_cr3;
211 volatile addr64_t cpu_ucr3;
212 volatile addr64_t cpu_shadowtask_cr3;
213 boolean_t cpu_pagezero_mapped;
214 cpu_uber_t cpu_uber;
215 /* Double-mapped per-CPU exception stack address */
216 uintptr_t cd_estack;
217 int cpu_xstate;
218 int cpu_curtask_has_ldt;
219 int cpu_curthread_do_segchk;
220 /* Address of shadowed, partially mirrored CPU data structures located
221 * in the double mapped PML4
222 */
223 void *cd_shadow;
224 union {
225 volatile uint32_t cpu_tlb_invalid_count;
226 struct {
227 volatile uint16_t cpu_tlb_invalid_local_count;
228 volatile uint16_t cpu_tlb_invalid_global_count;
229 };
230 };
231
232 uint16_t cpu_tlb_gen_counts_local[MAX_CPUS];
233 uint16_t cpu_tlb_gen_counts_global[MAX_CPUS];
234
235 struct processor *cpu_processor;
236 struct real_descriptor *cpu_ldtp;
237 struct cpu_desc_table *cpu_desc_tablep;
238 cpu_desc_index_t cpu_desc_index;
239 int cpu_ldt;
240
241 #define HWINTCNT_SIZE 256
242 uint32_t cpu_hwIntCnt[HWINTCNT_SIZE]; /* Interrupt counts */
243 uint64_t cpu_hwIntpexits[HWINTCNT_SIZE];
244 uint64_t cpu_dr7; /* debug control register */
245 uint64_t cpu_int_event_time; /* intr entry/exit time */
246 pal_rtc_nanotime_t *cpu_nanotime; /* Nanotime info */
247 #if CONFIG_CPU_COUNTERS
248 /* double-buffered performance counter data */
249 uint64_t *cpu_kpc_buf[2];
250 /* PMC shadow and reload value buffers */
251 uint64_t *cpu_kpc_shadow;
252 uint64_t *cpu_kpc_reload;
253 struct mt_cpu cpu_monotonic;
254 #endif /* CONFIG_CPU_COUNTERS */
255 uint32_t cpu_pmap_pcid_enabled;
256 pcid_t cpu_active_pcid;
257 pcid_t cpu_last_pcid;
258 pcid_t cpu_kernel_pcid;
259 volatile pcid_ref_t *cpu_pmap_pcid_coherentp;
260 volatile pcid_ref_t *cpu_pmap_pcid_coherentp_kernel;
261 pcid_cdata_t *cpu_pcid_data;
262 #ifdef PCID_STATS
263 uint64_t cpu_pmap_pcid_flushes;
264 uint64_t cpu_pmap_pcid_preserves;
265 #endif
266 uint64_t cpu_aperf;
267 uint64_t cpu_mperf;
268 uint64_t cpu_c3res;
269 uint64_t cpu_c6res;
270 uint64_t cpu_c7res;
271 uint64_t cpu_itime_total;
272 uint64_t cpu_rtime_total;
273 uint64_t cpu_ixtime;
274 uint64_t cpu_idle_exits;
275 /*
276 * Note that the cacheline-copy mechanism uses the cpu_rtimes field in the shadow CPU
277 * structures to temporarily stash the code cacheline that includes the instruction
278 * pointer at the time of the fault (this field is otherwise unused in the shadow
279 * CPU structures).
280 */
281 uint64_t cpu_rtimes[CPU_RTIME_BINS];
282 uint64_t cpu_itimes[CPU_ITIME_BINS];
283 #if !CONFIG_CPU_COUNTERS
284 uint64_t cpu_cur_insns;
285 uint64_t cpu_cur_ucc;
286 uint64_t cpu_cur_urc;
287 #endif /* !CONFIG_CPU_COUNTERS */
288 uint64_t cpu_gpmcs[4];
289 uint64_t cpu_max_observed_int_latency;
290 int cpu_max_observed_int_latency_vector;
291 volatile boolean_t cpu_NMI_acknowledged;
292 uint64_t debugger_entry_time;
293 uint64_t debugger_ipi_time;
294 /* A separate nested interrupt stack flag, to account
295 * for non-nested interrupts arriving while on the interrupt stack
296 * Currently only occurs when AICPM enables interrupts on the
297 * interrupt stack during processor offlining.
298 */
299 uint32_t cpu_nested_istack;
300 uint32_t cpu_nested_istack_events;
301 x86_saved_state64_t *cpu_fatal_trap_state;
302 x86_saved_state64_t *cpu_post_fatal_trap_state;
303 #if CONFIG_VMX
304 vmx_cpu_t cpu_vmx; /* wonderful world of virtualization */
305 #endif
306 #if CONFIG_MCA
307 struct mca_state *cpu_mca_state; /* State at MC fault */
308 #endif
309 int cpu_type;
310 int cpu_subtype;
311 int cpu_threadtype;
312 boolean_t cpu_iflag;
313 boolean_t cpu_boot_complete;
314 int cpu_hibernate;
315 #define MAX_PREEMPTION_RECORDS (8)
316 #if DEVELOPMENT || DEBUG
317 int cpu_plri;
318 plrecord_t plrecords[MAX_PREEMPTION_RECORDS];
319 #endif
320 struct x86_lcpu lcpu;
321 int cpu_phys_number; /* Physical CPU */
322 cpu_id_t cpu_id; /* Platform Expert */
323 #if DEBUG
324 uint64_t cpu_entry_cr3;
325 uint64_t cpu_exit_cr3;
326 uint64_t cpu_pcid_last_cr3;
327 #endif
328 boolean_t cpu_rendezvous_in_progress;
329 #if CST_DEMOTION_DEBUG
330 /* Count of thread wakeups issued by this processor */
331 uint64_t cpu_wakeups_issued_total;
332 #endif
333 #if DEBUG || DEVELOPMENT
334 uint64_t tsc_sync_delta;
335 #endif
336 uint32_t cpu_soft_apic_lvt_timer;
337 #if CONFIG_KCOV
338 kcov_cpu_data_t cpu_kcov_data;
339 #endif
340 } cpu_data_t;
341
342 extern cpu_data_t *__single cpu_data_ptr[MAX_CPUS];
343
344 /*
345 * __SEG_GS marks %gs-relative operations:
346 * https://clang.llvm.org/docs/LanguageExtensions.html#memory-references-to-specified-segments
347 * https://gcc.gnu.org/onlinedocs/gcc/Named-Address-Spaces.html#x86-Named-Address-Spaces
348 */
349 #if defined(__SEG_GS)
350 // __seg_gs exists
351 #elif defined(__clang__)
352 #define __seg_gs __attribute__((address_space(256)))
353 #else
354 #error use a compiler that supports address spaces or __seg_gs
355 #endif
356
357 #define CPU_DATA() ((cpu_data_t __seg_gs *)0UL)
358
359 /*
360 * Everyone within the osfmk part of the kernel can use the fast
361 * inline versions of these routines. Everyone outside, must call
362 * the real thing,
363 */
364
365
366 /*
367 * The "volatile" flavor of current_thread() is intended for use by
368 * scheduler code which may need to update the thread pointer in the
369 * course of a context switch. Any call to current_thread() made
370 * prior to the thread pointer update should be safe to optimize away
371 * as it should be consistent with that thread's state to the extent
372 * the compiler can reason about it. Likewise, the context switch
373 * path will eventually result in an arbitrary branch to the new
374 * thread's pc, about which the compiler won't be able to reason.
375 * Thus any compile-time optimization of current_thread() calls made
376 * within the new thread should be safely encapsulated in its
377 * register/stack state. The volatile form therefore exists to cover
378 * the window between the thread pointer update and the branch to
379 * the new pc.
380 */
381 static inline thread_t
get_active_thread_volatile(void)382 get_active_thread_volatile(void)
383 {
384 return CPU_DATA()->cpu_active_thread;
385 }
386
387 static inline __attribute__((const)) thread_t
get_active_thread(void)388 get_active_thread(void)
389 {
390 return CPU_DATA()->cpu_active_thread;
391 }
392
393 #define current_thread_fast() get_active_thread()
394 #define current_thread_volatile() get_active_thread_volatile()
395
396 #define cpu_mode_is64bit() TRUE
397
398 static inline int
get_preemption_level(void)399 get_preemption_level(void)
400 {
401 return CPU_DATA()->cpu_preemption_level;
402 }
403 static inline int
get_interrupt_level(void)404 get_interrupt_level(void)
405 {
406 return CPU_DATA()->cpu_interrupt_level;
407 }
408 static inline int
get_cpu_number(void)409 get_cpu_number(void)
410 {
411 return CPU_DATA()->cpu_number;
412 }
413 static inline vm_offset_t
get_current_percpu_base(void)414 get_current_percpu_base(void)
415 {
416 return CPU_DATA()->cpu_pcpu_base;
417 }
418 static inline int
get_cpu_phys_number(void)419 get_cpu_phys_number(void)
420 {
421 return CPU_DATA()->cpu_phys_number;
422 }
423
424 static inline cpu_data_t *
current_cpu_datap(void)425 current_cpu_datap(void)
426 {
427 return CPU_DATA()->cpu_this;
428 }
429
430 /*
431 * Facility to diagnose preemption-level imbalances, which are otherwise
432 * challenging to debug. On each operation that enables or disables preemption,
433 * we record a backtrace into a per-CPU ring buffer, along with the current
434 * preemption level and operation type. Thus, if an imbalance is observed,
435 * one can examine these per-CPU records to determine which codepath failed
436 * to re-enable preemption, enabled premption without a corresponding
437 * disablement etc. The backtracer determines which stack is currently active,
438 * and uses that to perform bounds checks on unterminated stacks.
439 * To enable, sysctl -w machdep.pltrace=1 on DEVELOPMENT or DEBUG kernels (DRK '15)
440 * The bounds check currently doesn't account for non-default thread stack sizes.
441 */
442 #if DEVELOPMENT || DEBUG
443 static inline void
rbtrace_bt(uint64_t * __counted_by (maxframes)rets,int maxframes,cpu_data_t * cdata,uint64_t frameptr,bool use_cursp)444 rbtrace_bt(uint64_t *__counted_by(maxframes)rets, int maxframes,
445 cpu_data_t *cdata, uint64_t frameptr, bool use_cursp)
446 {
447 extern uint32_t low_intstack[]; /* bottom */
448 extern uint32_t low_eintstack[]; /* top */
449 extern char mp_slave_stack[];
450 int btidx = 0;
451
452 uint64_t kstackb, kstackt;
453
454 /* Obtain the 'current' program counter, initial backtrace
455 * element. This will also indicate if we were unable to
456 * trace further up the stack for some reason
457 */
458 if (use_cursp) {
459 __asm__ volatile ("leaq 1f(%%rip), %%rax; mov %%rax, %0\n1:"
460 : "=m" (rets[btidx++])
461 :
462 : "rax");
463 }
464
465 thread_t __single cplthread = cdata->cpu_active_thread;
466 if (cplthread) {
467 uintptr_t csp;
468 if (use_cursp == true) {
469 __asm__ __volatile__ ("movq %%rsp, %0": "=r" (csp):);
470 } else {
471 csp = frameptr;
472 }
473 /* Determine which stack we're on to populate stack bounds.
474 * We don't need to trace across stack boundaries for this
475 * routine.
476 */
477 kstackb = cdata->cpu_active_stack;
478 kstackt = kstackb + KERNEL_STACK_SIZE;
479 if (csp < kstackb || csp > kstackt) {
480 kstackt = cdata->cpu_kernel_stack;
481 kstackb = kstackt - KERNEL_STACK_SIZE;
482 if (csp < kstackb || csp > kstackt) {
483 kstackt = cdata->cpu_int_stack_top;
484 kstackb = kstackt - INTSTACK_SIZE;
485 if (csp < kstackb || csp > kstackt) {
486 kstackt = (uintptr_t)&low_eintstack;
487 kstackb = kstackt - INTSTACK_SIZE;
488 if (csp < kstackb || csp > kstackt) {
489 kstackb = (uintptr_t)&mp_slave_stack;
490 kstackt = kstackb + PAGE_SIZE;
491 } else {
492 kstackb = 0;
493 kstackt = 0;
494 }
495 }
496 }
497 }
498
499 if (__probable(kstackb && kstackt)) {
500 uint64_t *cfp = __unsafe_forge_single(uint64_t *, frameptr);
501 int rbbtf;
502
503 for (rbbtf = btidx; rbbtf < maxframes; rbbtf++) {
504 uint64_t cur_retp;
505 /*
506 * cfp == 0 is covered by the first comparison, and we're guaranteed
507 * that kstackb is non-zero from the containing if block. The os_add_overflow is
508 * necessary because it's not uncommon for backtraces to terminate with bogus
509 * frame pointers.
510 */
511 if (((uint64_t)cfp < kstackb) || os_add_overflow((uint64_t)cfp, sizeof(uint64_t), &cur_retp) || cur_retp >= kstackt) {
512 rets[rbbtf] = 0;
513 continue;
514 }
515 rets[rbbtf] = *(uint64_t *)cur_retp;
516 cfp = __unsafe_forge_single(uint64_t *, *cfp);
517 }
518 }
519 }
520 }
521
522 __attribute__((noinline))
523 static inline void
pltrace_internal(boolean_t enable)524 pltrace_internal(boolean_t enable)
525 {
526 cpu_data_t *cdata = current_cpu_datap();
527 int cpli = cdata->cpu_preemption_level;
528 int cplrecord = cdata->cpu_plri;
529 uint64_t *plbts;
530
531 assert(cpli >= 0);
532
533 cdata->plrecords[cplrecord].pltype = enable;
534 cdata->plrecords[cplrecord].plevel = cpli;
535
536 plbts = &cdata->plrecords[cplrecord].plbt[0];
537
538 cplrecord++;
539
540 if (cplrecord >= MAX_PREEMPTION_RECORDS) {
541 cplrecord = 0;
542 }
543
544 cdata->cpu_plri = cplrecord;
545
546 rbtrace_bt(plbts, MAX_TRACE_BTFRAMES - 1, cdata, (uint64_t)__builtin_frame_address(0), false);
547 }
548
549 extern int plctrace_enabled;
550
551 static inline uint32_t
traptrace_start(int vecnum,uint64_t ipc,uint64_t sabs,uint64_t frameptr)552 traptrace_start(int vecnum, uint64_t ipc, uint64_t sabs, uint64_t frameptr)
553 {
554 cpu_data_t *cdata;
555 uint32_t nextidx;
556 traptrace_entry_t *cur_traptrace_ring;
557 uint32_t *nextidxp;
558
559 if (__improbable(traptrace_enabled == 0 || traptrace_entries_per_cpu == 0)) {
560 return TRAPTRACE_INVALID_INDEX;
561 }
562
563 assert(ml_get_interrupts_enabled() == FALSE);
564 cdata = current_cpu_datap();
565 nextidxp = PERCPU_GET(traptrace_next);
566 nextidx = *nextidxp;
567 /* prevent nested interrupts from clobbering this record */
568 *nextidxp = (((nextidx + 1) >= (unsigned int)traptrace_entries_per_cpu) ? 0 : (nextidx + 1));
569
570 cur_traptrace_ring = __unsafe_forge_bidi_indexable(traptrace_entry_t *,
571 *PERCPU_GET(traptrace_ring), sizeof(traptrace_entry_t) * traptrace_entries_per_cpu);
572 cur_traptrace_ring[nextidx].vector = vecnum;
573 cur_traptrace_ring[nextidx].curthread = current_thread_fast();
574 cur_traptrace_ring[nextidx].interrupted_pc = ipc;
575 cur_traptrace_ring[nextidx].curpl = cdata->cpu_preemption_level;
576 cur_traptrace_ring[nextidx].curil = cdata->cpu_interrupt_level;
577 cur_traptrace_ring[nextidx].start_time_abs = sabs;
578 cur_traptrace_ring[nextidx].duration = ~0ULL;
579
580 rbtrace_bt(&cur_traptrace_ring[nextidx].backtrace[0],
581 MAX_TRACE_BTFRAMES - 1, cdata, frameptr, false);
582
583 assert(nextidx <= 0xFFFF);
584
585 /*
586 * encode the cpu number we're on because traptrace_end()
587 * might be called from a different CPU.
588 */
589 return ((uint32_t)cdata->cpu_number << 16) | nextidx;
590 }
591
592 static inline void
traptrace_end(uint32_t index,uint64_t eabs)593 traptrace_end(uint32_t index, uint64_t eabs)
594 {
595 traptrace_entry_t *__unsafe_indexable ring;
596
597 if (index != TRAPTRACE_INVALID_INDEX) {
598 ring = *PERCPU_GET_WITH_BASE(other_percpu_base(index >> 16),
599 traptrace_ring);
600 index &= 0XFFFF;
601 ring[index].duration = eabs - ring[index].start_time_abs;
602 }
603 }
604
605 #endif /* DEVELOPMENT || DEBUG */
606
607 __header_always_inline void
pltrace(boolean_t plenable)608 pltrace(boolean_t plenable)
609 {
610 #if DEVELOPMENT || DEBUG
611 if (__improbable(plctrace_enabled != 0)) {
612 pltrace_internal(plenable);
613 }
614 #else
615 (void)plenable;
616 #endif
617 }
618
619 static inline void
disable_preemption_internal(void)620 disable_preemption_internal(void)
621 {
622 assert(get_preemption_level() >= 0);
623
624 os_compiler_barrier();
625 CPU_DATA()->cpu_preemption_level++;
626 os_compiler_barrier();
627 pltrace(FALSE);
628 }
629
630 static inline void
enable_preemption_internal(void)631 enable_preemption_internal(void)
632 {
633 assert(get_preemption_level() > 0);
634 pltrace(TRUE);
635 os_compiler_barrier();
636 if (0 == --CPU_DATA()->cpu_preemption_level) {
637 kernel_preempt_check();
638 }
639 os_compiler_barrier();
640 }
641
642 static inline void
enable_preemption_no_check(void)643 enable_preemption_no_check(void)
644 {
645 assert(get_preemption_level() > 0);
646
647 pltrace(TRUE);
648 os_compiler_barrier();
649 CPU_DATA()->cpu_preemption_level--;
650 os_compiler_barrier();
651 }
652
653 static inline void
_enable_preemption_no_check(void)654 _enable_preemption_no_check(void)
655 {
656 enable_preemption_no_check();
657 }
658
659 static inline void
mp_disable_preemption(void)660 mp_disable_preemption(void)
661 {
662 disable_preemption_internal();
663 }
664
665 static inline void
_mp_disable_preemption(void)666 _mp_disable_preemption(void)
667 {
668 disable_preemption_internal();
669 }
670
671 static inline void
mp_enable_preemption(void)672 mp_enable_preemption(void)
673 {
674 enable_preemption_internal();
675 }
676
677 static inline void
_mp_enable_preemption(void)678 _mp_enable_preemption(void)
679 {
680 enable_preemption_internal();
681 }
682
683 static inline void
mp_enable_preemption_no_check(void)684 mp_enable_preemption_no_check(void)
685 {
686 enable_preemption_no_check();
687 }
688
689 static inline void
_mp_enable_preemption_no_check(void)690 _mp_enable_preemption_no_check(void)
691 {
692 enable_preemption_no_check();
693 }
694
695 #ifdef XNU_KERNEL_PRIVATE
696 #define disable_preemption() disable_preemption_internal()
697 #define disable_preemption_without_measurements() disable_preemption_internal()
698 #define enable_preemption() enable_preemption_internal()
699 #define MACHINE_PREEMPTION_MACROS (1)
700 #endif
701
702 static inline cpu_data_t *
cpu_datap(int cpu)703 cpu_datap(int cpu)
704 {
705 return cpu_data_ptr[cpu];
706 }
707
708 static inline int
cpu_is_running(int cpu)709 cpu_is_running(int cpu)
710 {
711 return (cpu_datap(cpu) != NULL) && (cpu_datap(cpu)->cpu_running);
712 }
713
714 #ifdef MACH_KERNEL_PRIVATE
715 static inline cpu_data_t *
cpu_shadowp(int cpu)716 cpu_shadowp(int cpu)
717 {
718 return cpu_data_ptr[cpu]->cd_shadow;
719 }
720
721 #endif
722 extern cpu_data_t *cpu_data_alloc(boolean_t is_boot_cpu);
723 extern void cpu_data_realloc(void);
724
725 #endif /* I386_CPU_DATA */
726