1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2014-2018 Broadcom
3 * All rights reserved.
4 */
5
6 #include <inttypes.h>
7
8 #include <rte_malloc.h>
9
10 #include "bnxt.h"
11 #include "bnxt_filter.h"
12 #include "bnxt_hwrm.h"
13 #include "bnxt_ring.h"
14 #include "bnxt_rxq.h"
15 #include "bnxt_rxr.h"
16 #include "bnxt_vnic.h"
17 #include "hsi_struct_def_dpdk.h"
18
19 /*
20 * RX Queues
21 */
22
bnxt_free_rxq_stats(struct bnxt_rx_queue * rxq)23 void bnxt_free_rxq_stats(struct bnxt_rx_queue *rxq)
24 {
25 if (rxq && rxq->cp_ring && rxq->cp_ring->hw_stats)
26 rxq->cp_ring->hw_stats = NULL;
27 }
28
bnxt_mq_rx_configure(struct bnxt * bp)29 int bnxt_mq_rx_configure(struct bnxt *bp)
30 {
31 struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
32 const struct rte_eth_vmdq_rx_conf *conf =
33 &dev_conf->rx_adv_conf.vmdq_rx_conf;
34 unsigned int i, j, nb_q_per_grp = 1, ring_idx = 0;
35 int start_grp_id, end_grp_id = 1, rc = 0;
36 struct bnxt_vnic_info *vnic;
37 struct bnxt_filter_info *filter;
38 enum rte_eth_nb_pools pools = 1, max_pools = 0;
39 struct bnxt_rx_queue *rxq;
40
41 bp->nr_vnics = 0;
42
43 /* Single queue mode */
44 if (bp->rx_cp_nr_rings < 2) {
45 vnic = &bp->vnic_info[0];
46 if (!vnic) {
47 PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
48 rc = -ENOMEM;
49 goto err_out;
50 }
51 vnic->flags |= BNXT_VNIC_INFO_BCAST;
52 bp->nr_vnics++;
53
54 rxq = bp->eth_dev->data->rx_queues[0];
55 rxq->vnic = vnic;
56
57 vnic->func_default = true;
58 vnic->start_grp_id = 0;
59 vnic->end_grp_id = vnic->start_grp_id;
60 filter = bnxt_alloc_filter(bp);
61 if (!filter) {
62 PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
63 rc = -ENOMEM;
64 goto err_out;
65 }
66 filter->mac_index = 0;
67 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
68 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
69 goto out;
70 }
71
72 /* Multi-queue mode */
73 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB_RSS) {
74 /* VMDq ONLY, VMDq+RSS, VMDq+DCB, VMDq+DCB+RSS */
75
76 switch (dev_conf->rxmode.mq_mode) {
77 case ETH_MQ_RX_VMDQ_RSS:
78 case ETH_MQ_RX_VMDQ_ONLY:
79 case ETH_MQ_RX_VMDQ_DCB_RSS:
80 /* FALLTHROUGH */
81 /* ETH_8/64_POOLs */
82 pools = conf->nb_queue_pools;
83 /* For each pool, allocate MACVLAN CFA rule & VNIC */
84 max_pools = RTE_MIN(bp->max_vnics,
85 RTE_MIN(bp->max_l2_ctx,
86 RTE_MIN(bp->max_rsscos_ctx,
87 ETH_64_POOLS)));
88 PMD_DRV_LOG(DEBUG,
89 "pools = %u max_pools = %u\n",
90 pools, max_pools);
91 if (pools > max_pools)
92 pools = max_pools;
93 break;
94 case ETH_MQ_RX_RSS:
95 pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : 1;
96 break;
97 default:
98 PMD_DRV_LOG(ERR, "Unsupported mq_mod %d\n",
99 dev_conf->rxmode.mq_mode);
100 rc = -EINVAL;
101 goto err_out;
102 }
103 } else if (!dev_conf->rxmode.mq_mode) {
104 pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : pools;
105 }
106
107 pools = RTE_MIN(pools, bp->rx_cp_nr_rings);
108 nb_q_per_grp = bp->rx_cp_nr_rings / pools;
109 bp->rx_num_qs_per_vnic = nb_q_per_grp;
110 PMD_DRV_LOG(DEBUG, "pools = %u nb_q_per_grp = %u\n",
111 pools, nb_q_per_grp);
112 start_grp_id = 0;
113 end_grp_id = nb_q_per_grp;
114
115 for (i = 0; i < pools; i++) {
116 vnic = &bp->vnic_info[i];
117 if (!vnic) {
118 PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
119 rc = -ENOMEM;
120 goto err_out;
121 }
122 vnic->flags |= BNXT_VNIC_INFO_BCAST;
123 bp->nr_vnics++;
124
125 for (j = 0; j < nb_q_per_grp; j++, ring_idx++) {
126 rxq = bp->eth_dev->data->rx_queues[ring_idx];
127 rxq->vnic = vnic;
128 PMD_DRV_LOG(DEBUG,
129 "rxq[%d] = %p vnic[%d] = %p\n",
130 ring_idx, rxq, i, vnic);
131 }
132 if (i == 0) {
133 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB) {
134 bp->eth_dev->data->promiscuous = 1;
135 vnic->flags |= BNXT_VNIC_INFO_PROMISC;
136 }
137 vnic->func_default = true;
138 }
139 vnic->start_grp_id = start_grp_id;
140 vnic->end_grp_id = end_grp_id;
141
142 if (i) {
143 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB ||
144 !(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS))
145 vnic->rss_dflt_cr = true;
146 goto skip_filter_allocation;
147 }
148 filter = bnxt_alloc_filter(bp);
149 if (!filter) {
150 PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
151 rc = -ENOMEM;
152 goto err_out;
153 }
154 filter->mac_index = 0;
155 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
156 /*
157 * TODO: Configure & associate CFA rule for
158 * each VNIC for each VMDq with MACVLAN, MACVLAN+TC
159 */
160 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
161
162 skip_filter_allocation:
163 start_grp_id = end_grp_id;
164 end_grp_id += nb_q_per_grp;
165 }
166
167 out:
168 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
169 struct rte_eth_rss_conf *rss = &dev_conf->rx_adv_conf.rss_conf;
170
171 if (bp->flags & BNXT_FLAG_UPDATE_HASH)
172 bp->flags &= ~BNXT_FLAG_UPDATE_HASH;
173
174 for (i = 0; i < bp->nr_vnics; i++) {
175 uint32_t lvl = ETH_RSS_LEVEL(rss->rss_hf);
176
177 vnic = &bp->vnic_info[i];
178 vnic->hash_type =
179 bnxt_rte_to_hwrm_hash_types(rss->rss_hf);
180 vnic->hash_mode =
181 bnxt_rte_to_hwrm_hash_level(bp,
182 rss->rss_hf,
183 lvl);
184
185 /*
186 * Use the supplied key if the key length is
187 * acceptable and the rss_key is not NULL
188 */
189 if (rss->rss_key &&
190 rss->rss_key_len <= HW_HASH_KEY_SIZE)
191 memcpy(vnic->rss_hash_key,
192 rss->rss_key, rss->rss_key_len);
193 }
194 }
195
196 return rc;
197
198 err_out:
199 /* Free allocated vnic/filters */
200
201 return rc;
202 }
203
bnxt_rx_queue_release_mbufs(struct bnxt_rx_queue * rxq)204 void bnxt_rx_queue_release_mbufs(struct bnxt_rx_queue *rxq)
205 {
206 struct rte_mbuf **sw_ring;
207 struct bnxt_tpa_info *tpa_info;
208 uint16_t i;
209
210 if (!rxq || !rxq->rx_ring)
211 return;
212
213 sw_ring = rxq->rx_ring->rx_buf_ring;
214 if (sw_ring) {
215 for (i = 0;
216 i < rxq->rx_ring->rx_ring_struct->ring_size; i++) {
217 if (sw_ring[i]) {
218 if (sw_ring[i] != &rxq->fake_mbuf)
219 rte_pktmbuf_free_seg(sw_ring[i]);
220 sw_ring[i] = NULL;
221 }
222 }
223 }
224 /* Free up mbufs in Agg ring */
225 sw_ring = rxq->rx_ring->ag_buf_ring;
226 if (sw_ring) {
227 for (i = 0;
228 i < rxq->rx_ring->ag_ring_struct->ring_size; i++) {
229 if (sw_ring[i]) {
230 rte_pktmbuf_free_seg(sw_ring[i]);
231 sw_ring[i] = NULL;
232 }
233 }
234 }
235
236 /* Free up mbufs in TPA */
237 tpa_info = rxq->rx_ring->tpa_info;
238 if (tpa_info) {
239 int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
240
241 for (i = 0; i < max_aggs; i++) {
242 if (tpa_info[i].mbuf) {
243 rte_pktmbuf_free_seg(tpa_info[i].mbuf);
244 tpa_info[i].mbuf = NULL;
245 }
246 }
247 }
248
249 }
250
bnxt_free_rx_mbufs(struct bnxt * bp)251 void bnxt_free_rx_mbufs(struct bnxt *bp)
252 {
253 struct bnxt_rx_queue *rxq;
254 int i;
255
256 for (i = 0; i < (int)bp->rx_nr_rings; i++) {
257 rxq = bp->rx_queues[i];
258 bnxt_rx_queue_release_mbufs(rxq);
259 }
260 }
261
bnxt_rx_queue_release_op(void * rx_queue)262 void bnxt_rx_queue_release_op(void *rx_queue)
263 {
264 struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
265
266 if (rxq) {
267 if (is_bnxt_in_error(rxq->bp))
268 return;
269
270 bnxt_rx_queue_release_mbufs(rxq);
271
272 /* Free RX ring hardware descriptors */
273 if (rxq->rx_ring) {
274 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
275 rte_free(rxq->rx_ring->rx_ring_struct);
276 /* Free RX Agg ring hardware descriptors */
277 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
278 rte_free(rxq->rx_ring->ag_ring_struct);
279
280 rte_free(rxq->rx_ring);
281 }
282 /* Free RX completion ring hardware descriptors */
283 if (rxq->cp_ring) {
284 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
285 rte_free(rxq->cp_ring->cp_ring_struct);
286 rte_free(rxq->cp_ring);
287 }
288
289 bnxt_free_rxq_stats(rxq);
290 rte_memzone_free(rxq->mz);
291 rxq->mz = NULL;
292
293 rte_free(rxq);
294 }
295 }
296
bnxt_rx_queue_setup_op(struct rte_eth_dev * eth_dev,uint16_t queue_idx,uint16_t nb_desc,unsigned int socket_id,const struct rte_eth_rxconf * rx_conf,struct rte_mempool * mp)297 int bnxt_rx_queue_setup_op(struct rte_eth_dev *eth_dev,
298 uint16_t queue_idx,
299 uint16_t nb_desc,
300 unsigned int socket_id,
301 const struct rte_eth_rxconf *rx_conf,
302 struct rte_mempool *mp)
303 {
304 struct bnxt *bp = eth_dev->data->dev_private;
305 uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
306 struct bnxt_rx_queue *rxq;
307 int rc = 0;
308 uint8_t queue_state;
309
310 rc = is_bnxt_in_error(bp);
311 if (rc)
312 return rc;
313
314 if (queue_idx >= BNXT_MAX_RINGS(bp)) {
315 PMD_DRV_LOG(ERR,
316 "Cannot create Rx ring %d. Only %d rings available\n",
317 queue_idx, bp->max_rx_rings);
318 return -EINVAL;
319 }
320
321 if (nb_desc < BNXT_MIN_RING_DESC || nb_desc > MAX_RX_DESC_CNT) {
322 PMD_DRV_LOG(ERR, "nb_desc %d is invalid\n", nb_desc);
323 return -EINVAL;
324 }
325
326 if (eth_dev->data->rx_queues) {
327 rxq = eth_dev->data->rx_queues[queue_idx];
328 if (rxq)
329 bnxt_rx_queue_release_op(rxq);
330 }
331 rxq = rte_zmalloc_socket("bnxt_rx_queue", sizeof(struct bnxt_rx_queue),
332 RTE_CACHE_LINE_SIZE, socket_id);
333 if (!rxq) {
334 PMD_DRV_LOG(ERR, "bnxt_rx_queue allocation failed!\n");
335 return -ENOMEM;
336 }
337 rxq->bp = bp;
338 rxq->mb_pool = mp;
339 rxq->nb_rx_desc = nb_desc;
340 rxq->rx_free_thresh =
341 RTE_MIN(rte_align32pow2(nb_desc) / 4, RTE_BNXT_MAX_RX_BURST);
342
343 if (rx_conf->rx_drop_en != BNXT_DEFAULT_RX_DROP_EN)
344 PMD_DRV_LOG(NOTICE,
345 "Per-queue config of drop-en is not supported.\n");
346 rxq->drop_en = BNXT_DEFAULT_RX_DROP_EN;
347
348 PMD_DRV_LOG(DEBUG, "RX Buf MTU %d\n", eth_dev->data->mtu);
349
350 rc = bnxt_init_rx_ring_struct(rxq, socket_id);
351 if (rc) {
352 PMD_DRV_LOG(ERR,
353 "init_rx_ring_struct failed!\n");
354 goto err;
355 }
356
357 PMD_DRV_LOG(DEBUG, "RX Buf size is %d\n", rxq->rx_buf_size);
358 rxq->queue_id = queue_idx;
359 rxq->port_id = eth_dev->data->port_id;
360 if (rx_offloads & DEV_RX_OFFLOAD_KEEP_CRC)
361 rxq->crc_len = RTE_ETHER_CRC_LEN;
362 else
363 rxq->crc_len = 0;
364
365 eth_dev->data->rx_queues[queue_idx] = rxq;
366 /* Allocate RX ring hardware descriptors */
367 if (bnxt_alloc_rings(bp, queue_idx, NULL, rxq, rxq->cp_ring, NULL,
368 "rxr")) {
369 PMD_DRV_LOG(ERR,
370 "ring_dma_zone_reserve for rx_ring failed!\n");
371 goto err;
372 }
373 rte_atomic64_init(&rxq->rx_mbuf_alloc_fail);
374
375 /* rxq 0 must not be stopped when used as async CPR */
376 if (!BNXT_NUM_ASYNC_CPR(bp) && queue_idx == 0)
377 rxq->rx_deferred_start = false;
378 else
379 rxq->rx_deferred_start = rx_conf->rx_deferred_start;
380
381 if (rxq->rx_deferred_start) {
382 queue_state = RTE_ETH_QUEUE_STATE_STOPPED;
383 rxq->rx_started = false;
384 } else {
385 queue_state = RTE_ETH_QUEUE_STATE_STARTED;
386 rxq->rx_started = true;
387 }
388 eth_dev->data->rx_queue_state[queue_idx] = queue_state;
389
390 /* Configure mtu if it is different from what was configured before */
391 if (!queue_idx)
392 bnxt_mtu_set_op(eth_dev, eth_dev->data->mtu);
393
394 return 0;
395 err:
396 bnxt_rx_queue_release_op(rxq);
397 return rc;
398 }
399
400 int
bnxt_rx_queue_intr_enable_op(struct rte_eth_dev * eth_dev,uint16_t queue_id)401 bnxt_rx_queue_intr_enable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
402 {
403 struct bnxt *bp = eth_dev->data->dev_private;
404 struct bnxt_rx_queue *rxq;
405 struct bnxt_cp_ring_info *cpr;
406 int rc = 0;
407
408 rc = is_bnxt_in_error(bp);
409 if (rc)
410 return rc;
411
412 if (eth_dev->data->rx_queues) {
413 rxq = eth_dev->data->rx_queues[queue_id];
414 if (!rxq)
415 return -EINVAL;
416
417 cpr = rxq->cp_ring;
418 B_CP_DB_REARM(cpr, cpr->cp_raw_cons);
419 }
420 return rc;
421 }
422
423 int
bnxt_rx_queue_intr_disable_op(struct rte_eth_dev * eth_dev,uint16_t queue_id)424 bnxt_rx_queue_intr_disable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
425 {
426 struct bnxt *bp = eth_dev->data->dev_private;
427 struct bnxt_rx_queue *rxq;
428 struct bnxt_cp_ring_info *cpr;
429 int rc = 0;
430
431 rc = is_bnxt_in_error(bp);
432 if (rc)
433 return rc;
434
435 if (eth_dev->data->rx_queues) {
436 rxq = eth_dev->data->rx_queues[queue_id];
437 if (!rxq)
438 return -EINVAL;
439
440 cpr = rxq->cp_ring;
441 B_CP_DB_DISARM(cpr);
442 }
443 return rc;
444 }
445
bnxt_rx_queue_start(struct rte_eth_dev * dev,uint16_t rx_queue_id)446 int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
447 {
448 struct bnxt *bp = dev->data->dev_private;
449 struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
450 struct bnxt_rx_queue *rxq = bp->rx_queues[rx_queue_id];
451 struct bnxt_vnic_info *vnic = NULL;
452 int rc = 0;
453
454 rc = is_bnxt_in_error(bp);
455 if (rc)
456 return rc;
457
458 if (rxq == NULL) {
459 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
460 return -EINVAL;
461 }
462
463 /* Set the queue state to started here.
464 * We check the status of the queue while posting buffer.
465 * If queue is it started, we do not post buffers for Rx.
466 */
467 rxq->rx_started = true;
468 dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
469
470 bnxt_free_hwrm_rx_ring(bp, rx_queue_id);
471 rc = bnxt_alloc_hwrm_rx_ring(bp, rx_queue_id);
472 if (rc)
473 return rc;
474
475 if (BNXT_CHIP_THOR(bp)) {
476 /* Reconfigure default receive ring and MRU. */
477 bnxt_hwrm_vnic_cfg(bp, rxq->vnic);
478 }
479 PMD_DRV_LOG(INFO, "Rx queue started %d\n", rx_queue_id);
480
481 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
482 vnic = rxq->vnic;
483
484 if (BNXT_HAS_RING_GRPS(bp)) {
485 if (vnic->fw_grp_ids[rx_queue_id] != INVALID_HW_RING_ID)
486 return 0;
487
488 vnic->fw_grp_ids[rx_queue_id] =
489 bp->grp_info[rx_queue_id].fw_grp_id;
490 PMD_DRV_LOG(DEBUG,
491 "vnic = %p fw_grp_id = %d\n",
492 vnic, bp->grp_info[rx_queue_id].fw_grp_id);
493 }
494
495 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
496 rc = bnxt_vnic_rss_configure(bp, vnic);
497 }
498
499 if (rc != 0) {
500 dev->data->rx_queue_state[rx_queue_id] =
501 RTE_ETH_QUEUE_STATE_STOPPED;
502 rxq->rx_started = false;
503 }
504
505 PMD_DRV_LOG(INFO,
506 "queue %d, rx_deferred_start %d, state %d!\n",
507 rx_queue_id, rxq->rx_deferred_start,
508 bp->eth_dev->data->rx_queue_state[rx_queue_id]);
509
510 return rc;
511 }
512
bnxt_rx_queue_stop(struct rte_eth_dev * dev,uint16_t rx_queue_id)513 int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
514 {
515 struct bnxt *bp = dev->data->dev_private;
516 struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
517 struct bnxt_vnic_info *vnic = NULL;
518 struct bnxt_rx_queue *rxq = NULL;
519 int active_queue_cnt = 0;
520 int i, rc = 0;
521
522 rc = is_bnxt_in_error(bp);
523 if (rc)
524 return rc;
525
526 /* For the stingray platform and other platforms needing tighter
527 * control of resource utilization, Rx CQ 0 also works as
528 * Default CQ for async notifications
529 */
530 if (!BNXT_NUM_ASYNC_CPR(bp) && !rx_queue_id) {
531 PMD_DRV_LOG(ERR, "Cannot stop Rx queue id %d\n", rx_queue_id);
532 return -EINVAL;
533 }
534
535 rxq = bp->rx_queues[rx_queue_id];
536 if (!rxq) {
537 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
538 return -EINVAL;
539 }
540
541 vnic = rxq->vnic;
542 if (!vnic) {
543 PMD_DRV_LOG(ERR, "VNIC not initialized for RxQ %d\n",
544 rx_queue_id);
545 return -EINVAL;
546 }
547
548 dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
549 rxq->rx_started = false;
550 PMD_DRV_LOG(DEBUG, "Rx queue stopped\n");
551
552 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
553 if (BNXT_HAS_RING_GRPS(bp))
554 vnic->fw_grp_ids[rx_queue_id] = INVALID_HW_RING_ID;
555
556 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
557 rc = bnxt_vnic_rss_configure(bp, vnic);
558 }
559
560 if (BNXT_CHIP_THOR(bp)) {
561 /* Compute current number of active receive queues. */
562 for (i = vnic->start_grp_id; i < vnic->end_grp_id; i++)
563 if (bp->rx_queues[i]->rx_started)
564 active_queue_cnt++;
565
566 /*
567 * For Thor, we need to ensure that the VNIC default receive
568 * ring corresponds to an active receive queue. When no queue
569 * is active, we need to temporarily set the MRU to zero so
570 * that packets are dropped early in the receive pipeline in
571 * order to prevent the VNIC default receive ring from being
572 * accessed.
573 */
574 if (active_queue_cnt == 0) {
575 uint16_t saved_mru = vnic->mru;
576
577 vnic->mru = 0;
578 /* Reconfigure default receive ring and MRU. */
579 bnxt_hwrm_vnic_cfg(bp, vnic);
580 vnic->mru = saved_mru;
581 } else {
582 /* Reconfigure default receive ring. */
583 bnxt_hwrm_vnic_cfg(bp, vnic);
584 }
585 }
586
587 if (rc == 0)
588 bnxt_rx_queue_release_mbufs(rxq);
589
590 return rc;
591 }
592