1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2019 Emmanuel Vadot <[email protected]>
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $FreeBSD$
28 */
29
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
32
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/bus.h>
36
37 #include <dev/extres/clk/clk.h>
38
39 #include <arm/allwinner/clkng/aw_clk.h>
40 #include <arm/allwinner/clkng/aw_clk_np.h>
41
42 #include "clkdev_if.h"
43
44 /*
45 * clknode for clocks matching the formula :
46 *
47 * clk = clkin * n / p
48 *
49 */
50
51 struct aw_clk_np_sc {
52 uint32_t offset;
53
54 struct aw_clk_factor n;
55 struct aw_clk_factor p;
56
57 uint32_t gate_shift;
58 uint32_t lock_shift;
59 uint32_t lock_retries;
60
61 uint32_t flags;
62 };
63
64 #define WRITE4(_clk, off, val) \
65 CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
66 #define READ4(_clk, off, val) \
67 CLKDEV_READ_4(clknode_get_device(_clk), off, val)
68 #define DEVICE_LOCK(_clk) \
69 CLKDEV_DEVICE_LOCK(clknode_get_device(_clk))
70 #define DEVICE_UNLOCK(_clk) \
71 CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk))
72
73 static int
aw_clk_np_init(struct clknode * clk,device_t dev)74 aw_clk_np_init(struct clknode *clk, device_t dev)
75 {
76 struct aw_clk_np_sc *sc;
77
78 sc = clknode_get_softc(clk);
79
80 clknode_init_parent_idx(clk, 0);
81 return (0);
82 }
83
84 static int
aw_clk_np_set_gate(struct clknode * clk,bool enable)85 aw_clk_np_set_gate(struct clknode *clk, bool enable)
86 {
87 struct aw_clk_np_sc *sc;
88 uint32_t val;
89
90 sc = clknode_get_softc(clk);
91
92 if ((sc->flags & AW_CLK_HAS_GATE) == 0)
93 return (0);
94
95 DEVICE_LOCK(clk);
96 READ4(clk, sc->offset, &val);
97 if (enable)
98 val |= (1 << sc->gate_shift);
99 else
100 val &= ~(1 << sc->gate_shift);
101 WRITE4(clk, sc->offset, val);
102 DEVICE_UNLOCK(clk);
103
104 return (0);
105 }
106
107 static uint64_t
aw_clk_np_find_best(struct aw_clk_np_sc * sc,uint64_t fparent,uint64_t * fout,uint32_t * factor_n,uint32_t * factor_p)108 aw_clk_np_find_best(struct aw_clk_np_sc *sc, uint64_t fparent, uint64_t *fout,
109 uint32_t *factor_n, uint32_t *factor_p)
110 {
111 uint64_t cur, best;
112 uint32_t n, p, max_n, max_p, min_n, min_p;
113
114 *factor_n = *factor_p = 0;
115
116 max_n = aw_clk_factor_get_max(&sc->n);
117 max_p = aw_clk_factor_get_max(&sc->p);
118 min_n = aw_clk_factor_get_min(&sc->n);
119 min_p = aw_clk_factor_get_min(&sc->p);
120
121 for (p = min_p; p <= max_p; ) {
122 for (n = min_n; n <= max_n; ) {
123 cur = fparent * n / p;
124 if (abs(*fout - cur) < abs(*fout - best)) {
125 best = cur;
126 *factor_n = n;
127 *factor_p = p;
128 }
129
130 n++;
131 }
132 p++;
133 }
134
135 return (best);
136 }
137
138 static int
aw_clk_np_set_freq(struct clknode * clk,uint64_t fparent,uint64_t * fout,int flags,int * stop)139 aw_clk_np_set_freq(struct clknode *clk, uint64_t fparent, uint64_t *fout,
140 int flags, int *stop)
141 {
142 struct aw_clk_np_sc *sc;
143 uint64_t cur, best;
144 uint32_t val, n, p, best_n, best_p;
145 int retry;
146
147 sc = clknode_get_softc(clk);
148
149 best = cur = 0;
150
151 best = aw_clk_np_find_best(sc, fparent, fout,
152 &best_n, &best_p);
153
154 if ((flags & CLK_SET_DRYRUN) != 0) {
155 *fout = best;
156 *stop = 1;
157 return (0);
158 }
159
160 if ((best < *fout) &&
161 ((flags & CLK_SET_ROUND_DOWN) == 0)) {
162 *stop = 1;
163 return (ERANGE);
164 }
165 if ((best > *fout) &&
166 ((flags & CLK_SET_ROUND_UP) == 0)) {
167 *stop = 1;
168 return (ERANGE);
169 }
170
171 DEVICE_LOCK(clk);
172 READ4(clk, sc->offset, &val);
173
174 n = aw_clk_factor_get_value(&sc->n, best_n);
175 p = aw_clk_factor_get_value(&sc->p, best_p);
176 val &= ~sc->n.mask;
177 val &= ~sc->p.mask;
178 val |= n << sc->n.shift;
179 val |= p << sc->p.shift;
180
181 WRITE4(clk, sc->offset, val);
182 DEVICE_UNLOCK(clk);
183
184 if ((sc->flags & AW_CLK_HAS_LOCK) != 0) {
185 for (retry = 0; retry < sc->lock_retries; retry++) {
186 READ4(clk, sc->offset, &val);
187 if ((val & (1 << sc->lock_shift)) != 0)
188 break;
189 DELAY(1000);
190 }
191 }
192
193 *fout = best;
194 *stop = 1;
195
196 return (0);
197 }
198
199 static int
aw_clk_np_recalc(struct clknode * clk,uint64_t * freq)200 aw_clk_np_recalc(struct clknode *clk, uint64_t *freq)
201 {
202 struct aw_clk_np_sc *sc;
203 uint32_t val, n, p;
204
205 sc = clknode_get_softc(clk);
206
207 DEVICE_LOCK(clk);
208 READ4(clk, sc->offset, &val);
209 DEVICE_UNLOCK(clk);
210
211 n = aw_clk_get_factor(val, &sc->n);
212 p = aw_clk_get_factor(val, &sc->p);
213
214 *freq = *freq * n / p;
215
216 return (0);
217 }
218
219 static clknode_method_t aw_np_clknode_methods[] = {
220 /* Device interface */
221 CLKNODEMETHOD(clknode_init, aw_clk_np_init),
222 CLKNODEMETHOD(clknode_set_gate, aw_clk_np_set_gate),
223 CLKNODEMETHOD(clknode_recalc_freq, aw_clk_np_recalc),
224 CLKNODEMETHOD(clknode_set_freq, aw_clk_np_set_freq),
225 CLKNODEMETHOD_END
226 };
227
228 DEFINE_CLASS_1(aw_np_clknode, aw_np_clknode_class, aw_np_clknode_methods,
229 sizeof(struct aw_clk_np_sc), clknode_class);
230
231 int
aw_clk_np_register(struct clkdom * clkdom,struct aw_clk_np_def * clkdef)232 aw_clk_np_register(struct clkdom *clkdom, struct aw_clk_np_def *clkdef)
233 {
234 struct clknode *clk;
235 struct aw_clk_np_sc *sc;
236
237 clk = clknode_create(clkdom, &aw_np_clknode_class, &clkdef->clkdef);
238 if (clk == NULL)
239 return (1);
240
241 sc = clknode_get_softc(clk);
242
243 sc->offset = clkdef->offset;
244
245 sc->n.shift = clkdef->n.shift;
246 sc->n.width = clkdef->n.width;
247 sc->n.mask = ((1 << sc->n.width) - 1) << sc->n.shift;
248 sc->n.value = clkdef->n.value;
249 sc->n.flags = clkdef->n.flags;
250
251 sc->p.shift = clkdef->p.shift;
252 sc->p.width = clkdef->p.width;
253 sc->p.mask = ((1 << sc->p.width) - 1) << sc->p.shift;
254 sc->p.value = clkdef->p.value;
255 sc->p.flags = clkdef->p.flags;
256
257 sc->gate_shift = clkdef->gate_shift;
258
259 sc->lock_shift = clkdef->lock_shift;
260 sc->lock_retries = clkdef->lock_retries;
261
262 sc->flags = clkdef->flags;
263
264 clknode_register(clkdom, clk);
265
266 return (0);
267 }
268