1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
3 *
4 * Copyright (c) 1997, 1998, 1999, 2000
5 * Bill Paul <[email protected]>. All rights reserved.
6 *
7 * Copyright (c) 2006
8 * Alfred Perlstein <[email protected]>. All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Bill Paul.
21 * 4. Neither the name of the author nor the names of any co-contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
35 * THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 #include <sys/cdefs.h>
39 __FBSDID("$FreeBSD$");
40
41 /*
42 * ADMtek AN986 Pegasus and AN8511 Pegasus II USB to ethernet driver.
43 * Datasheet is available from http://www.admtek.com.tw.
44 *
45 * Written by Bill Paul <[email protected]>
46 * Electrical Engineering Department
47 * Columbia University, New York City
48 *
49 * SMP locking by Alfred Perlstein <[email protected]>.
50 * RED Inc.
51 */
52
53 /*
54 * The Pegasus chip uses four USB "endpoints" to provide 10/100 ethernet
55 * support: the control endpoint for reading/writing registers, burst
56 * read endpoint for packet reception, burst write for packet transmission
57 * and one for "interrupts." The chip uses the same RX filter scheme
58 * as the other ADMtek ethernet parts: one perfect filter entry for the
59 * the station address and a 64-bit multicast hash table. The chip supports
60 * both MII and HomePNA attachments.
61 *
62 * Since the maximum data transfer speed of USB is supposed to be 12Mbps,
63 * you're never really going to get 100Mbps speeds from this device. I
64 * think the idea is to allow the device to connect to 10 or 100Mbps
65 * networks, not necessarily to provide 100Mbps performance. Also, since
66 * the controller uses an external PHY chip, it's possible that board
67 * designers might simply choose a 10Mbps PHY.
68 *
69 * Registers are accessed using uether_do_request(). Packet
70 * transfers are done using usbd_transfer() and friends.
71 */
72
73 #include <sys/stdint.h>
74 #include <sys/stddef.h>
75 #include <sys/param.h>
76 #include <sys/queue.h>
77 #include <sys/types.h>
78 #include <sys/systm.h>
79 #include <sys/socket.h>
80 #include <sys/kernel.h>
81 #include <sys/bus.h>
82 #include <sys/module.h>
83 #include <sys/lock.h>
84 #include <sys/mutex.h>
85 #include <sys/condvar.h>
86 #include <sys/sysctl.h>
87 #include <sys/sx.h>
88 #include <sys/unistd.h>
89 #include <sys/callout.h>
90 #include <sys/malloc.h>
91 #include <sys/priv.h>
92
93 #include <net/if.h>
94 #include <net/if_var.h>
95 #include <net/if_media.h>
96
97 #include <dev/mii/mii.h>
98 #include <dev/mii/miivar.h>
99
100 #include <dev/usb/usb.h>
101 #include <dev/usb/usbdi.h>
102 #include <dev/usb/usbdi_util.h>
103 #include "usbdevs.h"
104
105 #define USB_DEBUG_VAR aue_debug
106 #include <dev/usb/usb_debug.h>
107 #include <dev/usb/usb_process.h>
108
109 #include <dev/usb/net/usb_ethernet.h>
110 #include <dev/usb/net/if_auereg.h>
111
112 #include "miibus_if.h"
113
114 #ifdef USB_DEBUG
115 static int aue_debug = 0;
116
117 static SYSCTL_NODE(_hw_usb, OID_AUTO, aue, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
118 "USB aue");
119 SYSCTL_INT(_hw_usb_aue, OID_AUTO, debug, CTLFLAG_RWTUN, &aue_debug, 0,
120 "Debug level");
121 #endif
122
123 /*
124 * Various supported device vendors/products.
125 */
126 static const STRUCT_USB_HOST_ID aue_devs[] = {
127 #define AUE_DEV(v,p,i) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, i) }
128 AUE_DEV(3COM, 3C460B, AUE_FLAG_PII),
129 AUE_DEV(ABOCOM, DSB650TX_PNA, 0),
130 AUE_DEV(ABOCOM, UFE1000, AUE_FLAG_LSYS),
131 AUE_DEV(ABOCOM, XX10, 0),
132 AUE_DEV(ABOCOM, XX1, AUE_FLAG_PNA | AUE_FLAG_PII),
133 AUE_DEV(ABOCOM, XX2, AUE_FLAG_PII),
134 AUE_DEV(ABOCOM, XX4, AUE_FLAG_PNA),
135 AUE_DEV(ABOCOM, XX5, AUE_FLAG_PNA),
136 AUE_DEV(ABOCOM, XX6, AUE_FLAG_PII),
137 AUE_DEV(ABOCOM, XX7, AUE_FLAG_PII),
138 AUE_DEV(ABOCOM, XX8, AUE_FLAG_PII),
139 AUE_DEV(ABOCOM, XX9, AUE_FLAG_PNA),
140 AUE_DEV(ACCTON, SS1001, AUE_FLAG_PII),
141 AUE_DEV(ACCTON, USB320_EC, 0),
142 AUE_DEV(ADMTEK, PEGASUSII_2, AUE_FLAG_PII),
143 AUE_DEV(ADMTEK, PEGASUSII_3, AUE_FLAG_PII),
144 AUE_DEV(ADMTEK, PEGASUSII_4, AUE_FLAG_PII),
145 AUE_DEV(ADMTEK, PEGASUSII, AUE_FLAG_PII),
146 AUE_DEV(ADMTEK, PEGASUS, AUE_FLAG_PNA | AUE_FLAG_DUAL_PHY),
147 AUE_DEV(AEI, FASTETHERNET, AUE_FLAG_PII),
148 AUE_DEV(ALLIEDTELESYN, ATUSB100, AUE_FLAG_PII),
149 AUE_DEV(ATEN, UC110T, AUE_FLAG_PII),
150 AUE_DEV(BELKIN, USB2LAN, AUE_FLAG_PII),
151 AUE_DEV(BILLIONTON, USB100, 0),
152 AUE_DEV(BILLIONTON, USBE100, AUE_FLAG_PII),
153 AUE_DEV(BILLIONTON, USBEL100, 0),
154 AUE_DEV(BILLIONTON, USBLP100, AUE_FLAG_PNA),
155 AUE_DEV(COREGA, FETHER_USB_TXS, AUE_FLAG_PII),
156 AUE_DEV(COREGA, FETHER_USB_TX, 0),
157 AUE_DEV(DLINK, DSB650TX1, AUE_FLAG_LSYS),
158 AUE_DEV(DLINK, DSB650TX2, AUE_FLAG_LSYS | AUE_FLAG_PII),
159 AUE_DEV(DLINK, DSB650TX3, AUE_FLAG_LSYS | AUE_FLAG_PII),
160 AUE_DEV(DLINK, DSB650TX4, AUE_FLAG_LSYS | AUE_FLAG_PII),
161 AUE_DEV(DLINK, DSB650TX_PNA, AUE_FLAG_PNA),
162 AUE_DEV(DLINK, DSB650TX, AUE_FLAG_LSYS),
163 AUE_DEV(DLINK, DSB650, AUE_FLAG_LSYS),
164 AUE_DEV(ELCON, PLAN, AUE_FLAG_PNA | AUE_FLAG_PII),
165 AUE_DEV(ELECOM, LDUSB20, AUE_FLAG_PII),
166 AUE_DEV(ELECOM, LDUSBLTX, AUE_FLAG_PII),
167 AUE_DEV(ELECOM, LDUSBTX0, 0),
168 AUE_DEV(ELECOM, LDUSBTX1, AUE_FLAG_LSYS),
169 AUE_DEV(ELECOM, LDUSBTX2, 0),
170 AUE_DEV(ELECOM, LDUSBTX3, AUE_FLAG_LSYS),
171 AUE_DEV(ELSA, USB2ETHERNET, 0),
172 AUE_DEV(GIGABYTE, GNBR402W, 0),
173 AUE_DEV(HAWKING, UF100, AUE_FLAG_PII),
174 AUE_DEV(HP, HN210E, AUE_FLAG_PII),
175 AUE_DEV(IODATA, USBETTXS, AUE_FLAG_PII),
176 AUE_DEV(IODATA, USBETTX, 0),
177 AUE_DEV(KINGSTON, KNU101TX, 0),
178 AUE_DEV(LINKSYS, USB100H1, AUE_FLAG_LSYS | AUE_FLAG_PNA),
179 AUE_DEV(LINKSYS, USB100TX, AUE_FLAG_LSYS),
180 AUE_DEV(LINKSYS, USB10TA, AUE_FLAG_LSYS),
181 AUE_DEV(LINKSYS, USB10TX1, AUE_FLAG_LSYS | AUE_FLAG_PII),
182 AUE_DEV(LINKSYS, USB10TX2, AUE_FLAG_LSYS | AUE_FLAG_PII),
183 AUE_DEV(LINKSYS, USB10T, AUE_FLAG_LSYS),
184 AUE_DEV(MELCO, LUA2TX5, AUE_FLAG_PII),
185 AUE_DEV(MELCO, LUATX1, 0),
186 AUE_DEV(MELCO, LUATX5, 0),
187 AUE_DEV(MICROSOFT, MN110, AUE_FLAG_PII),
188 AUE_DEV(NETGEAR, FA101, AUE_FLAG_PII),
189 AUE_DEV(SIEMENS, SPEEDSTREAM, AUE_FLAG_PII),
190 AUE_DEV(SIIG2, USBTOETHER, AUE_FLAG_PII),
191 AUE_DEV(SMARTBRIDGES, SMARTNIC, AUE_FLAG_PII),
192 AUE_DEV(SMC, 2202USB, 0),
193 AUE_DEV(SMC, 2206USB, AUE_FLAG_PII),
194 AUE_DEV(SOHOWARE, NUB100, 0),
195 AUE_DEV(SOHOWARE, NUB110, AUE_FLAG_PII),
196 #undef AUE_DEV
197 };
198
199 /* prototypes */
200
201 static device_probe_t aue_probe;
202 static device_attach_t aue_attach;
203 static device_detach_t aue_detach;
204 static miibus_readreg_t aue_miibus_readreg;
205 static miibus_writereg_t aue_miibus_writereg;
206 static miibus_statchg_t aue_miibus_statchg;
207
208 static usb_callback_t aue_intr_callback;
209 static usb_callback_t aue_bulk_read_callback;
210 static usb_callback_t aue_bulk_write_callback;
211
212 static uether_fn_t aue_attach_post;
213 static uether_fn_t aue_init;
214 static uether_fn_t aue_stop;
215 static uether_fn_t aue_start;
216 static uether_fn_t aue_tick;
217 static uether_fn_t aue_setmulti;
218 static uether_fn_t aue_setpromisc;
219
220 static uint8_t aue_csr_read_1(struct aue_softc *, uint16_t);
221 static uint16_t aue_csr_read_2(struct aue_softc *, uint16_t);
222 static void aue_csr_write_1(struct aue_softc *, uint16_t, uint8_t);
223 static void aue_csr_write_2(struct aue_softc *, uint16_t, uint16_t);
224 static uint16_t aue_eeprom_getword(struct aue_softc *, int);
225 static void aue_reset(struct aue_softc *);
226 static void aue_reset_pegasus_II(struct aue_softc *);
227
228 static int aue_ifmedia_upd(struct ifnet *);
229 static void aue_ifmedia_sts(struct ifnet *, struct ifmediareq *);
230
231 static const struct usb_config aue_config[AUE_N_TRANSFER] = {
232 [AUE_BULK_DT_WR] = {
233 .type = UE_BULK,
234 .endpoint = UE_ADDR_ANY,
235 .direction = UE_DIR_OUT,
236 .bufsize = (MCLBYTES + 2),
237 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
238 .callback = aue_bulk_write_callback,
239 .timeout = 10000, /* 10 seconds */
240 },
241
242 [AUE_BULK_DT_RD] = {
243 .type = UE_BULK,
244 .endpoint = UE_ADDR_ANY,
245 .direction = UE_DIR_IN,
246 .bufsize = (MCLBYTES + 4 + ETHER_CRC_LEN),
247 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
248 .callback = aue_bulk_read_callback,
249 },
250
251 [AUE_INTR_DT_RD] = {
252 .type = UE_INTERRUPT,
253 .endpoint = UE_ADDR_ANY,
254 .direction = UE_DIR_IN,
255 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
256 .bufsize = 0, /* use wMaxPacketSize */
257 .callback = aue_intr_callback,
258 },
259 };
260
261 static device_method_t aue_methods[] = {
262 /* Device interface */
263 DEVMETHOD(device_probe, aue_probe),
264 DEVMETHOD(device_attach, aue_attach),
265 DEVMETHOD(device_detach, aue_detach),
266
267 /* MII interface */
268 DEVMETHOD(miibus_readreg, aue_miibus_readreg),
269 DEVMETHOD(miibus_writereg, aue_miibus_writereg),
270 DEVMETHOD(miibus_statchg, aue_miibus_statchg),
271
272 DEVMETHOD_END
273 };
274
275 static driver_t aue_driver = {
276 .name = "aue",
277 .methods = aue_methods,
278 .size = sizeof(struct aue_softc)
279 };
280
281 static devclass_t aue_devclass;
282
283 DRIVER_MODULE(aue, uhub, aue_driver, aue_devclass, NULL, 0);
284 DRIVER_MODULE(miibus, aue, miibus_driver, miibus_devclass, 0, 0);
285 MODULE_DEPEND(aue, uether, 1, 1, 1);
286 MODULE_DEPEND(aue, usb, 1, 1, 1);
287 MODULE_DEPEND(aue, ether, 1, 1, 1);
288 MODULE_DEPEND(aue, miibus, 1, 1, 1);
289 MODULE_VERSION(aue, 1);
290 USB_PNP_HOST_INFO(aue_devs);
291
292 static const struct usb_ether_methods aue_ue_methods = {
293 .ue_attach_post = aue_attach_post,
294 .ue_start = aue_start,
295 .ue_init = aue_init,
296 .ue_stop = aue_stop,
297 .ue_tick = aue_tick,
298 .ue_setmulti = aue_setmulti,
299 .ue_setpromisc = aue_setpromisc,
300 .ue_mii_upd = aue_ifmedia_upd,
301 .ue_mii_sts = aue_ifmedia_sts,
302 };
303
304 #define AUE_SETBIT(sc, reg, x) \
305 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) | (x))
306
307 #define AUE_CLRBIT(sc, reg, x) \
308 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) & ~(x))
309
310 static uint8_t
aue_csr_read_1(struct aue_softc * sc,uint16_t reg)311 aue_csr_read_1(struct aue_softc *sc, uint16_t reg)
312 {
313 struct usb_device_request req;
314 usb_error_t err;
315 uint8_t val;
316
317 req.bmRequestType = UT_READ_VENDOR_DEVICE;
318 req.bRequest = AUE_UR_READREG;
319 USETW(req.wValue, 0);
320 USETW(req.wIndex, reg);
321 USETW(req.wLength, 1);
322
323 err = uether_do_request(&sc->sc_ue, &req, &val, 1000);
324 if (err)
325 return (0);
326 return (val);
327 }
328
329 static uint16_t
aue_csr_read_2(struct aue_softc * sc,uint16_t reg)330 aue_csr_read_2(struct aue_softc *sc, uint16_t reg)
331 {
332 struct usb_device_request req;
333 usb_error_t err;
334 uint16_t val;
335
336 req.bmRequestType = UT_READ_VENDOR_DEVICE;
337 req.bRequest = AUE_UR_READREG;
338 USETW(req.wValue, 0);
339 USETW(req.wIndex, reg);
340 USETW(req.wLength, 2);
341
342 err = uether_do_request(&sc->sc_ue, &req, &val, 1000);
343 if (err)
344 return (0);
345 return (le16toh(val));
346 }
347
348 static void
aue_csr_write_1(struct aue_softc * sc,uint16_t reg,uint8_t val)349 aue_csr_write_1(struct aue_softc *sc, uint16_t reg, uint8_t val)
350 {
351 struct usb_device_request req;
352
353 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
354 req.bRequest = AUE_UR_WRITEREG;
355 req.wValue[0] = val;
356 req.wValue[1] = 0;
357 USETW(req.wIndex, reg);
358 USETW(req.wLength, 1);
359
360 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) {
361 /* error ignored */
362 }
363 }
364
365 static void
aue_csr_write_2(struct aue_softc * sc,uint16_t reg,uint16_t val)366 aue_csr_write_2(struct aue_softc *sc, uint16_t reg, uint16_t val)
367 {
368 struct usb_device_request req;
369
370 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
371 req.bRequest = AUE_UR_WRITEREG;
372 USETW(req.wValue, val);
373 USETW(req.wIndex, reg);
374 USETW(req.wLength, 2);
375
376 val = htole16(val);
377
378 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) {
379 /* error ignored */
380 }
381 }
382
383 /*
384 * Read a word of data stored in the EEPROM at address 'addr.'
385 */
386 static uint16_t
aue_eeprom_getword(struct aue_softc * sc,int addr)387 aue_eeprom_getword(struct aue_softc *sc, int addr)
388 {
389 int i;
390
391 aue_csr_write_1(sc, AUE_EE_REG, addr);
392 aue_csr_write_1(sc, AUE_EE_CTL, AUE_EECTL_READ);
393
394 for (i = 0; i != AUE_TIMEOUT; i++) {
395 if (aue_csr_read_1(sc, AUE_EE_CTL) & AUE_EECTL_DONE)
396 break;
397 if (uether_pause(&sc->sc_ue, hz / 100))
398 break;
399 }
400
401 if (i == AUE_TIMEOUT)
402 device_printf(sc->sc_ue.ue_dev, "EEPROM read timed out\n");
403
404 return (aue_csr_read_2(sc, AUE_EE_DATA));
405 }
406
407 /*
408 * Read station address(offset 0) from the EEPROM.
409 */
410 static void
aue_read_mac(struct aue_softc * sc,uint8_t * eaddr)411 aue_read_mac(struct aue_softc *sc, uint8_t *eaddr)
412 {
413 int i, offset;
414 uint16_t word;
415
416 for (i = 0, offset = 0; i < ETHER_ADDR_LEN / 2; i++) {
417 word = aue_eeprom_getword(sc, offset + i);
418 eaddr[i * 2] = (uint8_t)word;
419 eaddr[i * 2 + 1] = (uint8_t)(word >> 8);
420 }
421 }
422
423 static int
aue_miibus_readreg(device_t dev,int phy,int reg)424 aue_miibus_readreg(device_t dev, int phy, int reg)
425 {
426 struct aue_softc *sc = device_get_softc(dev);
427 int i, locked;
428 uint16_t val = 0;
429
430 locked = mtx_owned(&sc->sc_mtx);
431 if (!locked)
432 AUE_LOCK(sc);
433
434 /*
435 * The Am79C901 HomePNA PHY actually contains two transceivers: a 1Mbps
436 * HomePNA PHY and a 10Mbps full/half duplex ethernet PHY with NWAY
437 * autoneg. However in the ADMtek adapter, only the 1Mbps PHY is
438 * actually connected to anything, so we ignore the 10Mbps one. It
439 * happens to be configured for MII address 3, so we filter that out.
440 */
441 if (sc->sc_flags & AUE_FLAG_DUAL_PHY) {
442 if (phy == 3)
443 goto done;
444 #if 0
445 if (phy != 1)
446 goto done;
447 #endif
448 }
449 aue_csr_write_1(sc, AUE_PHY_ADDR, phy);
450 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_READ);
451
452 for (i = 0; i != AUE_TIMEOUT; i++) {
453 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE)
454 break;
455 if (uether_pause(&sc->sc_ue, hz / 100))
456 break;
457 }
458
459 if (i == AUE_TIMEOUT)
460 device_printf(sc->sc_ue.ue_dev, "MII read timed out\n");
461
462 val = aue_csr_read_2(sc, AUE_PHY_DATA);
463
464 done:
465 if (!locked)
466 AUE_UNLOCK(sc);
467 return (val);
468 }
469
470 static int
aue_miibus_writereg(device_t dev,int phy,int reg,int data)471 aue_miibus_writereg(device_t dev, int phy, int reg, int data)
472 {
473 struct aue_softc *sc = device_get_softc(dev);
474 int i;
475 int locked;
476
477 if (phy == 3)
478 return (0);
479
480 locked = mtx_owned(&sc->sc_mtx);
481 if (!locked)
482 AUE_LOCK(sc);
483
484 aue_csr_write_2(sc, AUE_PHY_DATA, data);
485 aue_csr_write_1(sc, AUE_PHY_ADDR, phy);
486 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_WRITE);
487
488 for (i = 0; i != AUE_TIMEOUT; i++) {
489 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE)
490 break;
491 if (uether_pause(&sc->sc_ue, hz / 100))
492 break;
493 }
494
495 if (i == AUE_TIMEOUT)
496 device_printf(sc->sc_ue.ue_dev, "MII write timed out\n");
497
498 if (!locked)
499 AUE_UNLOCK(sc);
500 return (0);
501 }
502
503 static void
aue_miibus_statchg(device_t dev)504 aue_miibus_statchg(device_t dev)
505 {
506 struct aue_softc *sc = device_get_softc(dev);
507 struct mii_data *mii = GET_MII(sc);
508 int locked;
509
510 locked = mtx_owned(&sc->sc_mtx);
511 if (!locked)
512 AUE_LOCK(sc);
513
514 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB);
515 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX)
516 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL);
517 else
518 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL);
519
520 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX)
521 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX);
522 else
523 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX);
524
525 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB);
526
527 /*
528 * Set the LED modes on the LinkSys adapter.
529 * This turns on the 'dual link LED' bin in the auxmode
530 * register of the Broadcom PHY.
531 */
532 if (sc->sc_flags & AUE_FLAG_LSYS) {
533 uint16_t auxmode;
534
535 auxmode = aue_miibus_readreg(dev, 0, 0x1b);
536 aue_miibus_writereg(dev, 0, 0x1b, auxmode | 0x04);
537 }
538 if (!locked)
539 AUE_UNLOCK(sc);
540 }
541
542 #define AUE_BITS 6
543 static u_int
aue_hash_maddr(void * arg,struct sockaddr_dl * sdl,u_int cnt)544 aue_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt)
545 {
546 uint8_t *hashtbl = arg;
547 uint32_t h;
548
549 h = ether_crc32_le(LLADDR(sdl), ETHER_ADDR_LEN) & ((1 << AUE_BITS) - 1);
550 hashtbl[(h >> 3)] |= 1 << (h & 0x7);
551
552 return (1);
553 }
554
555 static void
aue_setmulti(struct usb_ether * ue)556 aue_setmulti(struct usb_ether *ue)
557 {
558 struct aue_softc *sc = uether_getsc(ue);
559 struct ifnet *ifp = uether_getifp(ue);
560 uint32_t i;
561 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
562
563 AUE_LOCK_ASSERT(sc, MA_OWNED);
564
565 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) {
566 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI);
567 return;
568 }
569
570 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI);
571
572 /* now program new ones */
573 if_foreach_llmaddr(ifp, aue_hash_maddr, hashtbl);
574
575 /* write the hashtable */
576 for (i = 0; i != 8; i++)
577 aue_csr_write_1(sc, AUE_MAR0 + i, hashtbl[i]);
578 }
579
580 static void
aue_reset_pegasus_II(struct aue_softc * sc)581 aue_reset_pegasus_II(struct aue_softc *sc)
582 {
583 /* Magic constants taken from Linux driver. */
584 aue_csr_write_1(sc, AUE_REG_1D, 0);
585 aue_csr_write_1(sc, AUE_REG_7B, 2);
586 #if 0
587 if ((sc->sc_flags & HAS_HOME_PNA) && mii_mode)
588 aue_csr_write_1(sc, AUE_REG_81, 6);
589 else
590 #endif
591 aue_csr_write_1(sc, AUE_REG_81, 2);
592 }
593
594 static void
aue_reset(struct aue_softc * sc)595 aue_reset(struct aue_softc *sc)
596 {
597 int i;
598
599 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_RESETMAC);
600
601 for (i = 0; i != AUE_TIMEOUT; i++) {
602 if (!(aue_csr_read_1(sc, AUE_CTL1) & AUE_CTL1_RESETMAC))
603 break;
604 if (uether_pause(&sc->sc_ue, hz / 100))
605 break;
606 }
607
608 if (i == AUE_TIMEOUT)
609 device_printf(sc->sc_ue.ue_dev, "reset failed\n");
610
611 /*
612 * The PHY(s) attached to the Pegasus chip may be held
613 * in reset until we flip on the GPIO outputs. Make sure
614 * to set the GPIO pins high so that the PHY(s) will
615 * be enabled.
616 *
617 * NOTE: We used to force all of the GPIO pins low first and then
618 * enable the ones we want. This has been changed to better
619 * match the ADMtek's reference design to avoid setting the
620 * power-down configuration line of the PHY at the same time
621 * it is reset.
622 */
623 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1);
624 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0);
625
626 if (sc->sc_flags & AUE_FLAG_LSYS) {
627 /* Grrr. LinkSys has to be different from everyone else. */
628 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1);
629 aue_csr_write_1(sc, AUE_GPIO0,
630 AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0);
631 }
632 if (sc->sc_flags & AUE_FLAG_PII)
633 aue_reset_pegasus_II(sc);
634
635 /* Wait a little while for the chip to get its brains in order: */
636 uether_pause(&sc->sc_ue, hz / 100);
637 }
638
639 static void
aue_attach_post(struct usb_ether * ue)640 aue_attach_post(struct usb_ether *ue)
641 {
642 struct aue_softc *sc = uether_getsc(ue);
643
644 /* reset the adapter */
645 aue_reset(sc);
646
647 /* get station address from the EEPROM */
648 aue_read_mac(sc, ue->ue_eaddr);
649 }
650
651 /*
652 * Probe for a Pegasus chip.
653 */
654 static int
aue_probe(device_t dev)655 aue_probe(device_t dev)
656 {
657 struct usb_attach_arg *uaa = device_get_ivars(dev);
658
659 if (uaa->usb_mode != USB_MODE_HOST)
660 return (ENXIO);
661 if (uaa->info.bConfigIndex != AUE_CONFIG_INDEX)
662 return (ENXIO);
663 if (uaa->info.bIfaceIndex != AUE_IFACE_IDX)
664 return (ENXIO);
665 /*
666 * Belkin USB Bluetooth dongles of the F8T012xx1 model series conflict
667 * with older Belkin USB2LAN adapters. Skip if_aue if we detect one of
668 * the devices that look like Bluetooth adapters.
669 */
670 if (uaa->info.idVendor == USB_VENDOR_BELKIN &&
671 uaa->info.idProduct == USB_PRODUCT_BELKIN_F8T012 &&
672 uaa->info.bcdDevice == 0x0413)
673 return (ENXIO);
674
675 return (usbd_lookup_id_by_uaa(aue_devs, sizeof(aue_devs), uaa));
676 }
677
678 /*
679 * Attach the interface. Allocate softc structures, do ifmedia
680 * setup and ethernet/BPF attach.
681 */
682 static int
aue_attach(device_t dev)683 aue_attach(device_t dev)
684 {
685 struct usb_attach_arg *uaa = device_get_ivars(dev);
686 struct aue_softc *sc = device_get_softc(dev);
687 struct usb_ether *ue = &sc->sc_ue;
688 uint8_t iface_index;
689 int error;
690
691 sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
692
693 if (uaa->info.bcdDevice >= 0x0201) {
694 /* XXX currently undocumented */
695 sc->sc_flags |= AUE_FLAG_VER_2;
696 }
697
698 device_set_usb_desc(dev);
699 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
700
701 iface_index = AUE_IFACE_IDX;
702 error = usbd_transfer_setup(uaa->device, &iface_index,
703 sc->sc_xfer, aue_config, AUE_N_TRANSFER,
704 sc, &sc->sc_mtx);
705 if (error) {
706 device_printf(dev, "allocating USB transfers failed\n");
707 goto detach;
708 }
709
710 ue->ue_sc = sc;
711 ue->ue_dev = dev;
712 ue->ue_udev = uaa->device;
713 ue->ue_mtx = &sc->sc_mtx;
714 ue->ue_methods = &aue_ue_methods;
715
716 error = uether_ifattach(ue);
717 if (error) {
718 device_printf(dev, "could not attach interface\n");
719 goto detach;
720 }
721 return (0); /* success */
722
723 detach:
724 aue_detach(dev);
725 return (ENXIO); /* failure */
726 }
727
728 static int
aue_detach(device_t dev)729 aue_detach(device_t dev)
730 {
731 struct aue_softc *sc = device_get_softc(dev);
732 struct usb_ether *ue = &sc->sc_ue;
733
734 usbd_transfer_unsetup(sc->sc_xfer, AUE_N_TRANSFER);
735 uether_ifdetach(ue);
736 mtx_destroy(&sc->sc_mtx);
737
738 return (0);
739 }
740
741 static void
aue_intr_callback(struct usb_xfer * xfer,usb_error_t error)742 aue_intr_callback(struct usb_xfer *xfer, usb_error_t error)
743 {
744 struct aue_softc *sc = usbd_xfer_softc(xfer);
745 struct ifnet *ifp = uether_getifp(&sc->sc_ue);
746 struct aue_intrpkt pkt;
747 struct usb_page_cache *pc;
748 int actlen;
749
750 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
751
752 switch (USB_GET_STATE(xfer)) {
753 case USB_ST_TRANSFERRED:
754
755 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) &&
756 actlen >= (int)sizeof(pkt)) {
757 pc = usbd_xfer_get_frame(xfer, 0);
758 usbd_copy_out(pc, 0, &pkt, sizeof(pkt));
759
760 if (pkt.aue_txstat0)
761 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
762 if (pkt.aue_txstat0 & (AUE_TXSTAT0_LATECOLL |
763 AUE_TXSTAT0_EXCESSCOLL))
764 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, 1);
765 }
766 /* FALLTHROUGH */
767 case USB_ST_SETUP:
768 tr_setup:
769 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
770 usbd_transfer_submit(xfer);
771 return;
772
773 default: /* Error */
774 if (error != USB_ERR_CANCELLED) {
775 /* try to clear stall first */
776 usbd_xfer_set_stall(xfer);
777 goto tr_setup;
778 }
779 return;
780 }
781 }
782
783 static void
aue_bulk_read_callback(struct usb_xfer * xfer,usb_error_t error)784 aue_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
785 {
786 struct aue_softc *sc = usbd_xfer_softc(xfer);
787 struct usb_ether *ue = &sc->sc_ue;
788 struct ifnet *ifp = uether_getifp(ue);
789 struct aue_rxpkt stat;
790 struct usb_page_cache *pc;
791 int actlen;
792
793 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
794 pc = usbd_xfer_get_frame(xfer, 0);
795
796 switch (USB_GET_STATE(xfer)) {
797 case USB_ST_TRANSFERRED:
798 DPRINTFN(11, "received %d bytes\n", actlen);
799
800 if (sc->sc_flags & AUE_FLAG_VER_2) {
801 if (actlen == 0) {
802 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
803 goto tr_setup;
804 }
805 } else {
806 if (actlen <= (int)(sizeof(stat) + ETHER_CRC_LEN)) {
807 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
808 goto tr_setup;
809 }
810 usbd_copy_out(pc, actlen - sizeof(stat), &stat,
811 sizeof(stat));
812
813 /*
814 * turn off all the non-error bits in the rx status
815 * word:
816 */
817 stat.aue_rxstat &= AUE_RXSTAT_MASK;
818 if (stat.aue_rxstat) {
819 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
820 goto tr_setup;
821 }
822 /* No errors; receive the packet. */
823 actlen -= (sizeof(stat) + ETHER_CRC_LEN);
824 }
825 uether_rxbuf(ue, pc, 0, actlen);
826
827 /* FALLTHROUGH */
828 case USB_ST_SETUP:
829 tr_setup:
830 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
831 usbd_transfer_submit(xfer);
832 uether_rxflush(ue);
833 return;
834
835 default: /* Error */
836 DPRINTF("bulk read error, %s\n",
837 usbd_errstr(error));
838
839 if (error != USB_ERR_CANCELLED) {
840 /* try to clear stall first */
841 usbd_xfer_set_stall(xfer);
842 goto tr_setup;
843 }
844 return;
845 }
846 }
847
848 static void
aue_bulk_write_callback(struct usb_xfer * xfer,usb_error_t error)849 aue_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
850 {
851 struct aue_softc *sc = usbd_xfer_softc(xfer);
852 struct ifnet *ifp = uether_getifp(&sc->sc_ue);
853 struct usb_page_cache *pc;
854 struct mbuf *m;
855 uint8_t buf[2];
856 int actlen;
857
858 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
859 pc = usbd_xfer_get_frame(xfer, 0);
860
861 switch (USB_GET_STATE(xfer)) {
862 case USB_ST_TRANSFERRED:
863 DPRINTFN(11, "transfer of %d bytes complete\n", actlen);
864 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
865
866 /* FALLTHROUGH */
867 case USB_ST_SETUP:
868 tr_setup:
869 if ((sc->sc_flags & AUE_FLAG_LINK) == 0) {
870 /*
871 * don't send anything if there is no link !
872 */
873 return;
874 }
875 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
876
877 if (m == NULL)
878 return;
879 if (m->m_pkthdr.len > MCLBYTES)
880 m->m_pkthdr.len = MCLBYTES;
881 if (sc->sc_flags & AUE_FLAG_VER_2) {
882 usbd_xfer_set_frame_len(xfer, 0, m->m_pkthdr.len);
883
884 usbd_m_copy_in(pc, 0, m, 0, m->m_pkthdr.len);
885
886 } else {
887 usbd_xfer_set_frame_len(xfer, 0, (m->m_pkthdr.len + 2));
888
889 /*
890 * The ADMtek documentation says that the
891 * packet length is supposed to be specified
892 * in the first two bytes of the transfer,
893 * however it actually seems to ignore this
894 * info and base the frame size on the bulk
895 * transfer length.
896 */
897 buf[0] = (uint8_t)(m->m_pkthdr.len);
898 buf[1] = (uint8_t)(m->m_pkthdr.len >> 8);
899
900 usbd_copy_in(pc, 0, buf, 2);
901 usbd_m_copy_in(pc, 2, m, 0, m->m_pkthdr.len);
902 }
903
904 /*
905 * if there's a BPF listener, bounce a copy
906 * of this frame to him:
907 */
908 BPF_MTAP(ifp, m);
909
910 m_freem(m);
911
912 usbd_transfer_submit(xfer);
913 return;
914
915 default: /* Error */
916 DPRINTFN(11, "transfer error, %s\n",
917 usbd_errstr(error));
918
919 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
920
921 if (error != USB_ERR_CANCELLED) {
922 /* try to clear stall first */
923 usbd_xfer_set_stall(xfer);
924 goto tr_setup;
925 }
926 return;
927 }
928 }
929
930 static void
aue_tick(struct usb_ether * ue)931 aue_tick(struct usb_ether *ue)
932 {
933 struct aue_softc *sc = uether_getsc(ue);
934 struct mii_data *mii = GET_MII(sc);
935
936 AUE_LOCK_ASSERT(sc, MA_OWNED);
937
938 mii_tick(mii);
939 if ((sc->sc_flags & AUE_FLAG_LINK) == 0
940 && mii->mii_media_status & IFM_ACTIVE &&
941 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
942 sc->sc_flags |= AUE_FLAG_LINK;
943 aue_start(ue);
944 }
945 }
946
947 static void
aue_start(struct usb_ether * ue)948 aue_start(struct usb_ether *ue)
949 {
950 struct aue_softc *sc = uether_getsc(ue);
951
952 /*
953 * start the USB transfers, if not already started:
954 */
955 usbd_transfer_start(sc->sc_xfer[AUE_INTR_DT_RD]);
956 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_RD]);
957 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_WR]);
958 }
959
960 static void
aue_init(struct usb_ether * ue)961 aue_init(struct usb_ether *ue)
962 {
963 struct aue_softc *sc = uether_getsc(ue);
964 struct ifnet *ifp = uether_getifp(ue);
965 int i;
966
967 AUE_LOCK_ASSERT(sc, MA_OWNED);
968
969 /*
970 * Cancel pending I/O
971 */
972 aue_reset(sc);
973
974 /* Set MAC address */
975 for (i = 0; i != ETHER_ADDR_LEN; i++)
976 aue_csr_write_1(sc, AUE_PAR0 + i, IF_LLADDR(ifp)[i]);
977
978 /* update promiscuous setting */
979 aue_setpromisc(ue);
980
981 /* Load the multicast filter. */
982 aue_setmulti(ue);
983
984 /* Enable RX and TX */
985 aue_csr_write_1(sc, AUE_CTL0, AUE_CTL0_RXSTAT_APPEND | AUE_CTL0_RX_ENB);
986 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_TX_ENB);
987 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_EP3_CLR);
988
989 usbd_xfer_set_stall(sc->sc_xfer[AUE_BULK_DT_WR]);
990
991 ifp->if_drv_flags |= IFF_DRV_RUNNING;
992 aue_start(ue);
993 }
994
995 static void
aue_setpromisc(struct usb_ether * ue)996 aue_setpromisc(struct usb_ether *ue)
997 {
998 struct aue_softc *sc = uether_getsc(ue);
999 struct ifnet *ifp = uether_getifp(ue);
1000
1001 AUE_LOCK_ASSERT(sc, MA_OWNED);
1002
1003 /* if we want promiscuous mode, set the allframes bit: */
1004 if (ifp->if_flags & IFF_PROMISC)
1005 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC);
1006 else
1007 AUE_CLRBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC);
1008 }
1009
1010 /*
1011 * Set media options.
1012 */
1013 static int
aue_ifmedia_upd(struct ifnet * ifp)1014 aue_ifmedia_upd(struct ifnet *ifp)
1015 {
1016 struct aue_softc *sc = ifp->if_softc;
1017 struct mii_data *mii = GET_MII(sc);
1018 struct mii_softc *miisc;
1019 int error;
1020
1021 AUE_LOCK_ASSERT(sc, MA_OWNED);
1022
1023 sc->sc_flags &= ~AUE_FLAG_LINK;
1024 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
1025 PHY_RESET(miisc);
1026 error = mii_mediachg(mii);
1027 return (error);
1028 }
1029
1030 /*
1031 * Report current media status.
1032 */
1033 static void
aue_ifmedia_sts(struct ifnet * ifp,struct ifmediareq * ifmr)1034 aue_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1035 {
1036 struct aue_softc *sc = ifp->if_softc;
1037 struct mii_data *mii = GET_MII(sc);
1038
1039 AUE_LOCK(sc);
1040 mii_pollstat(mii);
1041 ifmr->ifm_active = mii->mii_media_active;
1042 ifmr->ifm_status = mii->mii_media_status;
1043 AUE_UNLOCK(sc);
1044 }
1045
1046 /*
1047 * Stop the adapter and free any mbufs allocated to the
1048 * RX and TX lists.
1049 */
1050 static void
aue_stop(struct usb_ether * ue)1051 aue_stop(struct usb_ether *ue)
1052 {
1053 struct aue_softc *sc = uether_getsc(ue);
1054 struct ifnet *ifp = uether_getifp(ue);
1055
1056 AUE_LOCK_ASSERT(sc, MA_OWNED);
1057
1058 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1059 sc->sc_flags &= ~AUE_FLAG_LINK;
1060
1061 /*
1062 * stop all the transfers, if not already stopped:
1063 */
1064 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_WR]);
1065 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_RD]);
1066 usbd_transfer_stop(sc->sc_xfer[AUE_INTR_DT_RD]);
1067
1068 aue_csr_write_1(sc, AUE_CTL0, 0);
1069 aue_csr_write_1(sc, AUE_CTL1, 0);
1070 aue_reset(sc);
1071 }
1072