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Searched defs:_val (Results 1 – 25 of 49) sorted by relevance

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/f-stack/freebsd/arm/altera/socfpga/
H A Dsocfpga_common.h36 #define WRITE4(_sc, _reg, _val) bus_write_4((_sc)->res[0], _reg, _val) argument
37 #define WRITE2(_sc, _reg, _val) bus_write_2((_sc)->res[0], _reg, _val) argument
38 #define WRITE1(_sc, _reg, _val) bus_write_1((_sc)->res[0], _reg, _val) argument
/f-stack/freebsd/arm/freescale/vybrid/
H A Dvf_common.h33 #define WRITE4(_sc, _reg, _val) \ argument
37 #define WRITE2(_sc, _reg, _val) \ argument
41 #define WRITE1(_sc, _reg, _val) \ argument
H A Dvf_dmamux.h49 #define MUX_WRITE1(_sc, _mux, _reg, _val) \ argument
H A Dvf_ehci.c114 #define PHY_WRITE4(_sc, _reg, _val) \ argument
119 #define USBC_WRITE4(_sc, _reg, _val) \ argument
H A Dvf_edma.h115 #define TCD_WRITE4(_sc, _reg, _val) \ argument
119 #define TCD_WRITE2(_sc, _reg, _val) \ argument
123 #define TCD_WRITE1(_sc, _reg, _val) \ argument
/f-stack/freebsd/arm/broadcom/bcm2835/
H A Dbcm2835_pwm.c75 #define BCM_PWM_MEM_WRITE(_sc, _off, _val) \ argument
79 #define BCM_PWM_CLK_WRITE(_sc, _off, _val) \ argument
84 #define W_CTL(_sc, _val) BCM_PWM_MEM_WRITE(_sc, 0x00, _val) argument
86 #define W_STA(_sc, _val) BCM_PWM_MEM_WRITE(_sc, 0x04, _val) argument
88 #define W_RNG(_sc, _val) BCM_PWM_MEM_WRITE(_sc, 0x10, _val) argument
90 #define W_DAT(_sc, _val) BCM_PWM_MEM_WRITE(_sc, 0x14, _val) argument
92 #define W_RNG2(_sc, _val) BCM_PWM_MEM_WRITE(_sc, 0x20, _val) argument
94 #define W_DAT2(_sc, _val) BCM_PWM_MEM_WRITE(_sc, 0x24, _val) argument
H A Dbcm2835_clkman.c67 #define BCM_CLKMAN_WRITE(_sc, _off, _val) \ argument
72 #define W_CMCLK(_sc, unit, _val) BCM_CLKMAN_WRITE(_sc, unit, 0x5a000000 | (_val)) argument
74 #define W_CMDIV(_sc, unit, _val) BCM_CLKMAN_WRITE(_sc, (unit) + 4, 0x5a000000 | (_val)) argument
H A Dbcm2835_spivar.h52 #define BCM_SPI_WRITE(_sc, _off, _val) \ argument
H A Dbcm2835_bscvar.h61 #define BCM_BSC_WRITE(_sc, _off, _val) \ argument
/f-stack/freebsd/mips/broadcom/
H A Dbcm_machdep.h112 #define BCM_SOC_WRITE_4(_addr, _reg, _val) \ argument
120 #define BCM_CORE_WRITE_4(_bp, _name, _reg, _val) \ argument
125 #define BCM_CHIPC_WRITE_4(_bp, _reg, _val) \ argument
130 #define BCM_CPU_WRITE_4(_bp, _reg, _val) \ argument
135 #define BCM_PMU_WRITE_4(_bp, _reg, _val) \ argument
/f-stack/freebsd/mips/ingenic/
H A Djz4780_common.h35 #define WRITE4(_sc, _reg, _val) \ argument
H A Djz4780_intr.c92 #define WRITE4(_sc, _reg, _val) bus_write_4((_sc)->pic_res[0], _reg, _val) argument
/f-stack/dpdk/drivers/net/axgbe/
H A Daxgbe_common.h1378 #define SET_BITS(_var, _index, _width, _val) \ argument
1387 #define SET_BITS_LE(_var, _index, _width, _val) \ argument
1437 #define AXGMAC_IOWRITE(_pdata, _reg, _val) \ argument
1514 #define XPCS32_IOWRITE(_pdata, _off, _val) \ argument
1521 #define XPCS16_IOWRITE(_pdata, _off, _val) \ argument
1549 #define XSIR0_IOWRITE(_pdata, _reg, _val) \ argument
1570 #define XSIR1_IOWRITE(_pdata, _reg, _val) \ argument
1594 #define XRXTX_IOWRITE(_pdata, _reg, _val) \ argument
1628 #define XP_IOWRITE(_pdata, _reg, _val) \ argument
1662 #define XI2C_IOWRITE(_pdata, _reg, _val) \ argument
[all …]
/f-stack/freebsd/mips/mediatek/
H A Dmtk_usb_phy.c61 #define USB_PHY_WRITE(_sc, _off, _val) bus_write_4((_sc)->res, (_off), (_val)) argument
67 #define USB_PHY_WRITE_U2(_sc, _off, _val) \ argument
H A Dmtk_xhci.c252 #define WR4(_sc, _reg, _val) bus_write_4((_sc)->sc_io_res, (_reg), (_val)) argument
/f-stack/dpdk/drivers/net/dpaa/fmlib/
H A Dncsw_ext.h12 #define UINT_TO_PTR(_val) ((void *)(uintptr_t)(_val)) argument
/f-stack/freebsd/arm/freescale/imx/
H A Dimx6_audmux.c57 #define WRITE4(_sc, _reg, _val) \ argument
H A Dimx6_sdma.c67 #define WRITE4(_sc, _reg, _val) \ argument
/f-stack/freebsd/arm/ti/
H A Dti_spivar.h61 #define TI_SPI_WRITE(_sc, _off, _val) \ argument
/f-stack/dpdk/drivers/net/qede/base/
H A Dbcm_osal.h131 #define DIRECT_REG_WR16(_reg_addr, _val) rte_write16((_val), (_reg_addr)) argument
133 #define DIRECT_REG_WR(_dev, _reg_addr, _val) rte_write32((_val), (_reg_addr)) argument
135 #define DIRECT_REG_WR_RELAXED(_dev, _reg_addr, _val) \ argument
138 #define REG_WR(_p_hwfn, _reg_offset, _val) \ argument
142 #define REG_WR16(_p_hwfn, _reg_offset, _val) \ argument
146 #define DOORBELL(_p_hwfn, _db_addr, _val) \ argument
/f-stack/dpdk/drivers/net/igc/
H A Digc_flow.c63 #define IGC_IS_ALL_BITS_SET(_val) ((_val) == (typeof(_val))~0) argument
64 #define IGC_NOT_ALL_BITS_SET(_val) ((_val) != (typeof(_val))~0) argument
/f-stack/freebsd/arm/arm/
H A Dgic.c148 #define gic_c_write_4(_sc, _reg, _val) \ argument
152 #define gic_d_write_1(_sc, _reg, _val) \ argument
154 #define gic_d_write_4(_sc, _reg, _val) \ argument
/f-stack/dpdk/drivers/net/nfp/nfpcore/
H A Dnfp_nsp.h24 #define FIELD_FIT(_mask, _val) \ argument
30 #define FIELD_PREP(_mask, _val) \ argument
H A Dnfp_nsp_eth.c25 #define FIELD_FIT(_mask, _val) \ argument
31 #define FIELD_PREP(_mask, _val) \ argument
/f-stack/freebsd/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_reset.c1736 #define REG_WRITE(_reg, _val) *((volatile u_int32_t *)(_reg)) = (_val); in ar9300_set_reset() argument
1795 #define REG_WRITE(_reg, _val) *((volatile u_int32_t *)(_reg)) = (_val); in ar9300_set_reset() argument
1799 #define DDR_REG_WRITE(_ah, _reg, _val) \ in ar9300_set_reset() argument
1977 #define REG_WRITE(_reg, _val) *((volatile u_int32_t *)(_reg)) = (_val); in ar9300_phy_disable() argument
3121 #define REG_WRITE(_reg,_val) *((volatile u_int32_t *)(_reg)) = (_val); in ar9300_process_ini() argument
5272 #define REG_WRITE(_reg, _val) *((volatile u_int32_t *)(_reg)) = (_val); in ar9300_reset() argument
5380 #define REG_WRITE(_reg, _val) *((volatile u_int32_t *)(_reg)) = (_val) in ar9300_reset() argument

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