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/f-stack/freebsd/arm/altera/socfpga/
H A Dsocfpga_common.h33 #define READ4(_sc, _reg) bus_read_4((_sc)->res[0], _reg) argument
34 #define READ2(_sc, _reg) bus_read_2((_sc)->res[0], _reg) argument
35 #define READ1(_sc, _reg) bus_read_1((_sc)->res[0], _reg) argument
36 #define WRITE4(_sc, _reg, _val) bus_write_4((_sc)->res[0], _reg, _val) argument
37 #define WRITE2(_sc, _reg, _val) bus_write_2((_sc)->res[0], _reg, _val) argument
38 #define WRITE1(_sc, _reg, _val) bus_write_1((_sc)->res[0], _reg, _val) argument
/f-stack/freebsd/arm/freescale/vybrid/
H A Dvf_common.h31 #define READ4(_sc, _reg) \ argument
33 #define WRITE4(_sc, _reg, _val) \ argument
35 #define READ2(_sc, _reg) \ argument
37 #define WRITE2(_sc, _reg, _val) \ argument
39 #define READ1(_sc, _reg) \ argument
41 #define WRITE1(_sc, _reg, _val) \ argument
H A Dvf_dmamux.h46 #define MUX_READ1(_sc, _mux, _reg) \ argument
49 #define MUX_WRITE1(_sc, _mux, _reg, _val) \ argument
/f-stack/freebsd/mips/mediatek/
H A Dmtk_usb_phy.c60 #define USB_PHY_READ(_sc, _off) bus_read_4((_sc)->res, (_off)) argument
61 #define USB_PHY_WRITE(_sc, _off, _val) bus_write_4((_sc)->res, (_off), (_val)) argument
62 #define USB_PHY_CLR_SET(_sc, _off, _clr, _set) \ argument
65 #define USB_PHY_READ_U2(_sc, _off) \ argument
67 #define USB_PHY_WRITE_U2(_sc, _off, _val) \ argument
69 #define USB_PHY_CLR_SET_U2(_sc, _off, _clr, _set) \ argument
72 #define USB_PHY_BARRIER(_sc) bus_barrier((_sc)->res, 0, 0, \ argument
75 #define USB_PHY_READ_FM(_sc, _off) \ argument
77 #define USB_PHY_WRITE_FM(_sc, _off) \ argument
79 #define USB_PHY_CLR_SET_FM(_sc, _off, _clr, _set) \ argument
H A Dmtk_gpio_v2.c112 #define GPIO_REG(_sc, _reg) ((_reg) + (_sc)->bank_id * 0x4) argument
113 #define GPIO_PIOINT(_sc) GPIO_REG((_sc), 0x0090) argument
114 #define GPIO_PIOEDGE(_sc) GPIO_REG((_sc), 0x00A0) argument
115 #define GPIO_PIORENA(_sc) GPIO_REG((_sc), 0x0050) argument
116 #define GPIO_PIOFENA(_sc) GPIO_REG((_sc), 0x0060) argument
117 #define GPIO_PIODATA(_sc) GPIO_REG((_sc), 0x0020) argument
118 #define GPIO_PIODIR(_sc) GPIO_REG((_sc), 0x0000) argument
119 #define GPIO_PIOPOL(_sc) GPIO_REG((_sc), 0x0010) argument
120 #define GPIO_PIOSET(_sc) GPIO_REG((_sc), 0x0030) argument
121 #define GPIO_PIORESET(_sc) GPIO_REG((_sc), 0x0040) argument
/f-stack/freebsd/arm/broadcom/bcm2835/
H A Dbcm2835_pwm.c75 #define BCM_PWM_MEM_WRITE(_sc, _off, _val) \ argument
77 #define BCM_PWM_MEM_READ(_sc, _off) \ argument
79 #define BCM_PWM_CLK_WRITE(_sc, _off, _val) \ argument
81 #define BCM_PWM_CLK_READ(_sc, _off) \ argument
84 #define W_CTL(_sc, _val) BCM_PWM_MEM_WRITE(_sc, 0x00, _val) argument
85 #define R_CTL(_sc) BCM_PWM_MEM_READ(_sc, 0x00) argument
87 #define R_STA(_sc) BCM_PWM_MEM_READ(_sc, 0x04) argument
89 #define R_RNG(_sc) BCM_PWM_MEM_READ(_sc, 0x10) argument
91 #define R_DAT(_sc) BCM_PWM_MEM_READ(_sc, 0x14) argument
93 #define R_RNG2(_sc) BCM_PWM_MEM_READ(_sc, 0x20) argument
[all …]
H A Dbcm2835_clkman.c67 #define BCM_CLKMAN_WRITE(_sc, _off, _val) \ argument
69 #define BCM_CLKMAN_READ(_sc, _off) \ argument
72 #define W_CMCLK(_sc, unit, _val) BCM_CLKMAN_WRITE(_sc, unit, 0x5a000000 | (_val)) argument
73 #define R_CMCLK(_sc, unit) BCM_CLKMAN_READ(_sc, unit) argument
74 #define W_CMDIV(_sc, unit, _val) BCM_CLKMAN_WRITE(_sc, (unit) + 4, 0x5a000000 | (_val)) argument
75 #define R_CMDIV(_sc, unit) BCM_CLKMAN_READ(_sc, (unit) + 4) argument
H A Dbcm2835_spivar.h52 #define BCM_SPI_WRITE(_sc, _off, _val) \ argument
54 #define BCM_SPI_READ(_sc, _off) \ argument
57 #define BCM_SPI_LOCK(_sc) \ argument
59 #define BCM_SPI_UNLOCK(_sc) \ argument
H A Dbcm2835_bscvar.h61 #define BCM_BSC_WRITE(_sc, _off, _val) \ argument
63 #define BCM_BSC_READ(_sc, _off) \ argument
66 #define BCM_BSC_LOCK(_sc) \ argument
68 #define BCM_BSC_UNLOCK(_sc) \ argument
/f-stack/freebsd/arm/ti/am335x/
H A Dam335x_ecap.c60 #define ECAP_READ2(_sc, reg) bus_read_2((_sc)->sc_mem_res, reg); argument
61 #define ECAP_WRITE2(_sc, reg, value) \ argument
63 #define ECAP_READ4(_sc, reg) bus_read_4((_sc)->sc_mem_res, reg); argument
64 #define ECAP_WRITE4(_sc, reg, value) \ argument
67 #define PWM_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) argument
68 #define PWM_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) argument
69 #define PWM_LOCK_INIT(_sc) mtx_init(&(_sc)->sc_mtx, \ argument
71 #define PWM_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx) argument
H A Dam335x_rtc.c48 #define RTC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) argument
49 #define RTC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) argument
50 #define RTC_LOCK_INIT(_sc) mtx_init(&(_sc)->sc_mtx, \ argument
52 #define RTC_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx) argument
54 #define RTC_READ4(_sc, reg) \ argument
56 #define RTC_WRITE4(_sc, reg, value) \ argument
/f-stack/freebsd/arm/nvidia/
H A Dtegra_rtc.c77 #define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, (_r), (_v)) argument
78 #define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r)) argument
80 #define LOCK(_sc) mtx_lock(&(_sc)->mtx) argument
81 #define UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) argument
82 #define SLEEP(_sc, timeout) \ argument
84 #define LOCK_INIT(_sc) \ argument
86 #define LOCK_DESTROY(_sc) mtx_destroy(&_sc->mtx) argument
87 #define ASSERT_LOCKED(_sc) mtx_assert(&_sc->mtx, MA_OWNED) argument
88 #define ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->mtx, MA_NOTOWNED) argument
H A Dtegra_mc.c99 #define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, (_r), (_v)) argument
100 #define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r)) argument
102 #define LOCK(_sc) mtx_lock(&(_sc)->mtx) argument
103 #define UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) argument
104 #define SLEEP(_sc, timeout) mtx_sleep(sc, &sc->mtx, 0, "tegra_mc", timeout); argument
105 #define LOCK_INIT(_sc) \ argument
107 #define LOCK_DESTROY(_sc) mtx_destroy(&_sc->mtx) argument
108 #define ASSERT_LOCKED(_sc) mtx_assert(&_sc->mtx, MA_OWNED) argument
109 #define ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->mtx, MA_NOTOWNED) argument
H A Das3722.c66 #define LOCK(_sc) sx_xlock(&(_sc)->lock) argument
67 #define UNLOCK(_sc) sx_xunlock(&(_sc)->lock) argument
68 #define LOCK_INIT(_sc) sx_init(&(_sc)->lock, "as3722") argument
69 #define LOCK_DESTROY(_sc) sx_destroy(&(_sc)->lock); argument
70 #define ASSERT_LOCKED(_sc) sx_assert(&(_sc)->lock, SA_XLOCKED); argument
71 #define ASSERT_UNLOCKED(_sc) sx_assert(&(_sc)->lock, SA_UNLOCKED); argument
/f-stack/freebsd/arm/ti/
H A Dti_adcvar.h34 #define ADC_READ4(_sc, reg) bus_read_4((_sc)->sc_mem_res, reg) argument
35 #define ADC_WRITE4(_sc, reg, value) \ argument
75 #define TI_ADC_LOCK(_sc) \ argument
77 #define TI_ADC_UNLOCK(_sc) \ argument
79 #define TI_ADC_LOCK_INIT(_sc) \ argument
82 #define TI_ADC_LOCK_DESTROY(_sc) \ argument
84 #define TI_ADC_LOCK_ASSERT(_sc) \ argument
H A Dti_spivar.h61 #define TI_SPI_WRITE(_sc, _off, _val) \ argument
63 #define TI_SPI_READ(_sc, _off) \ argument
66 #define TI_SPI_LOCK(_sc) \ argument
68 #define TI_SPI_UNLOCK(_sc) \ argument
H A Dti_i2c.c141 #define TI_I2C_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) argument
142 #define TI_I2C_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) argument
143 #define TI_I2C_LOCK_INIT(_sc) \ argument
146 #define TI_I2C_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx) argument
147 #define TI_I2C_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED) argument
148 #define TI_I2C_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED) argument
151 #define ti_i2c_dbg(_sc, fmt, args...) \ argument
154 #define ti_i2c_dbg(_sc, fmt, args...) argument
/f-stack/freebsd/arm/ti/twl/
H A Dtwl_clks.c137 #define TWL_CLKS_XLOCK(_sc) sx_xlock(&(_sc)->sc_sx) argument
138 #define TWL_CLKS_XUNLOCK(_sc) sx_xunlock(&(_sc)->sc_sx) argument
139 #define TWL_CLKS_SLOCK(_sc) sx_slock(&(_sc)->sc_sx) argument
140 #define TWL_CLKS_SUNLOCK(_sc) sx_sunlock(&(_sc)->sc_sx) argument
141 #define TWL_CLKS_LOCK_INIT(_sc) sx_init(&(_sc)->sc_sx, "twl_clks") argument
142 #define TWL_CLKS_LOCK_DESTROY(_sc) sx_destroy(&(_sc)->sc_sx); argument
144 #define TWL_CLKS_ASSERT_LOCKED(_sc) sx_assert(&(_sc)->sc_sx, SA_LOCKED); argument
146 #define TWL_CLKS_LOCK_UPGRADE(_sc) \ argument
151 #define TWL_CLKS_LOCK_DOWNGRADE(_sc) sx_downgrade(&(_sc)->sc_sx); argument
H A Dtwl.c114 #define TWL_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) argument
115 #define TWL_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) argument
116 #define TWL_LOCK_INIT(_sc) \ argument
119 #define TWL_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); argument
120 #define TWL_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED); argument
121 #define TWL_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED); argument
/f-stack/freebsd/arm/nvidia/drm2/
H A Dtegra_host1x.c60 #define WR4(_sc, _r, _v) bus_rite_4((_sc)->mem_res, (_r), (_v)) argument
61 #define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r)) argument
63 #define LOCK(_sc) sx_xlock(&(_sc)->lock) argument
64 #define UNLOCK(_sc) sx_xunlock(&(_sc)->lock) argument
65 #define SLEEP(_sc, timeout) sx_sleep(sc, &sc->lock, 0, "host1x", timeout); argument
66 #define LOCK_INIT(_sc) sx_init(&_sc->lock, "host1x") argument
67 #define LOCK_DESTROY(_sc) sx_destroy(&_sc->lock) argument
68 #define ASSERT_LOCKED(_sc) sx_assert(&_sc->lock, SA_LOCKED) argument
69 #define ASSERT_UNLOCKED(_sc) sx_assert(&_sc->lock, SA_UNLOCKED) argument
/f-stack/freebsd/arm64/rockchip/
H A Drk_pcie_phy.c92 #define PHY_LOCK(_sc) mtx_lock(&(_sc)->mtx) argument
93 #define PHY_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) argument
94 #define PHY_LOCK_INIT(_sc) mtx_init(&(_sc)->mtx, \ argument
96 #define PHY_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx); argument
97 #define PHY_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED); argument
98 #define PHY_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->mtx, MA_NOTOWNED); argument
/f-stack/freebsd/mips/ingenic/
H A Djz4780_common.h33 #define READ4(_sc, _reg) \ argument
35 #define WRITE4(_sc, _reg, _val) \ argument
H A Djz4780_clk.h43 #define CLK_LOCK(_sc) mtx_lock((_sc)->clk_mtx) argument
44 #define CLK_UNLOCK(_sc) mtx_unlock((_sc)->clk_mtx) argument
46 #define CLK_WR_4(_sc, off, val) bus_write_4((_sc)->clk_res, (off), (val)) argument
47 #define CLK_RD_4(_sc, off) bus_read_4((_sc)->clk_res, (off)) argument
/f-stack/freebsd/mips/cavium/
H A Docteon_gpiovar.h36 #define GPIO_LOCK(_sc) mtx_lock(&(_sc)->gpio_mtx) argument
37 #define GPIO_UNLOCK(_sc) mtx_unlock(&(_sc)->gpio_mtx) argument
38 #define GPIO_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->gpio_mtx, MA_OWNED) argument
/f-stack/freebsd/arm64/nvidia/tegra210/
H A Dmax77620.c65 #define LOCK(_sc) sx_xlock(&(_sc)->lock) argument
66 #define UNLOCK(_sc) sx_xunlock(&(_sc)->lock) argument
67 #define LOCK_INIT(_sc) sx_init(&(_sc)->lock, "max77620") argument
68 #define LOCK_DESTROY(_sc) sx_destroy(&(_sc)->lock); argument
69 #define ASSERT_LOCKED(_sc) sx_assert(&(_sc)->lock, SA_XLOCKED); argument
70 #define ASSERT_UNLOCKED(_sc) sx_assert(&(_sc)->lock, SA_UNLOCKED); argument

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