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/f-stack/freebsd/contrib/openzfs/module/zfs/
H A Dvdev_raidz_math_powerpc_altivec_common.h33 #define _REG_CNT(_0, _1, _2, _3, _4, _5, _6, _7, N, ...) N argument
40 #define VR4_(_1, _2, _3, _4, REG, ...) "%[w"#REG"]" argument
41 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "%[w"#REG"]" argument
42 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "%[w"#REG"]" argument
43 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "%[w"#REG"]" argument
69 #define RVR4_(_1, _2, _3, _4, REG, ...) [w##REG] "v" (w##REG) argument
70 #define RVR5_(_1, _2, _3, _4, _5, REG, ...) [w##REG] "v" (w##REG) argument
89 #define WVR4_(_1, _2, _3, _4, REG, ...) [w##REG] "=v" (w##REG) argument
90 #define WVR5_(_1, _2, _3, _4, _5, REG, ...) [w##REG] "=v" (w##REG) argument
109 #define UVR4_(_1, _2, _3, _4, REG, ...) [w##REG] "+&v" (w##REG) argument
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H A Dvdev_raidz_math_aarch64_neon_common.h32 #define _REG_CNT(_0, _1, _2, _3, _4, _5, _6, _7, N, ...) N argument
39 #define VR4_(_1, _2, _3, _4, REG, ...) "%[w"#REG"]" argument
40 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "%[w"#REG"]" argument
41 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "%[w"#REG"]" argument
42 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "%[w"#REG"]" argument
68 #define RVR4_(_1, _2, _3, _4, REG, ...) [w##REG] "w" (w##REG) argument
69 #define RVR5_(_1, _2, _3, _4, _5, REG, ...) [w##REG] "w" (w##REG) argument
88 #define WVR4_(_1, _2, _3, _4, REG, ...) [w##REG] "=w" (w##REG) argument
89 #define WVR5_(_1, _2, _3, _4, _5, REG, ...) [w##REG] "=w" (w##REG) argument
108 #define UVR4_(_1, _2, _3, _4, REG, ...) [w##REG] "+&w" (w##REG) argument
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H A Dvdev_raidz_math_avx512f.c38 #define _REG_CNT(_0, _1, _2, _3, _4, _5, _6, _7, N, ...) N argument
45 #define VR4_(_1, _2, _3, _4, REG, ...) "zmm"#REG argument
46 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "zmm"#REG argument
47 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "zmm"#REG argument
48 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "zmm"#REG argument
63 #define VRy4_(_1, _2, _3, _4, REG, ...) "ymm"#REG argument
64 #define VRy5_(_1, _2, _3, _4, _5, REG, ...) "ymm"#REG argument
65 #define VRy6_(_1, _2, _3, _4, _5, _6, REG, ...) "ymm"#REG argument
66 #define VRy7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "ymm"#REG argument
H A Dvdev_raidz_math_sse2.c37 #define _REG_CNT(_0, _1, _2, _3, _4, _5, _6, _7, N, ...) N argument
44 #define VR4_(_1, _2, _3, _4, REG, ...) "xmm"#REG argument
45 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "xmm"#REG argument
46 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "xmm"#REG argument
47 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "xmm"#REG argument
H A Dvdev_raidz_math_avx512bw.c39 #define _REG_CNT(_0, _1, _2, _3, _4, _5, _6, _7, N, ...) N argument
46 #define VR4_(_1, _2, _3, _4, REG, ...) "zmm"#REG argument
47 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "zmm"#REG argument
48 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "zmm"#REG argument
49 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "zmm"#REG argument
H A Dvdev_raidz_math_avx2.c35 #define _REG_CNT(_0, _1, _2, _3, _4, _5, _6, _7, N, ...) N argument
42 #define VR4_(_1, _2, _3, _4, REG, ...) "ymm"#REG argument
43 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "ymm"#REG argument
44 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "ymm"#REG argument
45 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "ymm"#REG argument
H A Dvdev_raidz_math_ssse3.c36 #define _REG_CNT(_0, _1, _2, _3, _4, _5, _6, _7, N, ...) N argument
43 #define VR4_(_1, _2, _3, _4, REG, ...) "xmm"#REG argument
44 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "xmm"#REG argument
45 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "xmm"#REG argument
46 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "xmm"#REG argument