1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Cavium, Inc
3 */
4
5 #ifndef _RTE_OCTEONTX_ZIP_VF_H_
6 #define _RTE_OCTEONTX_ZIP_VF_H_
7
8 #include <unistd.h>
9
10 #include <rte_bus_pci.h>
11 #include <rte_comp.h>
12 #include <rte_compressdev.h>
13 #include <rte_compressdev_pmd.h>
14 #include <rte_malloc.h>
15 #include <rte_memory.h>
16 #include <rte_spinlock.h>
17
18 #include <zip_regs.h>
19
20 extern int octtx_zip_logtype_driver;
21
22 /* ZIP VF Control/Status registers (CSRs): */
23 /* VF_BAR0: */
24 #define ZIP_VQ_ENA (0x10)
25 #define ZIP_VQ_SBUF_ADDR (0x20)
26 #define ZIP_VF_PF_MBOXX(x) (0x400 | (x)<<3)
27 #define ZIP_VQ_DOORBELL (0x1000)
28
29 /**< Vendor ID */
30 #define PCI_VENDOR_ID_CAVIUM 0x177D
31 /**< PCI device id of ZIP VF */
32 #define PCI_DEVICE_ID_OCTEONTX_ZIPVF 0xA037
33 #define PCI_DEVICE_ID_OCTEONTX2_ZIPVF 0xA083
34
35 /* maximum number of zip vf devices */
36 #define ZIP_MAX_VFS 8
37
38 /* max size of one chunk */
39 #define ZIP_MAX_CHUNK_SIZE 8192
40
41 /* each instruction is fixed 128 bytes */
42 #define ZIP_CMD_SIZE 128
43
44 #define ZIP_CMD_SIZE_WORDS (ZIP_CMD_SIZE >> 3) /* 16 64_bit words */
45
46 /* size of next chunk buffer pointer */
47 #define ZIP_MAX_NCBP_SIZE 8
48
49 /* size of instruction queue in units of instruction size */
50 #define ZIP_MAX_NUM_CMDS ((ZIP_MAX_CHUNK_SIZE - ZIP_MAX_NCBP_SIZE) / \
51 ZIP_CMD_SIZE) /* 63 */
52
53 /* size of instruct queue in bytes */
54 #define ZIP_MAX_CMDQ_SIZE ((ZIP_MAX_NUM_CMDS * ZIP_CMD_SIZE) + \
55 ZIP_MAX_NCBP_SIZE)/* ~8072ull */
56
57 #define ZIP_BUF_SIZE 256
58
59 #define ZIP_SGPTR_ALIGN 16
60 #define ZIP_CMDQ_ALIGN 128
61 #define MAX_SG_LEN ((ZIP_BUF_SIZE - ZIP_SGPTR_ALIGN) / sizeof(void *))
62
63 /**< ZIP PMD specified queue pairs */
64 #define ZIP_MAX_VF_QUEUE 1
65
66 #define ZIP_ALIGN_ROUNDUP(x, _align) \
67 ((_align) * (((x) + (_align) - 1) / (_align)))
68
69 /**< ZIP PMD device name */
70 #define COMPRESSDEV_NAME_ZIP_PMD compress_octeonx
71
72 #define ZIP_PMD_LOG(level, fmt, args...) \
73 rte_log(RTE_LOG_ ## level, \
74 octtx_zip_logtype_driver, "%s(): "fmt "\n", \
75 __func__, ##args)
76
77 #define ZIP_PMD_INFO(fmt, args...) \
78 ZIP_PMD_LOG(INFO, fmt, ## args)
79 #define ZIP_PMD_ERR(fmt, args...) \
80 ZIP_PMD_LOG(ERR, fmt, ## args)
81
82 /* resources required to process stream */
83 enum NUM_BUFS_PER_STREAM {
84 RES_BUF = 0,
85 CMD_BUF,
86 HASH_CTX_BUF,
87 DECOMP_CTX_BUF,
88 IN_DATA_BUF,
89 OUT_DATA_BUF,
90 HISTORY_DATA_BUF,
91 MAX_BUFS_PER_STREAM
92 };
93
94 struct zip_stream;
95 struct zipvf_qp;
96
97 /* Algorithm handler function prototype */
98 typedef int (*comp_func_t)(struct rte_comp_op *op,
99 struct zipvf_qp *qp, struct zip_stream *zstrm);
100
101 /**
102 * ZIP private stream structure
103 */
104 struct zip_stream {
105 union zip_inst_s *inst;
106 /* zip instruction pointer */
107 comp_func_t func;
108 /* function to process comp operation */
109 void *bufs[MAX_BUFS_PER_STREAM];
110 } __rte_cache_aligned;
111
112
113 /**
114 * ZIP instruction Queue
115 */
116 struct zipvf_cmdq {
117 rte_spinlock_t qlock;
118 /* queue lock */
119 uint64_t *sw_head;
120 /* pointer to start of 8-byte word length queue-head */
121 uint8_t *va;
122 /* pointer to instruction queue virtual address */
123 rte_iova_t iova;
124 /* iova addr of cmdq head*/
125 };
126
127 /**
128 * ZIP device queue structure
129 */
130 struct zipvf_qp {
131 struct zipvf_cmdq cmdq;
132 /* Hardware instruction queue structure */
133 struct rte_ring *processed_pkts;
134 /* Ring for placing processed packets */
135 struct rte_compressdev_stats qp_stats;
136 /* Queue pair statistics */
137 uint16_t id;
138 /* Queue Pair Identifier */
139 const char *name;
140 /* Unique Queue Pair Name */
141 struct zip_vf *vf;
142 /* pointer to device, queue belongs to */
143 } __rte_cache_aligned;
144
145 /**
146 * ZIP VF device structure.
147 */
148 struct zip_vf {
149 int vfid;
150 /* vf index */
151 struct rte_pci_device *pdev;
152 /* pci device */
153 void *vbar0;
154 /* CSR base address for underlying BAR0 VF.*/
155 uint64_t dom_sdom;
156 /* Storing mbox domain and subdomain id for app rerun*/
157 uint32_t max_nb_queue_pairs;
158 /* pointer to device qps */
159 struct rte_mempool *zip_mp;
160 /* pointer to pools */
161 } __rte_cache_aligned;
162
163
164 static inline void
zipvf_prepare_in_buf(struct zip_stream * zstrm,struct rte_comp_op * op)165 zipvf_prepare_in_buf(struct zip_stream *zstrm, struct rte_comp_op *op)
166 {
167 uint32_t offset, inlen;
168 struct rte_mbuf *m_src;
169 union zip_inst_s *inst = zstrm->inst;
170
171 inlen = op->src.length;
172 offset = op->src.offset;
173 m_src = op->m_src;
174
175 /* Prepare direct input data pointer */
176 inst->s.dg = 0;
177 inst->s.inp_ptr_addr.s.addr =
178 rte_pktmbuf_iova_offset(m_src, offset);
179 inst->s.inp_ptr_ctl.s.length = inlen;
180 }
181
182 static inline void
zipvf_prepare_out_buf(struct zip_stream * zstrm,struct rte_comp_op * op)183 zipvf_prepare_out_buf(struct zip_stream *zstrm, struct rte_comp_op *op)
184 {
185 uint32_t offset;
186 struct rte_mbuf *m_dst;
187 union zip_inst_s *inst = zstrm->inst;
188
189 offset = op->dst.offset;
190 m_dst = op->m_dst;
191
192 /* Prepare direct input data pointer */
193 inst->s.ds = 0;
194 inst->s.out_ptr_addr.s.addr =
195 rte_pktmbuf_iova_offset(m_dst, offset);
196 inst->s.totaloutputlength = rte_pktmbuf_pkt_len(m_dst) -
197 op->dst.offset;
198 inst->s.out_ptr_ctl.s.length = inst->s.totaloutputlength;
199 }
200
201 static inline void
zipvf_prepare_cmd_stateless(struct rte_comp_op * op,struct zip_stream * zstrm)202 zipvf_prepare_cmd_stateless(struct rte_comp_op *op, struct zip_stream *zstrm)
203 {
204 union zip_inst_s *inst = zstrm->inst;
205
206 /* set flush flag to always 1*/
207 inst->s.ef = 1;
208
209 if (inst->s.op == ZIP_OP_E_DECOMP)
210 inst->s.sf = 1;
211 else
212 inst->s.sf = 0;
213
214 /* Set input checksum */
215 inst->s.adlercrc32 = op->input_chksum;
216
217 /* Prepare gather buffers */
218 zipvf_prepare_in_buf(zstrm, op);
219 zipvf_prepare_out_buf(zstrm, op);
220 }
221
222 #ifdef ZIP_DBG
223 static inline void
zip_dump_instruction(void * inst)224 zip_dump_instruction(void *inst)
225 {
226 union zip_inst_s *cmd83 = (union zip_inst_s *)inst;
227 printf("####### START ########\n");
228 printf("doneint:%d totaloutputlength:%d\n", cmd83->s.doneint,
229 cmd83->s.totaloutputlength);
230 printf("exnum:%d iv:%d exbits:%d hmif:%d halg:%d\n", cmd83->s.exn,
231 cmd83->s.iv, cmd83->s.exbits, cmd83->s.hmif, cmd83->s.halg);
232 printf("flush:%d speed:%d cc:%d\n", cmd83->s.sf,
233 cmd83->s.ss, cmd83->s.cc);
234 printf("eof:%d bof:%d op:%d dscatter:%d dgather:%d hgather:%d\n",
235 cmd83->s.ef, cmd83->s.bf, cmd83->s.op, cmd83->s.ds,
236 cmd83->s.dg, cmd83->s.hg);
237 printf("historylength:%d adler32:%d\n", cmd83->s.historylength,
238 cmd83->s.adlercrc32);
239 printf("ctx_ptr.addr:0x%"PRIx64"\n", cmd83->s.ctx_ptr_addr.s.addr);
240 printf("ctx_ptr.len:%d\n", cmd83->s.ctx_ptr_ctl.s.length);
241 printf("history_ptr.addr:0x%"PRIx64"\n", cmd83->s.his_ptr_addr.s.addr);
242 printf("history_ptr.len:%d\n", cmd83->s.his_ptr_ctl.s.length);
243 printf("inp_ptr.addr:0x%"PRIx64"\n", cmd83->s.inp_ptr_addr.s.addr);
244 printf("inp_ptr.len:%d\n", cmd83->s.inp_ptr_ctl.s.length);
245 printf("out_ptr.addr:0x%"PRIx64"\n", cmd83->s.out_ptr_addr.s.addr);
246 printf("out_ptr.len:%d\n", cmd83->s.out_ptr_ctl.s.length);
247 printf("result_ptr.len:%d\n", cmd83->s.res_ptr_ctl.s.length);
248 printf("####### END ########\n");
249 }
250 #endif
251
252 int
253 zipvf_create(struct rte_compressdev *compressdev);
254
255 int
256 zipvf_destroy(struct rte_compressdev *compressdev);
257
258 int
259 zipvf_q_init(struct zipvf_qp *qp);
260
261 int
262 zipvf_q_term(struct zipvf_qp *qp);
263
264 void
265 zipvf_push_command(struct zipvf_qp *qp, union zip_inst_s *zcmd);
266
267 int
268 zip_process_op(struct rte_comp_op *op,
269 struct zipvf_qp *qp,
270 struct zip_stream *zstrm);
271
272 uint64_t
273 zip_reg_read64(uint8_t *hw_addr, uint64_t offset);
274
275 void
276 zip_reg_write64(uint8_t *hw_addr, uint64_t offset, uint64_t val);
277
278 #endif /* _RTE_ZIP_VF_H_ */
279