1 //===--- SystemZ.h - Declare SystemZ target feature support -----*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file declares SystemZ TargetInfo objects. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_SYSTEMZ_H 15 #define LLVM_CLANG_LIB_BASIC_TARGETS_SYSTEMZ_H 16 17 #include "clang/Basic/TargetInfo.h" 18 #include "clang/Basic/TargetOptions.h" 19 #include "llvm/ADT/Triple.h" 20 #include "llvm/Support/Compiler.h" 21 22 namespace clang { 23 namespace targets { 24 25 class LLVM_LIBRARY_VISIBILITY SystemZTargetInfo : public TargetInfo { 26 27 static const Builtin::Info BuiltinInfo[]; 28 static const char *const GCCRegNames[]; 29 std::string CPU; 30 int ISARevision; 31 bool HasTransactionalExecution; 32 bool HasVector; 33 34 public: SystemZTargetInfo(const llvm::Triple & Triple,const TargetOptions &)35 SystemZTargetInfo(const llvm::Triple &Triple, const TargetOptions &) 36 : TargetInfo(Triple), CPU("z10"), ISARevision(8), 37 HasTransactionalExecution(false), HasVector(false) { 38 IntMaxType = SignedLong; 39 Int64Type = SignedLong; 40 TLSSupported = true; 41 IntWidth = IntAlign = 32; 42 LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64; 43 PointerWidth = PointerAlign = 64; 44 LongDoubleWidth = 128; 45 LongDoubleAlign = 64; 46 LongDoubleFormat = &llvm::APFloat::IEEEquad(); 47 DefaultAlignForAttributeAligned = 64; 48 MinGlobalAlign = 16; 49 resetDataLayout("E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"); 50 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; 51 } 52 53 void getTargetDefines(const LangOptions &Opts, 54 MacroBuilder &Builder) const override; 55 56 ArrayRef<Builtin::Info> getTargetBuiltins() const override; 57 58 ArrayRef<const char *> getGCCRegNames() const override; 59 getGCCRegAliases()60 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override { 61 // No aliases. 62 return None; 63 } 64 65 ArrayRef<TargetInfo::AddlRegName> getGCCAddlRegNames() const override; 66 67 bool validateAsmConstraint(const char *&Name, 68 TargetInfo::ConstraintInfo &info) const override; 69 getClobbers()70 const char *getClobbers() const override { 71 // FIXME: Is this really right? 72 return ""; 73 } 74 getBuiltinVaListKind()75 BuiltinVaListKind getBuiltinVaListKind() const override { 76 return TargetInfo::SystemZBuiltinVaList; 77 } 78 79 int getISARevision(StringRef Name) const; 80 isValidCPUName(StringRef Name)81 bool isValidCPUName(StringRef Name) const override { 82 return getISARevision(Name) != -1; 83 } 84 85 void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override; 86 setCPU(const std::string & Name)87 bool setCPU(const std::string &Name) override { 88 CPU = Name; 89 ISARevision = getISARevision(CPU); 90 return ISARevision != -1; 91 } 92 93 bool initFeatureMap(llvm::StringMap<bool> & Features,DiagnosticsEngine & Diags,StringRef CPU,const std::vector<std::string> & FeaturesVec)94 initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, 95 StringRef CPU, 96 const std::vector<std::string> &FeaturesVec) const override { 97 int ISARevision = getISARevision(CPU); 98 if (ISARevision >= 10) 99 Features["transactional-execution"] = true; 100 if (ISARevision >= 11) 101 Features["vector"] = true; 102 if (ISARevision >= 12) 103 Features["vector-enhancements-1"] = true; 104 return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec); 105 } 106 handleTargetFeatures(std::vector<std::string> & Features,DiagnosticsEngine & Diags)107 bool handleTargetFeatures(std::vector<std::string> &Features, 108 DiagnosticsEngine &Diags) override { 109 HasTransactionalExecution = false; 110 HasVector = false; 111 for (const auto &Feature : Features) { 112 if (Feature == "+transactional-execution") 113 HasTransactionalExecution = true; 114 else if (Feature == "+vector") 115 HasVector = true; 116 } 117 // If we use the vector ABI, vector types are 64-bit aligned. 118 if (HasVector) { 119 MaxVectorAlign = 64; 120 resetDataLayout("E-m:e-i1:8:16-i8:8:16-i64:64-f128:64" 121 "-v128:64-a:8:16-n32:64"); 122 } 123 return true; 124 } 125 126 bool hasFeature(StringRef Feature) const override; 127 checkCallingConvention(CallingConv CC)128 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override { 129 switch (CC) { 130 case CC_C: 131 case CC_Swift: 132 case CC_OpenCLKernel: 133 return CCCR_OK; 134 default: 135 return CCCR_Warning; 136 } 137 } 138 getABI()139 StringRef getABI() const override { 140 if (HasVector) 141 return "vector"; 142 return ""; 143 } 144 useFloat128ManglingForLongDouble()145 bool useFloat128ManglingForLongDouble() const override { return true; } 146 }; 147 } // namespace targets 148 } // namespace clang 149 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_SYSTEMZ_H 150