| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 289 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue() local 629 unsigned ShiftVal = AArch64_AM::getShiftValue(ShiftOpnd); in getImm8OptLsl() local 656 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue() local
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| H A D | AArch64InstPrinter.cpp | 1277 unsigned ShiftVal = AArch64_AM::getArithShiftValue(Val); in printArithExtend() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMatInt.cpp | 482 for (unsigned ShiftVal = 0; ShiftVal < Size; ShiftVal += PlatRegSize) { in getIntMatCost() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 1252 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub() local 1274 uint64_t ShiftVal = C->getZExtValue(); in emitAddSub() local 1621 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp() local 1636 uint64_t ShiftVal = C->getZExtValue(); in emitLogicalOp() local 4657 uint64_t ShiftVal = C->getValue().logBase2(); in selectMul() local 4720 uint64_t ShiftVal = C->getZExtValue(); in selectShift() local
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| H A D | AArch64ISelDAGToDAG.cpp | 659 unsigned ShiftVal = CSD->getZExtValue(); in isWorthFoldingSHL() local 916 unsigned ShiftVal = 0; in SelectArithExtendedRegister() local 969 unsigned ShiftVal = 0; in SelectArithUXTXRegister() local 1201 unsigned ShiftVal = CSD->getZExtValue(); in SelectExtendedSHL() local
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| H A D | AArch64InstrInfo.cpp | 936 unsigned ShiftVal = AArch64_AM::getShiftValue(Imm); in isFalkorShiftExtFast() local 963 unsigned ShiftVal = AArch64_AM::getShiftValue(Imm); in isFalkorShiftExtFast() local 971 unsigned ShiftVal = AArch64_AM::getShiftValue(Imm); in isFalkorShiftExtFast() local
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| H A D | AArch64TargetTransformInfo.cpp | 365 for (unsigned ShiftVal = 0; ShiftVal < BitSize; ShiftVal += 64) { in getIntImmCost() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMParallelDSP.cpp | 781 Value *ShiftVal = ConstantInt::get(LoadTy, OffsetTy->getBitWidth()); in CreateWideLoad() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 1738 auto matchFirstShift = [&](const MachineInstr *MI, uint64_t &ShiftVal) { in matchShiftOfShiftedLogic() 1856 unsigned &ShiftVal) { in matchCombineMulToShl() 1868 unsigned &ShiftVal) { in applyCombineMulToShl() 2166 unsigned &ShiftVal) { in matchCombineShiftToUnmerge() 2190 const unsigned &ShiftVal) { in applyCombineShiftToUnmerge()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 1984 uint64_t ShiftVal = C->getZExtValue(); in selectShift() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstCombineIntrinsic.cpp | 389 APInt ShiftVal = COp->getValue(); in simplifyX86varShift() local
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| H A D | X86TargetTransformInfo.cpp | 5511 for (unsigned ShiftVal = 0; ShiftVal < BitSize; ShiftVal += 64) { in getIntImmCost() local
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| H A D | X86ISelLowering.cpp | 6023 uint64_t ShiftVal = N.getConstantOperandVal(1); in getFauxShuffleMask() local 6624 SDValue ShiftVal = DAG.getTargetConstant(NumBits / 8, dl, MVT::i8); in getVShift() local 17977 int ShiftVal = (IdxVal % 4) * 8; in LowerEXTRACT_VECTOR_ELT() local 17989 int ShiftVal = (IdxVal % 2) * 8; in LowerEXTRACT_VECTOR_ELT() local 30226 auto *ShiftVal = dyn_cast<ConstantInt>(I->getOperand(0)); in FindSingleBitChange() local 36947 const APInt &ShiftVal = Op.getConstantOperandAPInt(1); in ComputeNumSignBitsForTargetNode() local 36958 APInt ShiftVal = Op.getConstantOperandAPInt(1); in ComputeNumSignBitsForTargetNode() local 47541 unsigned ShiftVal = N->getConstantOperandVal(1); in combineVectorShiftImm() local 48271 unsigned ShiftVal = SplatVal.countr_one(); in combineAndMaskToShift() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 2257 uint32_t ShiftVal = Shift->getZExtValue(); in SelectS_BFE() local 2278 uint32_t ShiftVal = Shift->getZExtValue(); in SelectS_BFE() local
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| H A D | AMDGPUISelLowering.cpp | 3089 auto ShiftVal = DAG.getConstant(LeadingZeroes, SL, MVT::i32); in lowerCTLZResults() local 5165 SDValue ShiftVal = DAG.getConstant(OffsetVal, DL, MVT::i32); in PerformDAGCombine() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCasts.cpp | 401 ConstantInt *ShiftVal = nullptr; in foldVecTruncToExtElt() local
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| H A D | InstCombineCompares.cpp | 2217 const APInt *ShiftVal; in foldICmpShlConstant() local
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| /freebsd-14.2/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 15025 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0xff; in EmitX86BuiltinExpr() local 15066 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0xff; in EmitX86BuiltinExpr() local 15149 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[1])->getZExtValue() & 0xff; in EmitX86BuiltinExpr() local 15178 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[1])->getZExtValue() & 0xff; in EmitX86BuiltinExpr() local 15208 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[1])->getZExtValue() & 0xff; in EmitX86BuiltinExpr() local 15229 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[1])->getZExtValue() & 0xff; in EmitX86BuiltinExpr() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 2383 auto ShiftVal = Op.getOperand(1); in LowerShift() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 7449 unsigned ShiftVal = AArch64_AM::getShifterImm(ShType, Val); in selectShiftedRegister() local 7540 uint64_t ShiftVal = 0; in selectArithExtendedRegister() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/IR/ |
| H A D | AutoUpgrade.cpp | 1565 unsigned ShiftVal = cast<llvm::ConstantInt>(Shift)->getZExtValue(); in upgradeX86ALIGNIntrinsics() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 2715 static bool isSimpleShift(SDValue N, unsigned &ShiftVal) { in isSimpleShift() 2893 unsigned NewCCMask, ShiftVal; in adjustForTestUnderMask() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 5359 unsigned ShiftVal = 0; in Select() local
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