| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VVPISelLowering.cpp | 351 MVT ResVT = splitVectorType(Op.getValue(0).getSimpleValueType()); in splitVectorOp() local
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| H A D | VECustomDAG.cpp | 562 SDValue VECustomDAG::getLegalReductionOpVVP(unsigned VVPOpcode, EVT ResVT, in getLegalReductionOpVVP()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 301 EVT ResVT = N->getValueType(0); in ScalarizeVecRes_OverflowOp() local 1725 EVT ResVT = N->getValueType(0); in SplitVecRes_OverflowOp() local 3146 EVT ResVT = N->getValueType(0); in SplitVecOp_VECREDUCE() local 3165 EVT ResVT = N->getValueType(0); in SplitVecOp_VECREDUCE_SEQ() local 3191 EVT ResVT = N->getValueType(0); in SplitVecOp_VP_REDUCE() local 3215 EVT ResVT = N->getValueType(0); in SplitVecOp_UnaryOp() local 3274 EVT ResVT = N->getValueType(0); in SplitVecOp_INSERT_SUBVECTOR() local 3958 EVT ResVT = N->getValueType(0); in SplitVecOp_FP_ROUND() local 4020 EVT ResVT = N->getValueType(0); in SplitVecOp_FP_TO_XINT_SAT() local 4682 EVT ResVT = N->getValueType(0); in WidenVecRes_OverflowOp() local [all …]
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| H A D | LegalizeIntegerTypes.cpp | 338 EVT ResVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in PromoteIntRes_Atomic0() local 2446 EVT ResVT = N->getValueType(0); in PromoteIntOp_VECREDUCE() local 5543 EVT ResVT = V0.getValueType(); in PromoteIntRes_VECTOR_INTERLEAVE_DEINTERLEAVE() local 5922 EVT ResVT = N->getValueType(0); in PromoteIntOp_CONCAT_VECTORS() local
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| H A D | SelectionDAG.cpp | 2022 SDValue SelectionDAG::getStepVector(const SDLoc &DL, EVT ResVT) { in getStepVector() 2027 SDValue SelectionDAG::getStepVector(const SDLoc &DL, EVT ResVT, APInt StepVal) { in getStepVector() 12155 EVT ResVT = N->getValueType(0); in UnrollVectorOverflowOp() local
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| H A D | DAGCombiner.cpp | 8161 EVT ResVT = ExtractFrom.getValueType(); in extractShiftForRotate() local 19111 EVT ResVT = Use->getValueType(0); in canMergeExpensiveCrossRegisterBankCopy() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 2495 EVT ResVT = N->getValueType(0); in performVectorExtendToFPCombine() local 2529 EVT ResVT = N->getValueType(0); in performVectorExtendCombine() local 2598 EVT ResVT; in performVectorTruncZeroCombine() local 2645 EVT ResVT; in performVectorTruncZeroCombine() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMTargetTransformInfo.cpp | 1759 EVT ResVT = TLI->getValueType(DL, ResTy); in getExtendedReductionCost() local 1794 EVT ResVT = TLI->getValueType(DL, ResTy); in getMulAccReductionCost() local
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| H A D | ARMISelLowering.cpp | 17078 EVT ResVT = N->getValueType(0); in PerformVECREDUCE_ADDCombine() local 21232 bool ARMTargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 5693 EVT ResVT = N->getValueType(0); in ReplaceLoadVector() local 5853 EVT ResVT = N->getValueType(0); in ReplaceINTRINSIC_W_CHAIN() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1788 bool AArch64TargetLowering::shouldExpandGetActiveLaneMask(EVT ResVT, in shouldExpandGetActiveLaneMask() 5480 EVT ResVT = Op.getValueType(); in LowerINTRINSIC_WO_CHAIN() local 16465 bool AArch64TargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap() 20834 EVT ResVT; in trySimplifySrlAddToRshrnb() local 20875 EVT ResVT = N->getValueType(0); in performUzpCombine() local 21023 EVT ResVT = N->getValueType(0); in performGLD1Combine() local 22820 EVT ResVT = N->getValueType(0); in performVSelectCombine() local 22843 EVT ResVT = N->getValueType(0); in performSelectCombine() local 26187 EVT ResVT = SrcVT.getVectorElementType(); in LowerVECREDUCE_SEQ_FADD() local 26267 EVT ResVT = (Opcode == AArch64ISD::UADDV_PRED) ? MVT::i64 : in LowerReductionToSVE() local
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | BasicTTIImpl.h | 1700 EVT ResVT = getTLI()->getValueType(DL, RetTy, true); in getIntrinsicInstrCost() local
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| H A D | TargetLowering.h | 3204 virtual bool isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 3616 EVT ResVT = VA.getValVT(); in fastLowerCall() local
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| H A D | X86ISelLowering.cpp | 9075 MVT ResVT = Op.getSimpleValueType(); in LowerAVXCONCAT_VECTORS() local 9143 MVT ResVT = Op.getSimpleValueType(); in LowerCONCAT_VECTORSvXi1() local 19888 EVT ResVT = getSetCCResultType(DAG.getDataLayout(), in FP_TO_INTHelper() local 20695 MVT ResVT = MVT::v4i32; in LowerFP_TO_INT() local 20736 MVT ResVT = VT; in LowerFP_TO_INT() local 32408 EVT ResVT = EleVT == MVT::i32 ? MVT::v4i32 : MVT::v8i16; in ReplaceNodeResults() local 43562 EVT ResVT = in combineVPDPBUSDPattern() local 43637 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), ExtractVT, in combineBasicSADPattern() local 51370 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i16, in detectPMADDUBSW() local 54160 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i32, in matchPMADDWD() local [all …]
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| H A D | X86ISelDAGToDAG.cpp | 4895 MVT ResVT = Setcc.getSimpleValueType(); in tryVPTESTM() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 3809 EVT ResVT = Op.getValueType(); in lowerBITCAST() local 6462 SDValue SystemZTargetLowering::combineExtract(const SDLoc &DL, EVT ResVT, in combineExtract() 6594 EVT ResVT = (TruncBytes < 4 ? MVT::i32 : TruncVT); in combineTruncateExtract() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 2163 bool HexagonTargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 1867 bool SITargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap() 5511 auto ResVT = DAG.GetSplitDestVTs(VT); in splitTernaryVectorOp() local 13081 EVT ResVT = N->getValueType(0); in performExtractVectorEltCombine() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 4594 EVT ResVT = VecVT.changeVectorElementTypeToInteger(); in trySETCC() local
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| H A D | PPCISelLowering.cpp | 8039 EVT ResVT = Op.getValueType(); in LowerSELECT_CC() local 15156 EVT ResVT = Val.getValueType(); in combineStoreFPToInt() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 2140 bool RISCVTargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap() 9180 static SDValue lowerReductionSeq(unsigned RVVOpcode, MVT ResVT, in lowerReductionSeq()
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