1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright 2018 Emmanuel Vadot <[email protected]>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  * $FreeBSD$
28  */
29 
30 #ifndef _RK_CLK_COMPOSITE_H_
31 #define _RK_CLK_COMPOSITE_H_
32 
33 #include <dev/extres/clk/clk.h>
34 
35 struct rk_clk_composite_def {
36 	struct clknode_init_def	clkdef;
37 
38 	uint32_t	muxdiv_offset;
39 
40 	uint32_t	mux_shift;
41 	uint32_t	mux_width;
42 
43 	uint32_t	div_shift;
44 	uint32_t	div_width;
45 
46 	uint32_t	gate_offset;
47 	uint32_t	gate_shift;
48 
49 	uint32_t	flags;
50 };
51 
52 #define	RK_CLK_COMPOSITE_HAVE_MUX	0x0001
53 #define	RK_CLK_COMPOSITE_HAVE_GATE	0x0002
54 #define	RK_CLK_COMPOSITE_DIV_EXP	0x0004	/* Register   0, 1, 2, 2, ... */
55 						/* Divider    1, 2, 4, 8, ... */
56 #define	RK_CLK_COMPOSITE_GRF		0x0008 /* Use syscon registers instead of CRU's */
57 int rk_clk_composite_register(struct clkdom *clkdom,
58     struct rk_clk_composite_def *clkdef);
59 
60 #endif /* _RK_CLK_COMPOSITE_H_ */
61