| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 1629 EVT PartVT = VT; in getVectorTypeBreakdown() local
1748 MVT PartVT = in GetReturnInfo() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 166 unsigned NumParts, MVT PartVT, EVT ValueVT, const Value *V, in getCopyFromParts()
339 MVT PartVT, EVT ValueVT, const Value *V, in getCopyFromPartsVector()
504 unsigned NumParts, MVT PartVT, const Value *V, in getCopyToParts()
640 const SDLoc &DL, EVT PartVT) { in widenVectorToPartType()
688 MVT PartVT, const Value *V, in getCopyToPartsVector()
2221 MVT PartVT = TLI.getRegisterTypeForCallingConv(Context, CC, VT); in visitRet() local
10503 MVT PartVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(), in LowerCallTo() local
11191 MVT PartVT = TLI->getRegisterTypeForCallingConv(*CurDAG->getContext(), in LowerArguments() local
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| H A D | LegalizeVectorTypes.cpp | 5290 EVT PartVT = EVT::getVectorVT(*DAG.getContext(), EltVT, in WidenVecRes_EXTRACT_SUBVECTOR() local
5894 EVT PartVT = EVT::getVectorVT(*DAG.getContext(), EltVT, in WidenVecRes_VECTOR_REVERSE() local
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 4320 unsigned NumParts, MVT PartVT, std::optional<CallingConv::ID> CC) const { in splitValueIntoRegisterParts()
4345 MVT PartVT, EVT ValueVT, in joinRegisterPartsIntoValue()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 1554 unsigned NumParts, MVT PartVT, std::optional<CallingConv::ID> CC) const { in splitValueIntoRegisterParts()
1567 MVT PartVT, EVT ValueVT, std::optional<CallingConv::ID> CC) const { in joinRegisterPartsIntoValue()
1922 MVT PartVT = getRegisterTypeForCallingConv(Ctx, CLI.CallConv, OrigArgVT); in LowerCall() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 4163 EVT PartVT = PartValue.getValueType(); in LowerCall() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 2181 MVT PartVT = TargetLowering::getRegisterTypeForCallingConv(Context, CC, VT); in getRegisterTypeForCallingConv() local
18448 EVT PartVT = PartValue.getValueType(); in LowerCall() local
19844 unsigned NumParts, MVT PartVT, std::optional<CallingConv::ID> CC) const { in splitValueIntoRegisterParts()
19899 MVT PartVT, EVT ValueVT, std::optional<CallingConv::ID> CC) const { in joinRegisterPartsIntoValue()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 798 MVT PartVT = MVT::getVectorVT(VecTy.getVectorElementType(), OpsPerWord); in buildHvxVectorReg() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 4443 unsigned NumParts, MVT PartVT, std::optional<CallingConv::ID> CC) const { in splitValueIntoRegisterParts()
4459 MVT PartVT, EVT ValueVT, std::optional<CallingConv::ID> CC) const { in joinRegisterPartsIntoValue()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 18260 unsigned NumParts, MVT PartVT, std::optional<CallingConv::ID> CC) const { in splitValueIntoRegisterParts()
|