1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * form: @(#)sbusreg.h 8.1 (Berkeley) 6/11/93 36 * from: NetBSD: iommureg.h,v 1.6 2001/07/20 00:07:13 eeh Exp 37 * 38 * $FreeBSD$ 39 */ 40 41 #ifndef _MACHINE_BUS_COMMON_H_ 42 #define _MACHINE_BUS_COMMON_H_ 43 44 #define INTCLR_PENDING 0x000000003ULL /* Interrupt queued to CPU */ 45 #define INTCLR_RECEIVED 0x000000001ULL /* Interrupt received */ 46 #define INTCLR_IDLE 0x000000000ULL /* Interrupt idle */ 47 48 #define INTMAP_V 0x080000000ULL /* Interrupt valid (enabled) */ 49 #define INTMAP_TID_MASK 0x07c000000ULL /* UPA target ID */ 50 #define INTMAP_TID_SHIFT 26 51 #define INTMAP_IGN_MASK 0x0000007c0ULL /* Interrupt group no. */ 52 #define INTMAP_IGN_SHIFT 6 53 #define INTMAP_INO_MASK 0x00000003fULL /* Interrupt number */ 54 #define INTMAP_INR_MASK (INTMAP_IGN_MASK | INTMAP_INO_MASK) 55 #define INTMAP_SBUSSLOT_MASK 0x000000018ULL /* SBus slot # */ 56 #define INTMAP_PCIBUS_MASK 0x000000010ULL /* PCI bus number (A or B) */ 57 #define INTMAP_PCISLOT_MASK 0x00000000cULL /* PCI slot # */ 58 #define INTMAP_PCIINT_MASK 0x000000003ULL /* PCI interrupt #A,#B,#C,#D */ 59 #define INTMAP_OBIO_MASK 0x000000020ULL /* Onboard device */ 60 #define INTIGN(x) (((x) & INTMAP_IGN_MASK) >> INTMAP_IGN_SHIFT) 61 #define INTVEC(x) ((x) & INTMAP_INR_MASK) 62 #define INTSLOT(x) (((x) >> 3) & 0x7) 63 #define INTPRI(x) ((x) & 0x7) 64 #define INTINO(x) ((x) & INTMAP_INO_MASK) 65 #define INTMAP_ENABLE(mr, mid) \ 66 (INTMAP_TID((mr), (mid)) | INTMAP_V) 67 #define INTMAP_TID(mr, mid) \ 68 (((mr) & ~INTMAP_TID_MASK) | ((mid) << INTMAP_TID_SHIFT)) 69 #define INTMAP_VEC(ign, ino) \ 70 ((((ign) << INTMAP_IGN_SHIFT) & INTMAP_IGN_MASK) | \ 71 ((ino) & INTMAP_INO_MASK)) 72 73 /* counter-timer support. */ 74 void sparc64_counter_init(const char *name, bus_space_tag_t tag, 75 bus_space_handle_t handle, bus_addr_t offset); 76 77 #endif /* !_MACHINE_BUS_COMMON_H_ */ 78