1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights 5 * reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are 9 * met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28 * THE POSSIBILITY OF SUCH DAMAGE. 29 * 30 * NETLOGIC_BSD 31 * $FreeBSD$ 32 */ 33 34 #ifndef __NLM_BOARD_H__ 35 #define __NLM_BOARD_H__ 36 37 #define XLP_NAE_NBLOCKS 5 38 #define XLP_NAE_NPORTS 4 39 40 /* 41 * EVP board EEPROM info 42 */ 43 #define EEPROM_I2CBUS 1 44 #define EEPROM_I2CADDR 0xAE 45 #define EEPROM_SIZE 48 46 #define EEPROM_MACADDR_OFFSET 2 47 48 /* used if there is no FDT */ 49 #define BOARD_CONSOLE_SPEED 115200 50 #define BOARD_CONSOLE_UART 0 51 52 /* 53 * EVP board CPLD chip select and daughter card info field 54 */ 55 #define XLP_EVB_CPLD_CHIPSELECT 2 56 57 #define DCARD_ILAKEN 0x0 58 #define DCARD_SGMII 0x1 59 #define DCARD_XAUI 0x2 60 #define DCARD_NOT_PRSNT 0x3 61 62 #if !defined(LOCORE) && !defined(__ASSEMBLY__) 63 /* 64 * NAE configuration 65 */ 66 67 struct xlp_port_ivars { 68 int port; 69 int block; 70 int node; 71 int type; 72 int phy_addr; 73 int mdio_bus; 74 int loopback_mode; 75 int num_channels; 76 int free_desc_sizes; 77 int num_free_descs; 78 int pseq_fifo_size; 79 int iface_fifo_size; 80 int rxbuf_size; 81 int rx_slots_reqd; 82 int tx_slots_reqd; 83 int vlan_pri_en; 84 int stg2_fifo_size; 85 int eh_fifo_size; 86 int frout_fifo_size; 87 int ms_fifo_size; 88 int pkt_fifo_size; 89 int pktlen_fifo_size; 90 int max_stg2_offset; 91 int max_eh_offset; 92 int max_frout_offset; 93 int max_ms_offset; 94 int max_pmem_offset; 95 int stg1_2_credit; 96 int stg2_eh_credit; 97 int stg2_frout_credit; 98 int stg2_ms_credit; 99 int hw_parser_en; 100 u_int ieee1588_inc_intg; 101 u_int ieee1588_inc_den; 102 u_int ieee1588_inc_num; 103 uint64_t ieee1588_userval; 104 uint64_t ieee1588_ptpoff; 105 uint64_t ieee1588_tmr1; 106 uint64_t ieee1588_tmr2; 107 uint64_t ieee1588_tmr3; 108 }; 109 110 struct xlp_block_ivars { 111 int block; 112 int type; 113 u_int portmask; 114 struct xlp_port_ivars port_ivars[XLP_NAE_NPORTS]; 115 }; 116 117 struct xlp_nae_ivars { 118 int node; 119 int nblocks; 120 u_int blockmask; 121 u_int ilmask; 122 u_int xauimask; 123 u_int sgmiimask; 124 int freq; 125 u_int flow_crc_poly; 126 u_int hw_parser_en; 127 u_int prepad_en; 128 u_int prepad_size; /* size in 16 byte units */ 129 u_int ieee_1588_en; 130 struct xlp_block_ivars block_ivars[XLP_NAE_NBLOCKS]; 131 }; 132 133 struct xlp_board_info { 134 u_int nodemask; 135 struct xlp_node_info { 136 struct xlp_nae_ivars nae_ivars; 137 } nodes[XLP_MAX_NODES]; 138 }; 139 140 extern struct xlp_board_info xlp_board_info; 141 142 /* Network configuration */ 143 int nlm_get_vfbid_mapping(int); 144 int nlm_get_poe_distvec(int vec, uint32_t *distvec); 145 void xlpge_get_macaddr(uint8_t *macaddr); 146 147 int nlm_board_info_setup(void); 148 149 /* EEPROM & CPLD */ 150 int nlm_board_eeprom_read(int node, int i2cbus, int addr, int offs, 151 uint8_t *buf,int sz); 152 uint64_t nlm_board_cpld_base(int node, int chipselect); 153 int nlm_board_cpld_majorversion(uint64_t cpldbase); 154 int nlm_board_cpld_minorversion(uint64_t cpldbase); 155 void nlm_board_cpld_reset(uint64_t cpldbase); 156 int nlm_board_cpld_dboard_type(uint64_t cpldbase, int slot); 157 158 #endif 159 #endif 160