| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFormMemoryClauses.cpp | 150 bool SIFormMemoryClauses::canBundle(const MachineInstr &MI, const RegUse &Defs, in canBundle()
217 RegUse &Defs, RegUse &Uses) const { in collectRegUses()
245 RegUse &Defs, RegUse &Uses, in processRegUses()
301 RegUse Defs, Uses; in runOnMachineFunction() local
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| H A D | SIPostRABundler.cpp | 49 SmallSet<Register, 16> Defs; member in __anon89eecb4a0111::SIPostRABundler
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| H A D | SIFixSGPRCopies.cpp | 469 auto &Defs = Init.second; in hoistAndMergeSGPRInits() local
561 auto &Defs = Init.second; in hoistAndMergeSGPRInits() local
574 auto &Defs = Init.second; in hoistAndMergeSGPRInits() local
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| H A D | SIFoldOperands.cpp | 656 SmallVectorImpl<std::pair<MachineOperand *, unsigned>> &Defs, in getRegSeqInit()
726 SmallVector<std::pair<MachineOperand*, unsigned>, 32> Defs; in tryToFoldACImm() local
891 SmallVector<std::pair<MachineOperand*, unsigned>, 32> Defs; in foldOperand() local
1740 SmallVector<std::pair<MachineOperand*, unsigned>, 32> Defs; in tryFoldRegSequence() local
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| /freebsd-14.2/contrib/llvm-project/clang/utils/TableGen/ |
| H A D | ClangDataCollectorsEmitter.cpp | 8 const auto &Defs = RK.getClasses(); in EmitClangDataCollectors() local
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| H A D | SveEmitter.cpp | 1219 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createCoreHeaderIntrinsics() local
1426 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createBuiltins() local
1466 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createCodeGenMap() local
1499 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createRangeChecks() local
1623 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createSMEBuiltins() local
1649 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createSMECodeGenMap() local
1683 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createSMERangeChecks() local
1719 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createBuiltinZAState() local
1759 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createStreamingAttrs() local
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| H A D | NeonEmitter.cpp | 2013 SmallVectorImpl<Intrinsic *> &Defs) { in genBuiltinsDef()
2047 raw_ostream &OS, SmallVectorImpl<Intrinsic *> &Defs) { in genStreamingSVECompatibleList()
2073 SmallVectorImpl<Intrinsic *> &Defs) { in genOverloadTypeCheckCode()
2153 SmallVectorImpl<Intrinsic *> &Defs) { in genIntrinsicRangeCheckCode()
2243 SmallVector<Intrinsic *, 128> Defs; in runHeader() local
2406 SmallVector<Intrinsic *, 128> Defs; in run() local
2515 SmallVector<Intrinsic *, 128> Defs; in runFP16() local
2624 SmallVector<Intrinsic *, 128> Defs; in runBF16() local
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| H A D | RISCVVEmitter.cpp | 419 std::vector<std::unique_ptr<RVVIntrinsic>> Defs; in createBuiltins() local
450 std::vector<std::unique_ptr<RVVIntrinsic>> Defs; in createCodeGen() local
747 std::vector<std::unique_ptr<RVVIntrinsic>> Defs; in createSema() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | LiveVariables.cpp | 432 SmallVectorImpl<unsigned> &Defs) { in HandlePhysRegDef()
471 SmallVectorImpl<unsigned> &Defs) { in UpdatePhysRegDefs()
482 SmallVectorImpl<unsigned> &Defs, in runOnInstr()
546 SmallVector<unsigned, 4> Defs; in runOnBlock() local
826 DenseSet<unsigned> Defs, Kills; in addNewBlock() local
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| H A D | RDFLiveness.cpp | 168 SmallSet<NodeId, 32> Defs; in getAllReachingDefs() local
305 NodeSet &Visited, const NodeSet &Defs) { in getAllReachingDefsRec()
311 NodeSet &Visited, const NodeSet &Defs, in getAllReachingDefsRecImpl()
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| H A D | ReachingDefAnalysis.cpp | 418 MCRegister PhysReg, InstSet &Defs, in getLiveOuts()
560 SmallSet<int, 2> Defs; in isSafeToMove() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | Thumb2ITBlockPass.cpp | 137 RegisterSet &Defs, RegisterSet &Uses) { in MoveCopyOutOfITBlock()
195 RegisterSet Defs, Uses; in InsertITInstructions() local
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| H A D | A15SDOptimizer.cpp | 398 SmallVector<unsigned, 8> Defs; in getReadDPRs() local
591 SmallVector<unsigned, 8> Defs = getReadDPRs(MI); in runOnInstruction() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | MemorySSAUpdater.cpp | 148 auto *Defs = MSSA->getWritableBlockDefs(MA->getBlock()); in getPreviousDefInBlock() local
175 auto *Defs = MSSA->getWritableBlockDefs(BB); in getPreviousDefFromEnd() local
257 auto *Defs = MSSA->getBlockDefs(MU->getBlock()); in insertUse() local
267 if (auto *Defs = MSSA->getWritableBlockDefs(StartBlock)) { in insertUse() local
470 auto *Defs = MSSA->getWritableBlockDefs(NewDef->getBlock()); in fixupDefs() local
497 if (auto *Defs = MSSA->getWritableBlockDefs(FixupBlock)) { in fixupDefs() local
847 MemorySSA::DefsList *Defs = MSSA->getWritableBlockDefs(BB); in applyInsertUpdates() local
1216 auto *Defs = MSSA->getWritableBlockDefs(From); in moveAllAccesses() local
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| H A D | MemorySSA.cpp | 531 auto *Defs = MSSA.getBlockDefs(Node->getBlock()); in getWalkTarget() local
1514 DefsList *Defs = nullptr; in buildMemorySSA() local
1584 auto *Defs = getOrCreateDefsList(BB); in insertIntoListsForBlock() local
1591 auto *Defs = getOrCreateDefsList(BB); in insertIntoListsForBlock() local
1600 auto *Defs = getOrCreateDefsList(BB); in insertIntoListsForBlock() local
1613 auto *Defs = getOrCreateDefsList(BB); in insertIntoListsBefore() local
1827 std::unique_ptr<DefsList> &Defs = DefsIt->second; in removeFromLists() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCBoolRetToInt.cpp | 74 SmallPtrSet<Value *, 8> Defs; in findAllDefs() local
221 auto Defs = findAllDefs(U); in runOnUse() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenMux.cpp | 100 BitVector Defs, Uses; member
158 void HexagonGenMux::getDefsUses(const MachineInstr *MI, BitVector &Defs, in getDefsUses()
182 BitVector Defs(NR), Uses(NR); in buildMaps() local
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| H A D | HexagonExpandCondsets.cpp | 395 MachineBasicBlock *Dest) -> bool { in updateDeadsInRange()
417 SetVector<MachineBasicBlock*> Defs; in updateDeadsInRange() local
817 bool HexagonExpandCondsets::canMoveOver(MachineInstr &MI, ReferenceMap &Defs, in canMoveOver()
990 ReferenceMap Uses, Defs; in predicate() local
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| H A D | HexagonBitSimplify.cpp | 299 RegisterSet Defs; in INITIALIZE_PASS_DEPENDENCY() local
318 RegisterSet &Defs) { in getInstrDefs()
1498 RegisterSet Defs; in processBlock() local
1626 RegisterSet Defs; in processBlock() local
2738 RegisterSet Defs; in processBlock() local
2995 RegisterSet Defs; in getDefReg() local
3191 RegisterSet Defs; in processLoop() local
3257 RegisterSet Defs; in processLoop() local
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| H A D | HexagonRDFOpt.cpp | 258 NodeList Defs; in rewrite() local
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| /freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | CTagsEmitter.cpp | 70 const auto &Defs = Records.getDefs(); in run() local
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| H A D | CodeGenIntrinsics.cpp | 37 std::vector<Record *> Defs = RC.getAllDerivedDefinitions("Intrinsic"); in CodeGenIntrinsicTable() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCChecker.h | 48 DenseMap<unsigned, PredSet> Defs; variable
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsDelaySlotFiller.cpp | 136 BitVector Defs, Uses; member in __anon43941acc0111::RegDefsUses
202 SmallPtrSet<ValueType, 4> Uses, Defs; member in __anon43941acc0111::MemDefsUses
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ScheduleDAGInstrs.h | 169 RegUnit2SUnitsMap Defs; variable
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